From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [216.205.24.124]) by mx.groups.io with SMTP id smtpd.web08.1168.1615910379487529563 for ; Tue, 16 Mar 2021 08:59:39 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=aSAf2lIe; spf=pass (domain: redhat.com, ip: 216.205.24.124, mailfrom: lersek@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1615910378; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=46WSmOZkDvAAYZuFyU8KnFMn8msdIrN3/bZpy03ec/U=; b=aSAf2lIekhzwBNozxW2YW7g7NdpBJeQoaWFyxGl+tjLTDelDrQ7rl+Cedwa7fwei1W7Jql 9P13qRFPlGhsO+3BBCylS1U3qIRPmRzgtOUlJMF0jCjhu2oDq1CESZ/1z3kxDAMvcPvrIs 0TUnAO3wV9QEWhTmUF+TsIvV3olsvak= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-469-mZRr8q13N4anYMI4jGiEHw-1; Tue, 16 Mar 2021 11:59:34 -0400 X-MC-Unique: mZRr8q13N4anYMI4jGiEHw-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 0F93E800FF0; Tue, 16 Mar 2021 15:59:33 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-114-138.ams2.redhat.com [10.36.114.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5820D7092D; Tue, 16 Mar 2021 15:59:31 +0000 (UTC) Subject: Re: [PATCH v1 1/1] UefiCpuPkg/CpuCacheInfoLib: Collect cache associative type To: Jason , devel@edk2.groups.io Cc: Ray Ni , Eric Dong , Rahul Kumar References: <20210315080434.6217-1-yun.lou@intel.com> From: "Laszlo Ersek" Message-ID: <83c12a77-15f3-63b0-319a-d5426c52c4bc@redhat.com> Date: Tue, 16 Mar 2021 16:59:27 +0100 MIME-Version: 1.0 In-Reply-To: <20210315080434.6217-1-yun.lou@intel.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=lersek@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 03/15/21 09:04, Jason wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3265 > > Support collecting cache associative type in CpuCacheInfoLib. > This prevents the user from using additional code to obtain the > same information. > > Signed-off-by: Jason Lou > Cc: Ray Ni > Cc: Eric Dong > Cc: Laszlo Ersek > Cc: Rahul Kumar > --- > UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 47 +++++++++++--------- > UefiCpuPkg/Include/Library/CpuCacheInfoLib.h | 13 +++++- > UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h | 13 +++++- > 3 files changed, 50 insertions(+), 23 deletions(-) OVMF doesn't use this library, so I'd like to skip this review. Thanks Laszlo > > diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > index d46fb0425851..48ef5dae8ee0 100644 > --- a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > +++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c > @@ -23,18 +23,18 @@ CpuCacheInfoPrintCpuCacheInfoTable ( > { > UINTN Index; > > - DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n")); > - DEBUG ((DEBUG_INFO, "| Index | Packge CoreType CacheLevel CacheType CacheWays CacheSizeinKB CacheCount |\n")); > - DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, "+-------+--------------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, "| Index | Packge CoreType CacheLevel CacheType CacheWays (FA|DM) CacheSizeinKB CacheCount |\n")); > + DEBUG ((DEBUG_INFO, "+-------+--------------------------------------------------------------------------------------+\n")); > > for (Index = 0; Index < CpuCacheInfoCount; Index++) { > - DEBUG ((DEBUG_INFO, "| %4x | %4x %2x %2x %2x %4x %8x %4x |\n", Index, > - CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, CpuCacheInfo[Index].CacheLevel, > - CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheWays, CpuCacheInfo[Index].CacheSizeinKB, > - CpuCacheInfo[Index].CacheCount)); > + DEBUG ((DEBUG_INFO, "| %4x | %4x %2x %2x %2x %4x ( %x| %x) %8x %4x |\n", > + Index, CpuCacheInfo[Index].Package, CpuCacheInfo[Index].CoreType, CpuCacheInfo[Index].CacheLevel, > + CpuCacheInfo[Index].CacheType, CpuCacheInfo[Index].CacheWays, CpuCacheInfo[Index].FullyAssociativeCache, > + CpuCacheInfo[Index].DirectMappedCache, CpuCacheInfo[Index].CacheSizeinKB, CpuCacheInfo[Index].CacheCount)); > } > > - DEBUG ((DEBUG_INFO, "+-------+-------------------------------------------------------------------------------+\n")); > + DEBUG ((DEBUG_INFO, "+-------+--------------------------------------------------------------------------------------+\n")); > } > > /** > @@ -160,6 +160,7 @@ CpuCacheInfoCollectCoreAndCacheData ( > CPUID_CACHE_PARAMS_EAX CacheParamEax; > CPUID_CACHE_PARAMS_EBX CacheParamEbx; > UINT32 CacheParamEcx; > + CPUID_CACHE_PARAMS_EDX CacheParamEdx; > CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX NativeModelIdAndCoreTypeEax; > COLLECT_CPUID_CACHE_DATA_CONTEXT *Context; > CPUID_CACHE_DATA *CacheData; > @@ -185,17 +186,19 @@ CpuCacheInfoCollectCoreAndCacheData ( > CacheParamLeafIndex = 0; > > while (CacheParamLeafIndex < MAX_NUM_OF_CACHE_PARAMS_LEAF) { > - AsmCpuidEx (CPUID_CACHE_PARAMS, CacheParamLeafIndex, &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, NULL); > + AsmCpuidEx (CPUID_CACHE_PARAMS, CacheParamLeafIndex, &CacheParamEax.Uint32, &CacheParamEbx.Uint32, &CacheParamEcx, &CacheParamEdx.Uint32); > > if (CacheParamEax.Bits.CacheType == 0) { > break; > } > > - CacheData[CacheParamLeafIndex].CacheLevel = (UINT8)CacheParamEax.Bits.CacheLevel; > - CacheData[CacheParamLeafIndex].CacheType = (UINT8)CacheParamEax.Bits.CacheType; > - CacheData[CacheParamLeafIndex].CacheWays = (UINT16)CacheParamEbx.Bits.Ways; > - CacheData[CacheParamLeafIndex].CacheShareBits = (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors; > - CacheData[CacheParamLeafIndex].CacheSizeinKB = (CacheParamEbx.Bits.Ways + 1) * > + CacheData[CacheParamLeafIndex].CacheLevel = (UINT8)CacheParamEax.Bits.CacheLevel; > + CacheData[CacheParamLeafIndex].CacheType = (UINT8)CacheParamEax.Bits.CacheType; > + CacheData[CacheParamLeafIndex].CacheWays = (UINT16)CacheParamEbx.Bits.Ways; > + CacheData[CacheParamLeafIndex].FullyAssociativeCache = (UINT8)CacheParamEax.Bits.FullyAssociativeCache; > + CacheData[CacheParamLeafIndex].DirectMappedCache = (UINT8)CacheParamEdx.Bits.ComplexCacheIndexing; > + CacheData[CacheParamLeafIndex].CacheShareBits = (UINT16)CacheParamEax.Bits.MaximumAddressableIdsForLogicalProcessors; > + CacheData[CacheParamLeafIndex].CacheSizeinKB = (CacheParamEbx.Bits.Ways + 1) * > (CacheParamEbx.Bits.LinePartitions + 1) * (CacheParamEbx.Bits.LineSize + 1) * (CacheParamEcx + 1) / SIZE_1KB; > > CacheParamLeafIndex++; > @@ -305,13 +308,15 @@ CpuCacheInfoCollectCpuCacheInfoData ( > if (CacheInfoIndex == LocalCacheInfoCount) { > ASSERT (LocalCacheInfoCount < MaxCacheInfoCount); > > - LocalCacheInfo[LocalCacheInfoCount].Package = ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].Package; > - LocalCacheInfo[LocalCacheInfoCount].CoreType = ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].CoreType; > - LocalCacheInfo[LocalCacheInfoCount].CacheLevel = CacheData[Index].CacheLevel; > - LocalCacheInfo[LocalCacheInfoCount].CacheType = CacheData[Index].CacheType; > - LocalCacheInfo[LocalCacheInfoCount].CacheWays = CacheData[Index].CacheWays; > - LocalCacheInfo[LocalCacheInfoCount].CacheSizeinKB = CacheData[Index].CacheSizeinKB; > - LocalCacheInfo[LocalCacheInfoCount].CacheCount = 1; > + LocalCacheInfo[LocalCacheInfoCount].Package = ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].Package; > + LocalCacheInfo[LocalCacheInfoCount].CoreType = ProcessorInfo[Index / MAX_NUM_OF_CACHE_PARAMS_LEAF].CoreType; > + LocalCacheInfo[LocalCacheInfoCount].CacheLevel = CacheData[Index].CacheLevel; > + LocalCacheInfo[LocalCacheInfoCount].CacheType = CacheData[Index].CacheType; > + LocalCacheInfo[LocalCacheInfoCount].CacheWays = CacheData[Index].CacheWays; > + LocalCacheInfo[LocalCacheInfoCount].FullyAssociativeCache = CacheData[Index].FullyAssociativeCache; > + LocalCacheInfo[LocalCacheInfoCount].DirectMappedCache = CacheData[Index].DirectMappedCache; > + LocalCacheInfo[LocalCacheInfoCount].CacheSizeinKB = CacheData[Index].CacheSizeinKB; > + LocalCacheInfo[LocalCacheInfoCount].CacheCount = 1; > > LocalCacheInfoCount++; > } > diff --git a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > index a7f29b188775..f37001a2a2e8 100644 > --- a/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > +++ b/UefiCpuPkg/Include/Library/CpuCacheInfoLib.h > @@ -33,7 +33,18 @@ typedef struct { > // Ways of associativity. > // Value = CPUID.04h:EBX[31:22] > // > - UINT16 CacheWays; > + UINT16 CacheWays : 10; > + // > + // Fully associative cache. > + // Value = CPUID.04h:EAX[09] > + // > + UINT16 FullyAssociativeCache : 1; > + // > + // Direct mapped cache. > + // Value = CPUID.04h:EDX[02] > + // > + UINT16 DirectMappedCache : 1; > + UINT16 Reserved : 4; > // > // Size of single cache that this package's this type of logical processor corresponds to. > // Value = (CPUID.04h:EBX[31:22] + 1) * (CPUID.04h:EBX[21:12] + 1) * > diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > index de56db9c0cbe..01fcd36dca1b 100644 > --- a/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > +++ b/UefiCpuPkg/Library/CpuCacheInfoLib/InternalCpuCacheInfoLib.h > @@ -52,7 +52,18 @@ typedef struct { > // Ways of associativity. > // Value = CPUID.04h:EBX[31:22] > // > - UINT16 CacheWays; > + UINT16 CacheWays : 10; > + // > + // Fully associative cache. > + // Value = CPUID.04h:EAX[09] > + // > + UINT16 FullyAssociativeCache : 1; > + // > + // Direct mapped cache. > + // Value = CPUID.04h:EDX[02] > + // > + UINT16 DirectMappedCache : 1; > + UINT16 Reserved : 4; > // > // Cache share bits. > // Value = CPUID.04h:EAX[25:14] >