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From: Laszlo Ersek <lersek@redhat.com>
To: Eric Dong <eric.dong@intel.com>, edk2-devel@lists.01.org
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Subject: Re: [Patch v4 1/5] UefiCpuPkg/PiSmmCpuDxeSmm: Use GDT/IDT saved in Smram.
Date: Wed, 15 Aug 2018 15:03:31 +0200	[thread overview]
Message-ID: <844db7f0-3e4b-9c6b-cfb8-9c79d638a7b7@redhat.com> (raw)
In-Reply-To: <20180815021435.13748-2-eric.dong@intel.com>

On 08/15/18 04:14, Eric Dong wrote:
> Current implementation will copy GDT/IDT at SmmReadyToLock point
> from ACPI NVS memory to Smram. Later at S3 resume phase, it restore
> the memory saved in Smram to ACPI NVS. It can directly use GDT/IDT
> saved in Smram instead of restore the original ACPI NVS memory.
> This patch do this change.
> 
> V4 changes:
> 1. Remove global variables mGdtForAp/mIdtForAp/mMachineCheckHandlerForAp.
> 
> Test Done:
>   Do the OS boot and S3 resume test.
> 
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Ruiyu Ni <ruiyu.ni@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong <eric.dong@intel.com>
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 31 ++++++++++++++-----------------
>  1 file changed, 14 insertions(+), 17 deletions(-)

Reviewed-by: Laszlo Ersek <lersek@redhat.com>

Thanks,
Laszlo

> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> index 0b8ef70359..abd8a5a07b 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
> @@ -66,9 +66,6 @@ ACPI_CPU_DATA                mAcpiCpuData;
>  volatile UINT32              mNumberToFinish;
>  MP_CPU_EXCHANGE_INFO         *mExchangeInfo;
>  BOOLEAN                      mRestoreSmmConfigurationInS3 = FALSE;
> -VOID                         *mGdtForAp = NULL;
> -VOID                         *mIdtForAp = NULL;
> -VOID                         *mMachineCheckHandlerForAp = NULL;
>  MP_MSR_LOCK                  *mMsrSpinLocks = NULL;
>  UINTN                        mMsrSpinLockCount;
>  UINTN                        mMsrCount = 0;
> @@ -448,13 +445,6 @@ PrepareApStartupVector (
>    CopyMem ((VOID *) (UINTN) &mExchangeInfo->GdtrProfile, (VOID *) (UINTN) mAcpiCpuData.GdtrProfile, sizeof (IA32_DESCRIPTOR));
>    CopyMem ((VOID *) (UINTN) &mExchangeInfo->IdtrProfile, (VOID *) (UINTN) mAcpiCpuData.IdtrProfile, sizeof (IA32_DESCRIPTOR));
>  
> -  //
> -  // Copy AP's GDT, IDT and Machine Check handler from SMRAM to ACPI NVS memory
> -  //
> -  CopyMem ((VOID *) mExchangeInfo->GdtrProfile.Base, mGdtForAp, mExchangeInfo->GdtrProfile.Limit + 1);
> -  CopyMem ((VOID *) mExchangeInfo->IdtrProfile.Base, mIdtForAp, mExchangeInfo->IdtrProfile.Limit + 1);
> -  CopyMem ((VOID *)(UINTN) mAcpiCpuData.ApMachineCheckHandlerBase, mMachineCheckHandlerForAp, mAcpiCpuData.ApMachineCheckHandlerSize);
> -
>    mExchangeInfo->StackStart  = (VOID *) (UINTN) mAcpiCpuData.StackAddress;
>    mExchangeInfo->StackSize   = mAcpiCpuData.StackSize;
>    mExchangeInfo->BufferStart = (UINT32) StartupVector;
> @@ -831,6 +821,9 @@ GetAcpiCpuData (
>    ACPI_CPU_DATA              *AcpiCpuData;
>    IA32_DESCRIPTOR            *Gdtr;
>    IA32_DESCRIPTOR            *Idtr;
> +  VOID                       *GdtForAp;
> +  VOID                       *IdtForAp;
> +  VOID                       *MachineCheckHandlerForAp;
>  
>    if (!mAcpiS3Enable) {
>      return;
> @@ -893,14 +886,18 @@ GetAcpiCpuData (
>    Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile;
>    Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;
>  
> -  mGdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) +  mAcpiCpuData.ApMachineCheckHandlerSize);
> -  ASSERT (mGdtForAp != NULL);
> -  mIdtForAp = (VOID *) ((UINTN)mGdtForAp + (Gdtr->Limit + 1));
> -  mMachineCheckHandlerForAp = (VOID *) ((UINTN)mIdtForAp + (Idtr->Limit + 1));
> +  GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) +  mAcpiCpuData.ApMachineCheckHandlerSize);
> +  ASSERT (GdtForAp != NULL);
> +  IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1));
> +  MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1));
> +
> +  CopyMem (GdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1);
> +  CopyMem (IdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
> +  CopyMem (MachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize);
>  
> -  CopyMem (mGdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1);
> -  CopyMem (mIdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
> -  CopyMem (mMachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize);
> +  Gdtr->Base = (UINTN)GdtForAp;
> +  Idtr->Base = (UINTN)IdtForAp;
> +  mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;
>  }
>  
>  /**
> 



  parent reply	other threads:[~2018-08-15 13:03 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-15  2:14 [Patch v4 0/5] Change CpuS3Data memory type and address limitation Eric Dong
2018-08-15  2:14 ` [Patch v4 1/5] UefiCpuPkg/PiSmmCpuDxeSmm: Use GDT/IDT saved in Smram Eric Dong
2018-08-15  5:40   ` Ni, Ruiyu
2018-08-15 13:03   ` Laszlo Ersek [this message]
2018-08-15  2:14 ` [Patch v4 2/5] UefiCpuPkg/AcpiCpuData.h: Remove AcpiNVS and Below 4G limitation Eric Dong
2018-08-15  2:14 ` [Patch v4 3/5] UefiCpuPkg/CpuS3DataDxe: Change Memory Type and address limitation Eric Dong
2018-08-15  5:40   ` Ni, Ruiyu
2018-08-15 13:11   ` Laszlo Ersek
2018-08-15 13:12   ` Marvin Häuser
2018-08-15 15:30     ` Laszlo Ersek
2018-08-16  0:56       ` Dong, Eric
2018-08-16 12:30         ` Laszlo Ersek
2018-08-16 12:59           ` Marvin Häuser
2018-08-17  1:51             ` Dong, Eric
2018-08-15  2:14 ` [Patch v4 4/5] UefiCpuPkg/CpuS3DataDxe: Remove below 4G limitation Eric Dong
2018-08-15  2:14 ` [Patch v4 5/5] UefiCpuPkg/RegisterCpuFeaturesLib: Combine implementation Eric Dong
2018-08-15 13:14 ` [Patch v4 0/5] Change CpuS3Data memory type and address limitation Laszlo Ersek
2018-08-15 14:00   ` Laszlo Ersek

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