From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web12.47337.1590486813579992255 for ; Tue, 26 May 2020 02:53:33 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: ard.biesheuvel@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4232F1FB; Tue, 26 May 2020 02:53:32 -0700 (PDT) Received: from [192.168.1.81] (unknown [10.37.8.89]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E96C93F52E; Tue, 26 May 2020 02:53:29 -0700 (PDT) Subject: Re: [PATCH edk2-platforms v2 00/16] Add PCIe Support To: Wasim Khan , devel@edk2.groups.io, meenakshi.aggarwal@nxp.com, vabhav.sharma@nxp.com, V.Sethi@nxp.com, leif@nuviainc.com, jon@solid-run.com Cc: Wasim Khan References: <1590482241-13132-1-git-send-email-wasim.khan@oss.nxp.com> From: "Ard Biesheuvel" Message-ID: <84d23c2d-556e-b1c1-28a2-2df0f87788e6@arm.com> Date: Tue, 26 May 2020 11:53:27 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <1590482241-13132-1-git-send-email-wasim.khan@oss.nxp.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 5/26/20 10:37 AM, Wasim Khan wrote: > From: Wasim Khan > > Add PCIe Support for NXP Layerscape SoC which supports > different PCIe controllers. > Use generic PCIe drivers and wire up PciHostBridgeLib, > PciSegmentLib and PciCpuIo2Dxe driver for controller > specific implementation. > > V1 Series can be referred here: > https://edk2.groups.io/g/devel/message/60116?p=,,,20,0,0,0::relevance,,PCIe+Support,20,2,0,74395799 > > > Changes in V2: > - Addressed review comments received on V1. > Thanks Wasim Reviewed-by: Ard Biesheuvel I took some liberties with the PciSegmentLib code to get rid of the inline functions in Pcie.h - please double check whether that code is still correct, and rebase your code before sending new work that applies on top of these changes. Also, I failed to spot this in review, but preprocessor macros that resolve to values that are used in arithmetic expressions should really all contain outer (), or you will be pulling your hair out figuring out where the unexpected values are coming from. I fixed this up while committing (all in Pcie.h) Pushed as 7a4035e9efd8..7121691cfcbc > Meenakshi Aggarwal (1): > Platform/NXP: LS1043aRdbPkg: Enable NetworkPkg > > Wasim Khan (15): > Silicon/NXP/NxpQoriqLs.dec: Add PCIe related PCDs. > Silicon/NXP: LS1043A: Define PCIe related PCDs > Silicon/NXP: Implement PciHostBridgeLib support > Silicon/NXP: PciHostBridgeLib: CFG Shift feature support for PCIeLS > Ctrl > Silicon/NXP: PciHostBridgeLib: Setup PCIe LsGen4 Controller and ATU > Windows > Silicon/NXP: PciHostBridgeLib: add Workaround for A-011451 > Silicon/NXP: PciHostBridgeLib: Dump Layerscale Gen4 ATU windows > Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows > Silicon/NXP: Implement PciSegmentLib for PCIe Layerscape Controller > Silicon/NXP: PciSegmentLib: Add ECAM config support for PCIe LS > Controller > Silicon/NXP: PciSegmentLib: Add support PCIe LsGen4 Controller > Silicon/NXP: PciSegmentLib: LsGen4Ctrl: Add Workaround for A-011264 > Silicon/NXP/Drivers: Implement PciCpuIo2Dxe Driver > Platform/NXP: LS1043aRdbPkg: Enable PCIE support > Platform/NXP: LS1043aRdbPkg : Increase fv image size > > Silicon/NXP/NxpQoriqLs.dec | 12 + > Silicon/NXP/LS1043A/LS1043A.dsc.inc | 7 + > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 20 + > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 20 +- > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 40 + > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf | 43 + > Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf | 36 + > Silicon/NXP/Include/Pcie.h | 228 ++++++ > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 628 +++++++++++++++ > Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c | 830 ++++++++++++++++++++ > Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c | 699 +++++++++++++++++ > 11 files changed, 2560 insertions(+), 3 deletions(-) > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf > create mode 100644 Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf > create mode 100755 Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf > create mode 100755 Silicon/NXP/Include/Pcie.h > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > create mode 100644 Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c > create mode 100755 Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c >