From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=ruiyu.ni@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 7369F211C2830 for ; Wed, 30 Jan 2019 21:46:39 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Jan 2019 21:46:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,543,1539673200"; d="scan'208";a="112528704" Received: from ray-dev.ccr.corp.intel.com (HELO [10.239.9.127]) ([10.239.9.127]) by orsmga006.jf.intel.com with ESMTP; 30 Jan 2019 21:46:37 -0800 To: Hao Wu , edk2-devel@lists.01.org Cc: Jian J Wang , Ray Ni , Eric Dong References: <20190131024854.4880-1-hao.a.wu@intel.com> <20190131024854.4880-9-hao.a.wu@intel.com> From: "Ni, Ruiyu" Message-ID: <859fb9b3-35fb-cf31-2b6c-fbe63c6d5f1c@Intel.com> Date: Thu, 31 Jan 2019 13:49:00 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20190131024854.4880-9-hao.a.wu@intel.com> Subject: Re: [PATCH v2 08/12] MdeModulePkg/AhciPei: Add AHCI mode ATA device support in PEI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 31 Jan 2019 05:46:39 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 1/31/2019 10:48 AM, Hao Wu wrote: > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1409 > > This commit will add the AHCI mode ATA device support in the PEI phase. > > More specifically, the newly add AhciPei driver will consume the ATA AHCI > host controller PPI for ATA controllers working under AHCI code within the > system. And then produces the below PPIs for each controller: > > EDKII PEI ATA PassThru PPI > Storage Security Command PPI > > Also, the driver will consume the S3StorageDeviceInitList LockBox in S3 > phase. The purpose is to perform an on-demand (partial) ATA device > enumeration/initialization on each controller to benefit the S3 resume > performance. > > The implementation of this driver is currently based on the below > specifications: > Serial ATA Revision 2.6 > Serial ATA Advanced Host Controller Interface (AHCI) 1.3.1 > AT Attachment with Packet Interface - 6 (ATA/ATAPI-6) > > Cc: Jian J Wang > Cc: Ray Ni > Cc: Eric Dong > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Hao Wu Similar comments regarding the device path part. -- Thanks, Ray