From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::542; helo=mail-pg1-x542.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0766521962301 for ; Wed, 8 Aug 2018 23:37:19 -0700 (PDT) Received: by mail-pg1-x542.google.com with SMTP id n7-v6so2270488pgq.4 for ; Wed, 08 Aug 2018 23:37:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-transfer-encoding; bh=i0Osxj5Uhx7sQSb+RkwByeYRLAsK5gLRjI4NRMAjg7A=; b=CWgJCnQupWU18TQnXnQ0JknAaVHAZ3kX6RmuO3PpHBQwE94+c8exBOuOBocB07rtOp ydqHyc1cs1fmvKkkQEPGGtbu6M/tUE9iqkd1orq1puS5bU393o6xBg2L6OapCG61fssC +gvDYETycbuUATvJCfNM/sWDzxOGU3c6RoIuY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-transfer-encoding; bh=i0Osxj5Uhx7sQSb+RkwByeYRLAsK5gLRjI4NRMAjg7A=; b=humc9dh2/LzYvVTPJ/SR+ITXeUxGyOZhH7d5Z1ClHY6KzHtrKX5AqFcZQbM/WicuFS cxTqk8470kg7SoZcbHXKO5KOCtc0f77w3JL+lgiCrc3CJz84XStqXWstBLQ7xTxtuFfG 6XIb8S3IFPhpHlSnIsfN76Jnn8iE6oz+o8IOUcHLw8KevxrJi+GWQVUiUDPPDwQRzTzZ XNyVjjnD2PEO/JtIPQSStR62J9lzmw5bC80Zbrz5cAk6UZemPkXKgmMcCdcpBQzJBqww RY59lS+IEaokonG6ClnNDSse4+UTk7stuDIDXNkuw9K43Lidkp6j7h9MMgH5yWhEY04M oAhQ== X-Gm-Message-State: AOUpUlGOoEdgNscvQzrsv0c6BghqpFq0KNBrEnia3t6Ik6ly22aJN0P8 lOPTsN85AzoKvyzv+rmPrHvViA== X-Google-Smtp-Source: AA+uWPy3c4vT178A1urCRcLVgaksxeUUFQVy+XuJeY64iruEF+osI7pRpq9osDs8O7Ev2Z2f2Aj31w== X-Received: by 2002:a65:6398:: with SMTP id h24-v6mr851163pgv.245.1533796639596; Wed, 08 Aug 2018 23:37:19 -0700 (PDT) Received: from [10.199.0.182] ([64.64.108.224]) by smtp.gmail.com with ESMTPSA id x66-v6sm11742156pff.123.2018.08.08.23.37.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Aug 2018 23:37:18 -0700 (PDT) To: Leif Lindholm Cc: linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org, ard.biesheuvel@linaro.org, guoheyi@huawei.com, wanghuiqiang@huawei.com, huangming23@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, john.garry@huawei.com, xinliang.liu@linaro.org, Sun Yuanchen , Heyi Guo References: <20180724070922.63362-1-ming.huang@linaro.org> <20180724070922.63362-27-ming.huang@linaro.org> <20180804093427.sfcwlzmdesm7t45b@bivouac.eciton.net> From: Ming Message-ID: <87238e2d-24b2-5336-1635-a7166eb31661@linaro.org> Date: Thu, 9 Aug 2018 14:37:04 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <20180804093427.sfcwlzmdesm7t45b@bivouac.eciton.net> Subject: Re: [PATCH edk2-platforms v1 26/38] Silicon/Hisilicon/D0x: Move macro definition to PlatformArch.h X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 09 Aug 2018 06:37:20 -0000 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit 在 8/4/2018 5:34 PM, Leif Lindholm 写道: > On Tue, Jul 24, 2018 at 03:09:10PM +0800, Ming Huang wrote: >> From: Sun Yuanchen >> >> Move some RAS macros definition to PlatformArch.h for >> unifying D0x > > Minor comments below. > However, I would still prefer for this to be split up into a > refactoring patch for d03/d05, and then simpley introduced when the > d06 files are added. OK, do it in v2. > > / > Leif > >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Sun Yuanchen >> Signed-off-by: Ming Huang >> Signed-off-by: Heyi Guo >> --- >> Silicon/Hisilicon/Hi1610/Include/PlatformArch.h | 7 +++++-- >> Silicon/Hisilicon/Hi1616/Include/PlatformArch.h | 4 ++++ >> Silicon/Hisilicon/Hi1620/Include/PlatformArch.h | 8 ++++++-- >> 3 files changed, 15 insertions(+), 4 deletions(-) >> >> diff --git a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> index 4843b60536..5198e3efff 100644 >> --- a/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1610/Include/PlatformArch.h >> @@ -1,7 +1,7 @@ >> /** @file >> * >> -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. >> -* Copyright (c) 2015, Linaro Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. >> * >> * This program and the accompanying materials >> * are licensed and made available under the terms and conditions of the BSD License >> @@ -38,6 +38,9 @@ >> >> #define S1_BASE 0x40000000000 >> >> +#define RASC_BASE (0x5000) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ > > Character encoding issues in comment. > >> >> // >> // ACPI table information used to initialize tables. >> diff --git a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> index 49618f6559..5124714cb5 100644 >> --- a/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1616/Include/PlatformArch.h >> @@ -30,6 +30,10 @@ >> // Max NUMA node number for each node type >> #define MAX_NUM_PER_TYPE 8 >> >> +#define RASC_BASE (0x5000) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x5C) /* RASC_CFG_INFOIDX??RASC?Ķ?ȡRankͳ????Ϣ???üĴ??? */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xB8) /* RASC_CFG_SPLVL??RASC??Sparingˮ?????üĴ??? */ >> + > > Character encoding issues in comment. > >> // for acpi >> #define NODE_IN_SOCKET 2 >> #define CORE_NUM_PER_SOCKET 32 >> diff --git a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> index 2626751a0d..f2491315a8 100644 >> --- a/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> +++ b/Silicon/Hisilicon/Hi1620/Include/PlatformArch.h >> @@ -1,7 +1,7 @@ >> /** @file >> * >> -* Copyright (c) 2015, Hisilicon Limited. All rights reserved. >> -* Copyright (c) 2015, Linaro Limited. All rights reserved. >> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved. >> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved. >> * >> * This program and the accompanying materials >> * are licensed and made available under the terms and conditions of the BSD License >> @@ -31,6 +31,10 @@ >> #define MAX_NUM_PER_TYPE 8 >> >> >> +#define RASC_BASE (0x1800) >> +#define RASC_CFG_INFOIDX_REG (RASC_BASE + 0x58) /* configuration register for Rank statistical information */ >> +#define RASC_CFG_SPLVL_REG (RASC_BASE + 0xD4) /* configuration register for Sparing level */ >> + > > Much nicer comments. > >> // for acpi >> #define NODE_IN_SOCKET 2 >> #define CORE_NUM_PER_SOCKET 48 >> -- >> 2.17.0 >>