From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web10.32299.1649053407401800519 for ; Sun, 03 Apr 2022 23:23:31 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=Z4uRsU2Q; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: ted.kuo@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1649053410; x=1680589410; h=from:to:cc:subject:date:message-id; bh=2PlMDdf024PEA8L6FsK3ZEYH7JkePH71LaRWsLoKaYM=; b=Z4uRsU2QmofvobpZ/8ITnsFwgv2oHuIFEAwiuC4AnvEK6UP2KdyF08EW B/i1HZW1knV7i4aLIRrNfPWjX6syy1LOmduUQTwW/3z6j8sgNl5mxG7gK SMVWYKl684xPqJNHj+zI6JGdQiU4u/vOOZtZ7q63FF0GCd4AdEqDiaObu 6/STld5L0/MLnKi8kw2At9reMu4wR89hCDRSPbSxqYcAPOvGf5kt98PYl xz7GdDiZasxrbzc/7y02r1QC8P6w/lEqFkGxrHix/SvkpYSFxORpo7buL qNvUQfKuHznzaqf+pXOgqUFvDOp+Etax6vrjfwJ/Yd07P8eaYOHth9Biy A==; X-IronPort-AV: E=McAfee;i="6200,9189,10306"; a="321143250" X-IronPort-AV: E=Sophos;i="5.90,233,1643702400"; d="scan'208";a="321143250" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2022 23:23:30 -0700 X-IronPort-AV: E=Sophos;i="5.90,233,1643702400"; d="scan'208";a="696468719" Received: from tedkuo1-win10.gar.corp.intel.com ([10.5.215.13]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2022 23:23:29 -0700 From: "Kuo, Ted" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng , Ashraf Ali S Subject: [edk2-devel][PATCH v2 7/8] IntelFsp2WrapperPkg: BaseFspWrapperApiLib support for X64 Date: Mon, 4 Apr 2022 14:23:10 +0800 Message-Id: <87c41f488a983fd34cff0fe7b01492d85fd72697.1649053236.git.ted.kuo@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 In-Reply-To: References: In-Reply-To: References: REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893 Add Execute64BitCode to execute 64bit code from long mode directly in PEI 64bit. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ashraf Ali S Signed-off-by: Ted Kuo --- .../BaseFspWrapperApiLib/FspWrapperApiLib.c | 42 +++++++++++++++++--- .../BaseFspWrapperApiLib/IA32/DispatchExecute.c | 21 ++++++++++ .../BaseFspWrapperApiLib/X64/DispatchExecute.c | 45 +++++++++++++++++++++- 3 files changed, 101 insertions(+), 7 deletions(-) diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c index 67faad927c..ba4fe3903e 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c @@ -13,7 +13,7 @@ #include /** - Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to + Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to long mode. @param[in] Function The 32bit code entry to be executed. @@ -29,6 +29,22 @@ Execute32BitCode ( IN UINT64 Param2 ); +/** + Wrapper to execute 64-bit code directly from long mode. + + @param[in] Function The 64bit code entry to be executed. + @param[in] Param1 The first parameter to pass to 64bit code. + @param[in] Param2 The second parameter to pass to 64bit code. + + @return EFI_STATUS. +**/ +EFI_STATUS +Execute64BitCode ( + IN UINT64 Function, + IN UINT64 Param1, + IN UINT64 Param2 + ); + /** Find FSP header pointer. @@ -94,7 +110,11 @@ CallFspNotifyPhase ( NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset); InterruptState = SaveAndDisableInterrupts (); - Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL); + if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) { + Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL); + } else { + Status = Execute64BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL); + } SetInterruptState (InterruptState); return Status; @@ -127,7 +147,11 @@ CallFspMemoryInit ( FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset); InterruptState = SaveAndDisableInterrupts (); - Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr); + if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) { + Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr); + } else { + Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr); + } SetInterruptState (InterruptState); return Status; @@ -158,7 +182,11 @@ CallTempRamExit ( TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset); InterruptState = SaveAndDisableInterrupts (); - Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL); + if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) { + Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL); + } else { + Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL); + } SetInterruptState (InterruptState); return Status; @@ -189,7 +217,11 @@ CallFspSiliconInit ( FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset); InterruptState = SaveAndDisableInterrupts (); - Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL); + if ((FspHeader->ImageAttribute & IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT) == FSP_IA32) { + Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL); + } else { + Status = Execute64BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL); + } SetInterruptState (InterruptState); return Status; diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c index 4f6a8dd1a7..a22ed2d539 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c @@ -49,3 +49,24 @@ Execute32BitCode ( return Status; } + +/** + Wrapper for a thunk to transition from compatibility mode to long mode to execute 64-bit code and then transit back to + compatibility mode. + + @param[in] Function The 64bit code entry to be executed. + @param[in] Param1 The first parameter to pass to 64bit code. + @param[in] Param2 The second parameter to pass to 64bit code. + + @return EFI_STATUS. +**/ +EFI_STATUS +Execute64BitCode ( + IN UINT64 Function, + IN UINT64 Param1, + IN UINT64 Param2 + ) +{ + return EFI_UNSUPPORTED; +} + diff --git a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c index 2ee5bc3dd4..bae216f639 100644 --- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c +++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/X64/DispatchExecute.c @@ -1,5 +1,5 @@ /** @file - Execute 32-bit code in Long Mode. + Execute 64-bit code in Long Mode. Provide a thunk function to transition from long mode to compatibility mode to execute 32-bit code and then transit back to long mode. @@ -12,6 +12,21 @@ #include #include +/** + FSP API functions. + + @param[in] Param1 The first parameter to pass to 64bit code. + @param[in] Param2 The second parameter to pass to 64bit code. + + @return EFI_STATUS. +**/ +typedef +EFI_STATUS +(EFIAPI *FSP_FUNCTION)( + IN VOID *Param1, + IN VOID *Param2 + ); + #pragma pack(1) typedef union { struct { @@ -80,7 +95,7 @@ AsmExecute32BitCode ( ); /** - Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to + Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to long mode. @param[in] Function The 32bit code entry to be executed. @@ -110,3 +125,29 @@ Execute32BitCode ( return Status; } + +/** + Wrapper to execute 64-bit code directly from long mode. + + @param[in] Function The 64bit code entry to be executed. + @param[in] Param1 The first parameter to pass to 64bit code. + @param[in] Param2 The second parameter to pass to 64bit code. + + @return EFI_STATUS. +**/ +EFI_STATUS +Execute64BitCode ( + IN UINT64 Function, + IN UINT64 Param1, + IN UINT64 Param2 + ) +{ + FSP_FUNCTION EntryFunc; + EFI_STATUS Status; + + EntryFunc = (FSP_FUNCTION)(UINTN)(Function); + Status = EntryFunc ((VOID *)(UINTN)Param1, (VOID *)(UINTN)Param2); + + return Status; +} + -- 2.16.2.windows.1