From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id CE112821EA for ; Wed, 1 Mar 2017 23:56:13 -0800 (PST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Mar 2017 23:56:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,230,1484035200"; d="scan'208";a="54860587" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga002.jf.intel.com with ESMTP; 01 Mar 2017 23:56:12 -0800 Received: from fmsmsx102.amr.corp.intel.com (10.18.124.200) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Mar 2017 23:56:12 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX102.amr.corp.intel.com (10.18.124.200) with Microsoft SMTP Server (TLS) id 14.3.248.2; Wed, 1 Mar 2017 23:56:11 -0800 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.177]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0248.002; Thu, 2 Mar 2017 15:55:53 +0800 From: "Wei, David" To: "Guo, Mang" , "edk2-devel@lists.01.org" CC: "Lu, ShifeiX A" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoard3] Enable fastboot Thread-Index: AdKTKkY3gFFKTHLCRneVWGiCAIM8ngAABRpw Date: Thu, 2 Mar 2017 07:55:52 +0000 Message-ID: <89954A0B46707A448411A627AD4EEE3468F0095F@SHSMSX101.ccr.corp.intel.com> References: <22D2C85ED001C54AA20BFE3B0E4751D1524DCDD6@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <22D2C85ED001C54AA20BFE3B0E4751D1524DCDD6@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch][edk2-platforms/devel-MinnowBoard3] Enable fastboot X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 02 Mar 2017 07:56:14 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: zwei4 Thanks, David Wei =20 -----Original Message----- From: Guo, Mang=20 Sent: Thursday, March 02, 2017 3:55 PM To: edk2-devel@lists.01.org Cc: Wei, David ; Lu, ShifeiX A Subject: [Patch][edk2-platforms/devel-MinnowBoard3] Enable fastboot Please ignore previous patch. Fixed format issue. 1. Unload UNDI if fastboot enable. 2. Optimized the FV decompressing proces= s Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../PlatformPostMemPei/PlatformInit.c | 10 +-------- .../PlatformPreMemPei/FvCallback.c | 24 ++++++++++++++----= ---- .../BroxtonPlatformPkg/PlatformDsc/Components.dsc | 10 +++++++++ Platform/BroxtonPlatformPkg/PlatformPkg.fdf | 2 +- Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc | 2 +- Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc | 2 +- 6 files changed, 30 insertions(+), 20 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPo= stMemPei/PlatformInit.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettin= gs/PlatformPostMemPei/PlatformInit.c index 6e8d4ab..0853f8f 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPe= i/PlatformInit.c @@ -48,15 +48,7 @@ static EFI_PEI_PPI_DESCRIPTOR mBoardPostMemInitSta= rtPpi[] =3D { }; =20 static EFI_PEI_PPI_DESCRIPTOR mPpiList[] =3D { - { - // - // This PPI is hard coded to be installed as SPI boot (vs. eMMC boot) - // to trigger GetFvNotifyCallback() - // - EFI_PEI_PPI_DESCRIPTOR_PPI, - &gCseSpiSelectPpiGuid, - NULL - }, + { EFI_PEI_PPI_DESCRIPTOR_PPI, &gEfiPeiMasterBootModePpiGuid, diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPr= eMemPei/FvCallback.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/= PlatformPreMemPei/FvCallback.c index 6dcdc75..91ac6f5 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /FvCallback.c +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPreMemPei= /FvCallback.c @@ -1,7 +1,7 @@ /** @file Locate and install Firmware Volume Hob's Once there is main memory. =20 - Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -277,6 +277,7 @@ ParseObbPayload ( EFI_GUID *FvName; FSP_INFO_HEADER *FspHeader; UINT32 FspSImageBase; + VOID *Memory; =20 DEBUG ((EFI_D_INFO, "Parsing and checking OBB Payload\n")); =20 @@ -370,13 +371,20 @@ ParseObbPayload ( PlatformInfo->FvMain3Base =3D (UINTN) FvHeader; PlatformInfo->FvMain3Length =3D (UINT32) (FvHeader->FvLength); } else if (!CompareGuid(FvName, &gFspSFirmwareFileSystemFvGuid)) { - PeiServicesInstallFvInfoPpi ( - NULL, - FvHeader, - (UINT32) (FvHeader->FvLength), - NULL, - NULL - ); + Memory =3D AllocatePages (EFI_SIZE_TO_PAGES ((UINT32) (FvHeader->FvL= ength))); + if(Memory !=3DNULL) { + CopyMem (Memory, FvHeader, (UINT32) (FvHeader->FvLength)); + PeiServicesInstallFvInfoPpi ( + NULL, + (VOID *) Memory, + (UINT32) (FvHeader->FvLength), + NULL, + NULL + ); + } else { + ASSERT (FALSE); + } + }//if/else S3 =20 FvHeader =3D (EFI_FIRMWARE_VOLUME_HEADER *) ((UINTN) FvHeader + (UINTN= ) FvHeader->FvLength); diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platf= orm/BroxtonPlatformPkg/PlatformDsc/Components.dsc index d3be2da..d39ec6d 100644 --- a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc @@ -213,6 +213,16 @@ $(PLATFORM_PACKAGE_COMMON)/SampleCode/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.in= f !endif =20 + + PerformancePkg/Dp_App/Dp.inf { + + !if $(PERFORMANCE_ENABLE) =3D=3D TRUE + PerformanceLib|MdeModulePkg/Library/DxePerformanceLib/DxePerformanceLi= b.inf + TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTsc= TimerLib.inf + !endif + } + + !if $(TPM12_ENABLE) =3D=3D TRUE SecurityPkg/Tcg/TcgDxe/TcgDxe.inf SecurityPkg/Tcg/TcgSmm/TcgSmm.inf diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf b/Platform/Broxton= PlatformPkg/PlatformPkg.fdf index 2476407..c117245 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.fdf +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.fdf @@ -670,7 +670,7 @@ APRIORI DXE { # LAN/Network # !if $(NETWORK_ENABLE) =3D=3D TRUE - FILE DRIVER =3D 22DE1691-D65D-456a-993E-A253DD1F308C { + FILE DRIVER =3D 2E561D56-4863-44F7-960D-EF2D7F2D35BB { SECTION PE32 =3D BroxtonPlatformPkg/Common/Binaries/UNDI/I210PcieUndiD= xe/E7320X3.EFI SECTION UI =3D "UNDI" } diff --git a/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc b/Platform/Bro= xtonPlatformPkg/PlatformPkgIA32.dsc index 083e32b..6109a76 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformPkgIA32.dsc @@ -99,7 +99,7 @@ !else PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLi= b.inf !endif - TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTi= merLib.inf + TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/PeiTscTi= merLib.inf !endif =20 [LibraryClasses.IA32.DXE_DRIVER] diff --git a/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc b/Platform/Brox= tonPlatformPkg/PlatformPkgX64.dsc index 19b8f34..cdd91b3 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc +++ b/Platform/BroxtonPlatformPkg/PlatformPkgX64.dsc @@ -99,7 +99,7 @@ !else PerformanceLib|MdeModulePkg/Library/PeiPerformanceLib/PeiPerformanceLi= b.inf !endif - TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTi= merLib.inf + TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/PeiTscTi= merLib.inf !endif =20 [LibraryClasses.IA32.DXE_DRIVER] --=20 2.10.1.windows.1