From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=david.wei@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 37313210D93B3 for ; Thu, 21 Jun 2018 20:33:43 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Jun 2018 20:33:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,255,1526367600"; d="scan'208";a="66691274" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga001.jf.intel.com with ESMTP; 21 Jun 2018 20:33:42 -0700 Received: from fmsmsx120.amr.corp.intel.com (10.18.124.208) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Jun 2018 20:33:42 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx120.amr.corp.intel.com (10.18.124.208) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Jun 2018 20:33:42 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.82]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.70]) with mapi id 14.03.0319.002; Fri, 22 Jun 2018 11:33:40 +0800 From: "Wei, David" To: "Guo, Mang" , "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set BIOS LOCK Thread-Index: AdQJ2CnROeKOsd10Q1y/o1pIbnZfNwAAZHbQ Date: Fri, 22 Jun 2018 03:33:39 +0000 Message-ID: <89954A0B46707A448411A627AD4EEE34690C6EC3@SHSMSX101.ccr.corp.intel.com> References: <22D2C85ED001C54AA20BFE3B0E4751D152692FF9@SHSMSX103.ccr.corp.intel.com> In-Reply-To: <22D2C85ED001C54AA20BFE3B0E4751D152692FF9@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMDBmZWEzYzItZGY1ZC00ZmFkLWJiNmEtYzNmNGYyZWY3YTNkIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiWFVsakJJTXk3YWJDK3B3cm1DS3FJZDNPSmxhalYrTzdWdm5DK3ludDZMYU15c0U4aE9uNE1TZVFMclkybmxneCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set BIOS LOCK X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Jun 2018 03:33:43 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: david.wei@intel.com Thanks, David Wei Intel SSG/STO/UEFI BIOS =20 -----Original Message----- From: Guo, Mang=20 Sent: Friday, June 22, 2018 11:22 AM To: edk2-devel@lists.01.org Cc: Wei, David Subject: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set BIOS LOC= K Set BIOS LOCK default value from 'disable' to 'enable' to meet security req= uirement. Cc: zwei4 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang --- .../Common/PlatformSettings/PlatformSetupDxe/SouthClusterConfig.vfi | 6 ++= +--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/SouthClusterConfig.vfi b/Platform/BroxtonPlatformPkg/Common/Platform= Settings/PlatformSetupDxe/SouthClusterConfig.vfi index c6e9410..9d2c978 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SouthClusterConfig.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SouthClusterConfig.vfi @@ -1,7 +1,7 @@ // /** @file // South Cluster Setup formset. // -// Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.
+// Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved.
// // This program and the accompanying materials // are licensed and made available under the terms and conditions of the = BSD License @@ -138,8 +138,8 @@ form formid =3D MISC_OPTIONS_FORM_ID, oneof varid =3D Setup.ScBiosLock, prompt =3D STRING_TOKEN(STR_PCH_BLE_PROMPT), help =3D STRING_TOKEN(STR_PCH_BLE_HELP), - option text =3D STRING_TOKEN(STR_DISABLE), value =3D 0, flags =3D DEFA= ULT | MANUFACTURING | RESET_REQUIRED; - option text =3D STRING_TOKEN(STR_ENABLE), value =3D 1, flags =3D RESET= _REQUIRED; + option text =3D STRING_TOKEN(STR_DISABLE), value =3D 0, flags =3D RESE= T_REQUIRED; + option text =3D STRING_TOKEN(STR_ENABLE), value =3D 1, flags =3D DEFAU= LT | MANUFACTURING | RESET_REQUIRED; endoneof; oneof varid =3D Setup.RtcLock, prompt =3D STRING_TOKEN(STR_PCH_RTC_LOCK_PROMPT), --=20 2.10.1.windows.1