From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.31; helo=mga06.intel.com; envelope-from=david.wei@intel.com; receiver=edk2-devel@lists.01.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9498621157FE3 for ; Wed, 26 Sep 2018 07:30:27 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Sep 2018 07:30:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,306,1534834800"; d="scan'208,217";a="93434568" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by fmsmga001.fm.intel.com with ESMTP; 26 Sep 2018 07:30:24 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 26 Sep 2018 07:30:23 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.220]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.27]) with mapi id 14.03.0319.002; Wed, 26 Sep 2018 22:30:21 +0800 From: "Wei, David" To: "Steele, Kelly" , "edk2-devel@lists.01.org" Thread-Topic: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Update platform ID Thread-Index: AdRR2JACyNYr6XrsQ2eoxK7IhLbkQwDzLRTw Date: Wed, 26 Sep 2018 14:30:20 +0000 Message-ID: <89954A0B46707A448411A627AD4EEE346911E16E@SHSMSX101.ccr.corp.intel.com> References: In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzVlOGZlYWItNGFjMy00ZTMyLTkxMzItMmIzNTkzZjQ1Y2Y4IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiTkh1ZkNXMjc3M3EzeFlxTVkyNFc3ZjcwblFyditDdm1YR1B4RjI3WlVpMDhMc1NxMzJuR0RrWTVWT0M5SzdvWiJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Re: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Update platform ID X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 26 Sep 2018 14:30:27 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: David Wei > Thanks, David Wei Intel SSG/STO/UEFI BIOS From: Steele, Kelly Sent: Saturday, September 22, 2018 2:27 AM To: edk2-devel@lists.01.org Cc: Wei, David ; Guo, Mang Subject: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Update plat= form ID >>From 35666684ac675af11249d5e9aa525288ff5b8efa Mon Sep 17 00:00:00 2001 From: Kelly Steele > Date: Fri, 21 Sep 2018 11:23:08 -0700 Subject: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Update platform ID Since no platform uses PMIC_PWRGOOD to determine platform ID, I removed it from the platform ID code. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Kelly Steele > --- .../BoardInitPreMem/BoardInitMiscs.c | 2 +- .../BoardInitPreMem/PlatformId.c | 174 +++++++++++-------= --- .../BoardInitPreMem/PlatformId.h | 16 +- 3 files changed, 99 insertions(+), 93 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInit= PreMem/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Mod= ule/BoardInitPreMem/BoardInitMiscs.c index 8d8db8131e..6cd4bdf18f 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= BoardInitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= BoardInitMiscs.c @@ -166,7 +166,7 @@ Mb3MUpdateFspmUpd ( // // Translate into Memory Type // - MemoryType =3D (UINT8) ((HwconfStraps & HWCONF_MEMORY_MASK) >> HWCONF_ME= MORY); + MemoryType =3D (UINT8) ((HwconfStraps & MB3M_HWCONF_MEMORY_MASK) >> MB3M= _HWCONF_MEMORY); if (MemoryType =3D=3D 0) { DEBUG ((DEBUG_INFO, "**** MB3 Module - SPD based memory init requested= , but converted into Memory Profile type #4!\n")); MemoryType =3D 4; // LPDDR4 16Gbit 4 channels diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInit= PreMem/PlatformId.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/= BoardInitPreMem/PlatformId.c index f81a1bffcf..558627cdbf 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= PlatformId.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= PlatformId.c @@ -19,96 +19,102 @@ #include #include "PlatformId.h" -PAD_ID_INFO gRawBoardIdPadInfo[] =3D { +PAD_ID_INFO gMB3MRawBoardIdPadInfo[] =3D { {NW_PMIC_STDBY, EnPd, P_20K_L}, // bit 0 {NW_GPIO_213, EnPd, P_20K_L}, // bit 1 {NW_PMIC_RESET_B, EnPd, P_20K_L}, // bit 2 - {NW_PMIC_PWRGOOD, EnPd, P_20K_L}, // bit 3 - {N_GPIO_27, EnPd, P_20K_L}, // bit 4 - {N_GPIO_72, EnPd, P_20K_L}, // bit 5 - {N_GPIO_64, EnPd, P_20K_L} // bit 6 + {N_GPIO_27, EnPd, P_20K_L}, // bit 3 + {N_GPIO_72, EnPd, P_20K_L}, // bit 4 + {N_GPIO_64, EnPd, P_20K_L} // bit 5 }; // -// MinnowBoard v3 =3D 0x00000017 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// NW_PMIC_STDBY - BOARD_ID0 - 10k PU -> 1 xxxxxxx1 -// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x -// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx -// NW_PMIC_PWRGOOD - - 10k PD -> 0 xxxx0xxx -// N_GPIO_27 - BOARD_ID3 - 10k PU -> 1 xxx1xxxx -// N_GPIO_72 - - Float -> 0 xx0xxxxx -// N_GPIO_64 - - Float -> 0 x0xxxxxx -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 00010111b - -// Benson Glacier =3D 0x00000024 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// NW_PMIC_STDBY - BOARD_ID0 - 10k PD -> 0 xxxxxxx0 -// NW_GPIO_213 - BOARD_ID1 - 10k PD -> 0 xxxxxx0x -// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx -// NW_PMIC_PWRGOOD - - Float -> 0 xxxx0xxx -// N_GPIO_27 - - Float -> 0 xxx0xxxx -// N_GPIO_72 - BOARD_ID3 - 10k PU -> 1 xx1xxxxx -// N_GPIO_64 - - Float -> 0 x0xxxxxx -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 00100100b - -// Aurora Glacier =3D 0x00000026 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// NW_PMIC_STDBY - BOARD_ID0 - 10k PD -> 0 xxxxxxx0 -// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x -// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx -// NW_PMIC_PWRGOOD - - Float -> 0 xxxx0xxx -// N_GPIO_27 - - Float -> 0 xxx0xxxx -// N_GPIO_72 - BOARD_ID3 - 10k PU -> 1 xx1xxxxx -// N_GPIO_64 - - Float -> 0 x0xxxxxx -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 00100110b - -// MinnowBoard v3 Module =3D 0x00000040 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// NW_PMIC_STDBY - - Float -> 0 xxxxxxx0 -// NW_GPIO_213 - - Float -> 0 xxxxxx0x -// NW_PMIC_RESET_B - - Float -> 0 xxxxx0xx -// NW_PMIC_PWRGOOD - - Float -> 0 xxxx0xxx -// N_GPIO_27 - - Float -> 0 xxx0xxxx -// N_GPIO_72 - - Float -> 0 xx0xxxxx -// N_GPIO_64 - - 10k PU -> 1 x1xxxxxx -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 01000000b - -// LeafHill =3D 0x00000047 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// NW_PMIC_STDBY - BOARD_ID0 - 10k PU -> 1 xxxxxxx1 -// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x -// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx -// NW_PMIC_PWRGOOD - BOARD_ID3 - 10k PD -> 0 xxxx0xxx -// N_GPIO_27 - - Float -> 0 xxx0xxxx -// N_GPIO_72 - - Float -> 0 xx0xxxxx -// N_GPIO_64 - - 0k PU -> 1 x1xxxxxx -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 01000111b - -TRANSLATE_ID_INFO gBoardIdInfo[] =3D { - {0x00000017, BOARD_ID_MINNOW, "Minnow Board v3"}, - {0x00000024, BOARD_ID_BENSON, "Benson Glacier"}, - {0x00000026, BOARD_ID_AURORA, "Aurora Glacier"}, - {0x00000040, BOARD_ID_MINNOW_MODULE, "Minnow Board v3 Module"}, - {0x00000047, BOARD_ID_LFH_CRB, "Leafhill"}, +// MinnowBoard v3 =3D 0x0000000F +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - BOARD_ID0 - 10k PU -> 1 xxxxxxx1 +// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x +// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx +// N_GPIO_27 - BOARD_ID3 - 10k PU -> 1 xxxx1xxx +// N_GPIO_72 - GP_CAMERA_GP72 - Float -> 0 xxx0xxxx +// N_GPIO_64 - GP_CAMERA_GP64 - Float -> 0 xx0xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00001111b + +// UpSquared =3D 0x00000010/11 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - DDR_CH - Unknown -> 1 xxxxxxx? +// NW_GPIO_213 - mSATA_PCIe_SEL_N - Float -> 0 xxxxxx0x +// NW_PMIC_RESET_B - NC - Float -> 0 xxxxx0xx +// N_GPIO_27 - FPGA_fw_reload - Float -> 0 xxxx0xxx +// N_GPIO_72 - GP_CAMERASB10 - 1K PU -> 1 xxx1xxxx +// N_GPIO_64 - GP_CAMERASB2 - Float -> 0 xx0xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 0001000?b + +// Benson Glacier =3D 0x00000014 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - BOARD_ID0 - 10k PD -> 0 xxxxxxx0 +// NW_GPIO_213 - BOARD_ID1 - 10k PD -> 0 xxxxxx0x +// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx +// N_GPIO_27 - NC - Float -> 0 xxxx0xxx +// N_GPIO_72 - BOARD_ID3 - 10k PU -> 1 xxx1xxxx +// N_GPIO_64 - NC - Float -> 0 xx0xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00010100b + +// Aurora Glacier =3D 0x00000016 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - BOARD_ID0 - 10k PD -> 0 xxxxxxx0 +// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x +// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx +// N_GPIO_27 - NC - Float -> 0 xxxx0xxx +// N_GPIO_72 - BOARD_ID3 - 10k PU -> 1 xxx1xxxx +// N_GPIO_64 - NC - Float -> 0 xx0xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00010110b + +// MinnowBoard v3 Module =3D 0x00000020 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - NC - Float -> 0 xxxxxxx0 +// NW_GPIO_213 - NC - Float -> 0 xxxxxx0x +// NW_PMIC_RESET_B - NC - Float -> 0 xxxxx0xx +// N_GPIO_27 - NC - Float -> 0 xxxx0xxx +// N_GPIO_72 - NC - Float -> 0 xxx0xxxx +// N_GPIO_64 - CAM0_RST# - 10k PU -> 1 xx1xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00100000b + +// LeafHill =3D 0x00000027 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// NW_PMIC_STDBY - BOARD_ID0 - 10k PU -> 1 xxxxxxx1 +// NW_GPIO_213 - BOARD_ID1 - 10k PU -> 1 xxxxxx1x +// NW_PMIC_RESET_B - BOARD_ID2 - 10k PU -> 1 xxxxx1xx +// N_GPIO_27 - SOC_GPIO27 - Float -> 0 xxxx0xxx +// N_GPIO_72 - NC - Float -> 0 xxx0xxxx +// N_GPIO_64 - MCSI1_XSHUTDN - 0k PU -> 1 xx1xxxxx +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00100111b + +TRANSLATE_ID_INFO gMB3MBoardIdInfo[] =3D { + {0x0000000F, BOARD_ID_MINNOW, "Minnow Board v3"}, + {0x00000010, BOARD_ID_UP2, "Up Squared"}, + {0x00000011, BOARD_ID_UP2, "Up Squared"}, + {0x00000014, BOARD_ID_BENSON, "Benson Glacier"}, + {0x00000016, BOARD_ID_AURORA, "Aurora Glacier"}, + {0x00000020, BOARD_ID_MINNOW_MODULE, "Minnow Board v3 Module"}, + {0x00000027, BOARD_ID_LFH_CRB, "Leafhill"}, {0xFFFFFFFF, BOARD_ID_APL_UNKNOWN, "Unknown Board ID"} }; -PAD_ID_INFO gRawFabIdPadInfo[] =3D { +PAD_ID_INFO gMB3MRawFabIdPadInfo[] =3D { {SW_GPIO_207, EnPd, P_20K_L} // bit 0 - GPIO 207 }; // MinnowBoard v3 Module, Fab A =3D 0x00000000 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// SW_GPIO_207 - Float -> 0 xxxxxxx0 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 00000000b +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// SW_GPIO_207 - NC - Float -> 0 xxxxxxx0 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00000000b // MinnowBoard v3 Module, Fab C =3D 0x00000001 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -// SW_GPIO_207 - 10k PU -> 1 xxxxxxx1 -//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D 00000001b +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +// SW_GPIO_207 - PCIE_WAKE_LAN1_1V8# - 10k PU -> 1 xxxxxxx1 +//=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D 00000001b -TRANSLATE_ID_INFO gFabIdInfo[] =3D { +TRANSLATE_ID_INFO gMB3MFabIdInfo[] =3D { {0x00000000, FAB_ID_A, "Fab ID A"}, {0x00000001, FAB_ID_C, "Fab ID C"}, {0xFFFFFFFF, UNKNOWN_FAB, "Unknown Fab ID"} @@ -199,16 +205,16 @@ Minnow3ModuleGetCommonBoardId ( // // Get BoardId // - RawBoardId =3D Minnow3ModuleGetId (gRawBoardIdPadInfo, sizeof (gRawBoard= IdPadInfo) / sizeof (gRawBoardIdPadInfo[0])); + RawBoardId =3D Minnow3ModuleGetId (gMB3MRawBoardIdPadInfo, sizeof (gMB3M= RawBoardIdPadInfo) / sizeof (gMB3MRawBoardIdPadInfo[0])); DEBUG ((DEBUG_INFO, "%a(#%3d) - Raw BoardId: %02X\n", __FUNCTION__, __LI= NE__, RawBoardId)); // // Convert from a 32-bit raw BoardId to an 8-bit one. // - for (index =3D 0; index < sizeof (gBoardIdInfo) / sizeof (gBoardIdInfo[0= ]); index++) { - if ((gBoardIdInfo[index].RawId =3D=3D RawBoardId) || (gBoardIdInfo[ind= ex].RawId =3D=3D 0xFFFFFFFF)) { - BoardId =3D gBoardIdInfo[index].TranslatedId; - DEBUG ((DEBUG_INFO, "%a(#%3d) - BoardId: %02X =3D %a\n", __FUNCTION_= _, __LINE__, BoardId, gBoardIdInfo[index].Description)); + for (index =3D 0; index < sizeof (gMB3MBoardIdInfo) / sizeof (gMB3MBoard= IdInfo[0]); index++) { + if ((gMB3MBoardIdInfo[index].RawId =3D=3D RawBoardId) || (gMB3MBoardId= Info[index].RawId =3D=3D 0xFFFFFFFF)) { + BoardId =3D gMB3MBoardIdInfo[index].TranslatedId; + DEBUG ((DEBUG_INFO, "%a(#%3d) - BoardId: %02X =3D %a\n", __FUNCTION_= _, __LINE__, BoardId, gMB3MBoardIdInfo[index].Description)); break; } } @@ -230,16 +236,16 @@ Minnow3ModuleGetCommonFabId ( // // Get FabId // - RawFabId =3D Minnow3ModuleGetId (gRawFabIdPadInfo, sizeof (gRawFabIdPadI= nfo) / sizeof (gRawFabIdPadInfo[0])); + RawFabId =3D Minnow3ModuleGetId (gMB3MRawFabIdPadInfo, sizeof (gMB3MRawF= abIdPadInfo) / sizeof (gMB3MRawFabIdPadInfo[0])); DEBUG ((DEBUG_INFO, "%a(#%3d) - Raw FabId: %02X\n", __FUNCTION__, __LINE= __, RawFabId)); // // Convert from a 32-bit raw FabId to an 8-bit one. // - for (index =3D 0; index < sizeof (gFabIdInfo) / sizeof (gFabIdInfo[0]); = index++) { - if ((gFabIdInfo[index].RawId =3D=3D RawFabId) || (gFabIdInfo[index].Ra= wId =3D=3D 0xFFFFFFFF)) { - FabId =3D gFabIdInfo[index].TranslatedId; - DEBUG ((DEBUG_INFO, "%a(#%3d) - FabId: %02X =3D %a\n", __FUNCTION__,= __LINE__, FabId, gFabIdInfo[index].Description)); + for (index =3D 0; index < sizeof (gMB3MFabIdInfo) / sizeof (gMB3MFabIdIn= fo[0]); index++) { + if ((gMB3MFabIdInfo[index].RawId =3D=3D RawFabId) || (gMB3MFabIdInfo[i= ndex].RawId =3D=3D 0xFFFFFFFF)) { + FabId =3D gMB3MFabIdInfo[index].TranslatedId; + DEBUG ((DEBUG_INFO, "%a(#%3d) - FabId: %02X =3D %a\n", __FUNCTION__,= __LINE__, FabId, gMB3MFabIdInfo[index].Description)); break; } } diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInit= PreMem/PlatformId.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/= BoardInitPreMem/PlatformId.h index fbaac3504c..76e4546f36 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= PlatformId.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPreMem/= PlatformId.h @@ -21,14 +21,14 @@ // // HWCONF defines. Low =3D off & high =3D on // -#define HWCONF_COMx BIT0 -#define HWCONF_ECC BIT1 -//#define HWCONF_COMx BIT2 -//#define HWCONF_COMx BIT3 -#define HWCONF_USB3 BIT4 -#define HWCONF_CAMERA BIT5 -#define HWCONF_MEMORY 6 -#define HWCONF_MEMORY_MASK (BIT6 | BIT7 | BIT8) +#define MB3M_HWCONF_COMx BIT0 +#define MB3M_HWCONF_ECC BIT1 +//#define MB3M_HWCONF_COMx BIT2 +//#define MB3M_HWCONF_COMx BIT3 +#define MB3M_HWCONF_USB3 BIT4 +#define MB3M_HWCONF_CAMERA BIT5 +#define MB3M_HWCONF_MEMORY 6 +#define MB3M_HWCONF_MEMORY_MASK (BIT6 | BIT7 | BIT8) typedef struct { UINT32 CommAndOffset; -- 2.11.0.windows.1