From: "Wei, David" <david.wei@intel.com>
To: "Guo, Mang" <mang.guo@intel.com>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>
Subject: Re: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set PcdPciePort3Enable
Date: Thu, 27 Sep 2018 03:03:48 +0000 [thread overview]
Message-ID: <89954A0B46707A448411A627AD4EEE346911E3FF@SHSMSX101.ccr.corp.intel.com> (raw)
In-Reply-To: <22D2C85ED001C54AA20BFE3B0E4751D1526FBD0C@SHSMSX103.ccr.corp.intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
Thanks,
David Wei
Intel SSG/STO/UEFI BIOS
-----Original Message-----
From: Guo, Mang
Sent: Wednesday, September 26, 2018 4:36 PM
To: edk2-devel@lists.01.org
Cc: Wei, David <david.wei@intel.com>
Subject: [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set PcdPciePort3Enable
Use system setup variable to set PcdPciePort3Enable.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
---
.../Board/AuroraGlacier/BoardInitPostMem/BoardInit.c | 5 +++++
.../Board/AuroraGlacier/BoardInitPostMem/BoardInitPostMem.inf | 1 +
.../Board/BensonGlacier/BoardInitPostMem/BoardInit.c | 5 +++++
.../Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf | 1 +
.../BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c | 7 ++++++-
.../Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf | 1 +
.../Board/MinnowBoard3/BoardInitPostMem/BoardInit.c | 6 ++++++
.../Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf | 1 +
.../Board/MinnowBoard3Module/BoardInitPostMem/BoardInit.c | 5 +++++
.../Board/MinnowBoard3Module/BoardInitPostMem/BoardInitPostMem.inf | 1 +
10 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInit.c
index ce98086..c61ac86 100644
--- a/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInit.c
@@ -146,6 +146,11 @@ AuroraGlacierPostMemInitCallback (
PcdSet8(HdaEndpointI2sCaptureVirtualBusId, 1); // I2S2
//
+ // Set PcdPciePort3Enable
+ //
+ PcdSetBool(PcdPciePort3Enable, SystemConfiguration.PcieRootPortEn[3]);
+
+ //
// Add init steps here
//
//
diff --git a/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInitPostMem.inf
index c619332..32aa1da 100644
--- a/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInitPostMem.inf
+++ b/Platform/BroxtonPlatformPkg/Board/AuroraGlacier/BoardInitPostMem/BoardInitPostMem.inf
@@ -74,6 +74,7 @@
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderSKPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderHPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sCaptureVirtualBusId
+ gPlatformModuleTokenSpaceGuid.PcdPciePort3Enable
[Guids]
gEfiPlatformInfoGuid
diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c
index 856d773..c1c4dcd 100644
--- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c
@@ -146,6 +146,11 @@ BensonGlacierPostMemInitCallback (
PcdSet8(HdaEndpointI2sCaptureVirtualBusId, 1); // I2S2
//
+ // Set PcdPciePort3Enable
+ //
+ PcdSetBool(PcdPciePort3Enable, SystemConfiguration.PcieRootPortEn[3]);
+
+ //
// Add init steps here
//
//
diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf
index 01d7f27..7dbfed9 100644
--- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf
+++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf
@@ -74,6 +74,7 @@
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderSKPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderHPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sCaptureVirtualBusId
+ gPlatformModuleTokenSpaceGuid.PcdPciePort3Enable
[Guids]
gEfiPlatformInfoGuid
diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c
index 729b15f..5f509a3 100644
--- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c
@@ -151,7 +151,12 @@ LeafHillPostMemInitCallback (
PcdSet8(HdaEndpointI2sRenderSKPVirtualBusId, 5); //I2S6
PcdSet8(HdaEndpointI2sRenderHPVirtualBusId, 5); //I2S6
PcdSet8(HdaEndpointI2sCaptureVirtualBusId, 5); //I2S6
-
+
+ //
+ // Set PcdPciePort3Enable
+ //
+ PcdSetBool(PcdPciePort3Enable, SystemConfiguration.PcieRootPortEn[3]);
+
//
// Add init steps here
//
diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf
index 46a6f4b..904b491 100644
--- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf
+++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf
@@ -74,6 +74,7 @@
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderSKPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderHPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sCaptureVirtualBusId
+ gPlatformModuleTokenSpaceGuid.PcdPciePort3Enable
[Guids]
gEfiPlatformInfoGuid
diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c
index 3323ee8..d2ed286 100644
--- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInit.c
@@ -157,6 +157,12 @@ MinnowBoard3PostMemInitCallback (
PcdSet8(HdaEndpointI2sRenderHPVirtualBusId, 0); // I2S1
PcdSet8(HdaEndpointI2sCaptureVirtualBusId, 0); // I2S1
+
+ //
+ // Set PcdPciePort3Enable
+ //
+ PcdSetBool(PcdPciePort3Enable, SystemConfiguration.PcieRootPortEn[3]);
+
//
// Add init steps here
//
diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf
index 15d7f46..275a7f4 100644
--- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf
+++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf
@@ -70,6 +70,7 @@
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderSKPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sRenderHPVirtualBusId
gEfiBxtTokenSpaceGuid.HdaEndpointI2sCaptureVirtualBusId
+ gPlatformModuleTokenSpaceGuid.PcdPciePort3Enable
[Guids]
gEfiPlatformInfoGuid
diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInit.c
index 445897a..6d5817a 100644
--- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInit.c
+++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInit.c
@@ -127,6 +127,11 @@ MinnowBoard3ModulePostMemInitCallback (
PcdSet8 (PcdeMMCHostMaxSpeed, (UINT8) (SystemConfiguration.ScceMMCHostMaxSpeed));
//
+ // Set PcdPciePort3Enable
+ //
+ PcdSetBool(PcdPciePort3Enable, SystemConfiguration.PcieRootPortEn[3]);
+
+ //
// Add init steps here
//
//
diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInitPostMem.inf
index 67708d2..d5b0604 100644
--- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInitPostMem.inf
+++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3Module/BoardInitPostMem/BoardInitPostMem.inf
@@ -66,6 +66,7 @@
gPlatformModuleTokenSpaceGuid.PcdOemLogoFileGuid
gPlatformModuleTokenSpaceGuid.PcdTianoCoreLogoFileGuid
gPlatformModuleTokenSpaceGuid.PcdeMMCHostMaxSpeed
+ gPlatformModuleTokenSpaceGuid.PcdPciePort3Enable
[Guids]
gEfiPlatformInfoGuid
--
2.10.1.windows.1
prev parent reply other threads:[~2018-09-27 3:06 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-26 8:35 [Patch][edk2-platforms/devel-IntelAtomProcessorE3900] Set PcdPciePort3Enable Guo, Mang
2018-09-27 3:03 ` Wei, David [this message]
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