* [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after GPIO init
@ 2018-09-21 18:28 Steele, Kelly
2018-09-27 3:08 ` Wei, David
0 siblings, 1 reply; 2+ messages in thread
From: Steele, Kelly @ 2018-09-21 18:28 UTC (permalink / raw)
To: edk2-devel@lists.01.org; +Cc: Wei, David, Guo, Mang
>From b4b50a16977879f664fe93c1fd8355ac5df012c3 Mon Sep 17 00:00:00 2001
From: Kelly Steele <kelly.steele@intel.com>
Date: Fri, 21 Sep 2018 11:20:56 -0700
Subject: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after
GPIO init
Need to prevent modifying the SoC PADs after GPIO init in the I2C code
so I added a PCD flag for this purpose. While in the I2C library, I
cleaned it up. This still leaves a brief window from after GPIO init
and when the flag gets set for the I2C library to modify the SoC I2C
PADs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kelly Steele <kelly.steele@intel.com>
---
.../PlatformPostMemPei/PlatformInit.c | 16 +-
.../PlatformPostMemPei/PlatformPostMemPei.inf | 5 +-
Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec | 7 +-
.../SouthCluster/Include/Library/I2cLib.h | 10 +-
.../SouthCluster/Include/ScRegs/RegsI2c.h | 2 +-
.../SouthCluster/Library/I2cLib/I2cLib.c | 277 +++++++++++++--------
.../SouthCluster/Library/I2cLib/I2cLib.h | 11 +-
.../SouthCluster/Library/I2cLib/I2cLib.inf | 1 +
8 files changed, 202 insertions(+), 127 deletions(-)
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
index acaaebbfbb..eceecdf730 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
@@ -280,7 +280,7 @@ BXTPolicyInit (
PeiGetSectionFromFv (PeiLogoGuid, &Buffer, &Size);
if (Buffer == NULL) {
- DEBUG (( DEBUG_ERROR, "Could not locate PeiLogo"));
+ DEBUG ((DEBUG_ERROR, "Could not locate PeiLogo"));
}
//
@@ -290,7 +290,7 @@ BXTPolicyInit (
PeiGetSectionFromFv (VbtGuid, &Buffer, &Size);
if (Buffer == NULL) {
- DEBUG (( DEBUG_ERROR, "Could not locate VBT"));
+ DEBUG ((DEBUG_ERROR, "Could not locate VBT"));
}
@@ -330,7 +330,7 @@ ConfigurePmicIMON (
StallCount = 0;
while (StallCount < 1000) {
- Data = MmioRead32 (MchBar + R_BIOS_MAILBOX_INTERFACE);
+ Data = MmioRead32 (MchBar + R_BIOS_MAILBOX_INTERFACE);
if ((Data & BIT31) == BIT31) {
MicroSecondDelay (1);
} else {
@@ -355,7 +355,7 @@ ConfigurePmicIMON (
if ((PkgPwrSKU & 0x07FFF) >= 0x0903){
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_DATA), 0xe8330466);
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_INTERFACE), 0x8000001d);
- } else {
+ } else {
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_DATA), 0xed3303b3);
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_INTERFACE), 0x8000001d);
}
@@ -412,7 +412,7 @@ PlatformInitEntryPoint (
}
PWM_Fan_Start ();
-
+
ConfigurePmicIMON();
//
@@ -422,7 +422,11 @@ PlatformInitEntryPoint (
if (BoardPostMemInitFunc != NULL) {
BoardPostMemInitFunc (PeiServices, PlatformInfo);
}
- // MultiPlatformInfoInit(PeiServices, PlatformInfo);
+
+ //
+ // Set PCD flag to indicate that we have performed the GPIO initialization
+ //
+ PcdSetBool (PcdAfterGpioInitFlag, TRUE);
//
// Set the new boot mode
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
index c7c0f4dfe3..4a50131764 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for PlatformInit module.
#
-# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -31,8 +31,8 @@
[Packages]
MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
BroxtonPlatformPkg/PlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
BroxtonSiPkg/BroxtonSiPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
@@ -123,6 +123,7 @@
gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc
gPlatformModuleTokenSpaceGuid.PcdBoardVbtFileGuid
gPlatformModuleTokenSpaceGuid.PcdOemLogoFileGuid
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag
[Depex]
gDramPolicyPpiGuid
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
index 05508a4c18..ee8124270f 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
@@ -5,7 +5,7 @@
# DSC and EDK II INF files to generate AutoGen.c and AutoGen.h files
# for the EDK II build infrastructure.
#
-# Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -241,7 +241,7 @@
gInterruptConfigGuid = { 0x097dccd0, 0xf570, 0x41f6, { 0x9d, 0xf0, 0x72, 0xe2, 0x5a, 0xbe, 0xd3, 0x98 } }
gEfiBpdtLibBp1DataGuid = { 0x7a4ecf02, 0xa1cf, 0x4e42, { 0xb6, 0x33, 0xfe, 0x95, 0x54, 0xbb, 0x60, 0xf8 } }
gEfiBpdtLibBp2DataGuid = { 0x75b0886e, 0xcd6a, 0x469f, { 0xae, 0x0b, 0x8c, 0xed, 0x90, 0x33, 0xd1, 0x99 } }
-
+
gAcpiDmarTableFileGuid = { 0x6767abfe, 0x27d2, 0x41b3, { 0xa0, 0x84, 0xb8, 0xa8, 0x98, 0x24, 0xd3, 0x5a } }
[Includes.common]
@@ -334,7 +334,8 @@
gEfiBxtTokenSpaceGuid.PcdSetCoreCount|0|UINT32|0x10000223
gEfiBxtTokenSpaceGuid.PcdVtdGfxBaseAddress|0xFED64000|UINT32|0x10000224
gSiPkgTokenSpaceGuid.PcdForceVolatileVariable|FALSE|BOOLEAN|0x30000012
-
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag|FALSE|BOOLEAN|0x30000013
+
## I2S Audio Configuration
## Blue Tooth Render
gEfiBxtTokenSpaceGuid.HdaEndpointBtRenderVirtualBusId|0x0F|UINT8|0x80000001
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
index 1c715d558e..8aa7e22fa3 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
@@ -28,7 +28,8 @@
#define I2C_ROUTINE_DELAY 10
#define INVALID_I2C_ADDRESS 0xFF
#define MAX_I2C_ADDRESS 0x7F
-#define MAX_I2C_BUS 7
+#define MAX_I2C_BUS 8
+#define I2C_SMBUS_BUS MAX_I2C_BUS
////
@@ -43,6 +44,13 @@ typedef enum {
////
+//// Externs
+////
+extern BOOLEAN gI2cDebugFlag;
+extern BOOLEAN gI2cQuietFlag;
+
+
+////
//// Functions
////
//
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
index 8a7463b538..17107b80b2 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
@@ -1,7 +1,7 @@
/** @file
Register names for I2C device.
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
index b7ecaca302..5691694d81 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
@@ -18,7 +18,7 @@
//
// List of I2C controllers
//
-I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
+I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[MAX_I2C_BUS + 1] = {
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C0, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*0), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*0) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C1, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*1), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*1) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C2, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*2), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*2) + LPSS_I2C_TMP_BAR1_OFFSET},
@@ -26,6 +26,7 @@ I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C4, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*4), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*4) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C5, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*5), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*5) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C6, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*6), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*6) + LPSS_I2C_TMP_BAR1_OFFSET},
+ {0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C7, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C7, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7) + LPSS_I2C_TMP_BAR1_OFFSET}
};
#define I2C_LPSS_PCI_DEVICE_NUMBER (sizeof (mI2cLpssPciDeviceList) / sizeof (I2C_LPSS_PCI_DEVICE_INFO))
@@ -33,7 +34,7 @@ I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
//
// List of I2C controller clock values
//
-LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
+LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[MAX_I2C_BUS + 1] = {
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
@@ -41,6 +42,7 @@ LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
{0x244, 0x2DA, 0x1E, 0x50, 0x06, 0x13},
{0x244, 0x2D0, 0x69, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x69, 0xC8, 0x06, 0x13},
+ {0x244, 0x2D0, 0x70, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x70, 0xC8, 0x06, 0x13}
};
#define LPSS_I2C_CLOCK_SCL_INFO_NUMBER (sizeof (mLPSS_I2C_CLOCK_SCL_INFO) / sizeof (LPSS_I2C_CLOCK_SCL_INFO))
@@ -48,26 +50,53 @@ LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
//
// List of I2C controller PAD settings
//
-BXT_GPIO_PAD_INIT mI2C_LPSS_PAD_INFO[] = {
- BXT_GPIO_PAD_CONF (L"GPIO_124 LPSS_I2C0_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0000, WEST),
+BXT_GPIO_PAD_INIT mI2C_LPSS_PAD_INFO[(MAX_I2C_BUS + 1) * 2] = {
+ BXT_GPIO_PAD_CONF (L"GPIO_124 LPSS_I2C0_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0000, WEST), // LPSS I2C0
BXT_GPIO_PAD_CONF (L"GPIO_125 LPSS_I2C0_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0008, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_126 LPSS_I2C1_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0010, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_126 LPSS_I2C1_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0010, WEST), // LPSS I2C1
BXT_GPIO_PAD_CONF (L"GPIO_127 LPSS_I2C1_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0018, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_128 LPSS_I2C2_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0020, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_128 LPSS_I2C2_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0020, WEST), // LPSS I2C2
BXT_GPIO_PAD_CONF (L"GPIO_129 LPSS_I2C2_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0028, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_130 LPSS_I2C3_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0030, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_130 LPSS_I2C3_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0030, WEST), // LPSS I2C3
BXT_GPIO_PAD_CONF (L"GPIO_131 LPSS_I2C3_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0038, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_132 LPSS_I2C4_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0040, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_132 LPSS_I2C4_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0040, WEST), // LPSS I2C4
BXT_GPIO_PAD_CONF (L"GPIO_133 LPSS_I2C4_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0048, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_134 LPSS_I2C5_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0050, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_134 LPSS_I2C5_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0050, WEST), // LPSS I2C5
BXT_GPIO_PAD_CONF (L"GPIO_135 LPSS_I2C5_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0058, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_136 LPSS_I2C6_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0060, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_136 LPSS_I2C6_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0060, WEST), // LPSS I2C6
BXT_GPIO_PAD_CONF (L"GPIO_137 LPSS_I2C6_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0068, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_138 LPSS_I2C7_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0070, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_139 LPSS_I2C7_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0078, WEST)
+ BXT_GPIO_PAD_CONF (L"GPIO_138 LPSS_I2C7_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0070, WEST), // LPSS I2C7
+ BXT_GPIO_PAD_CONF (L"GPIO_139 LPSS_I2C7_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0078, WEST),
+ BXT_GPIO_PAD_CONF (L"SMB_CLK", M2, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0100, SOUTHWEST), // SMB_CLK --> LPSS I2C7
+ BXT_GPIO_PAD_CONF (L"SMB_DATA", M2, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0108, SOUTHWEST)
};
+LPSS_I2C_GPIO_MODE mModeAllowed[(MAX_I2C_BUS + 1) * 2] = {
+// Offset M1 M2
+//==========================================
+ {W_GPIO_124, TRUE, FALSE}, // LPSS I2C0 SDA
+ {W_GPIO_125, TRUE, FALSE}, // LPSS I2C0 SCL
+ {W_GPIO_126, TRUE, FALSE}, // LPSS I2C1 SDA
+ {W_GPIO_127, TRUE, FALSE}, // LPSS I2C1 SCL
+ {W_GPIO_128, TRUE, FALSE}, // LPSS I2C2 SDA
+ {W_GPIO_129, TRUE, FALSE}, // LPSS I2C2 SCL
+ {W_GPIO_130, TRUE, FALSE}, // LPSS I2C3 SDA
+ {W_GPIO_131, TRUE, FALSE}, // LPSS I2C3 SCL
+ {W_GPIO_132, TRUE, FALSE}, // LPSS I2C4 SDA
+ {W_GPIO_133, TRUE, FALSE}, // LPSS I2C4 SCL
+ {W_GPIO_134, TRUE, TRUE}, // LPSS I2C5 SDA
+ {W_GPIO_135, TRUE, TRUE}, // LPSS I2C5 SCL
+ {W_GPIO_136, TRUE, TRUE}, // LPSS I2C6 SDA
+ {W_GPIO_137, TRUE, TRUE}, // LPSS I2C6 SCL
+ {W_GPIO_138, TRUE, TRUE}, // LPSS I2C7 SDA
+ {W_GPIO_139, TRUE, TRUE}, // LPSS I2C7 SCL
+ {SW_SMB_CLK, FALSE, TRUE}, // SMBUS SCL
+ {SW_SMB_DATA, FALSE, TRUE} // SMBUS SDA
+};
+#define LPSS_I2C_GPIO_MODE_NUMBER (sizeof (mModeAllowed) / sizeof (LPSS_I2C_GPIO_MODE))
+
BOOLEAN gI2cDebugFlag = FALSE;
+BOOLEAN gI2cQuietFlag = FALSE;
////
//// Internal I2C functions
@@ -135,7 +164,7 @@ I2cDisable (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -177,7 +206,7 @@ I2cEnable (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -290,19 +319,39 @@ I2cGetTxFifo (
}
EFI_STATUS
+I2cVerifyPad (
+ IN UINT32 PadOffset
+ )
+{
+ UINT8 index;
+ BXT_CONF_PAD0 padConfg0;
+ EFI_STATUS Status;
+
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Verifying pad 0x%08x...\n", __FUNCTION__, __LINE__, PadOffset));
+
+ Status = EFI_UNSUPPORTED;
+ for (index = 0; index < LPSS_I2C_GPIO_MODE_NUMBER; index++) {
+ if (PadOffset == mModeAllowed[index].Offset) {
+ padConfg0.padCnf0 = GpioPadRead (PadOffset + BXT_GPIO_PAD_CONF0_OFFSET);
+ if ((mModeAllowed[index].Mode1Flag && (padConfg0.r.PMode == M1)) || (mModeAllowed[index].Mode2Flag && (padConfg0.r.PMode == M2))) {
+ Status = EFI_SUCCESS;
+ }
+ }
+ }
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Returning --> %r\n", __FUNCTION__, __LINE__, Status));
+ return Status;
+}
+
+EFI_STATUS
I2cProgramPad (
IN UINT8 Bus
)
{
+ UINT32 CommAndOffset;
UINT8 index;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PADs for bus #%d\n", __FUNCTION__, __LINE__, Bus));
-
- //
- // Initialize variables
- //
- Status = EFI_SUCCESS;
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PADs for bus #%d\n", __FUNCTION__, __LINE__, Bus));
//
// Sanity checks
@@ -316,8 +365,15 @@ I2cProgramPad (
// Program SDA/SCL
//
for (index = 0; index < 2; index++) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PAD %s\n", __FUNCTION__, __LINE__, mI2C_LPSS_PAD_INFO[(Bus * 2) + index].pad_name));
- GpioPadConfigTable (1, &mI2C_LPSS_PAD_INFO[(Bus * 2) + index]);
+ CommAndOffset = (((UINT32) mI2C_LPSS_PAD_INFO[(Bus * 2) + index].Community) << 16) + mI2C_LPSS_PAD_INFO[(Bus * 2) + index].MMIO_ADDRESS;
+ Status = I2cVerifyPad (CommAndOffset);
+ if (EFI_ERROR (Status)) {
+ if (! PcdGetBool (PcdAfterGpioInitFlag)) {
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PAD %s\n", __FUNCTION__, __LINE__, mI2C_LPSS_PAD_INFO[(Bus * 2) + index].pad_name));
+ GpioPadConfigTable (1, &mI2C_LPSS_PAD_INFO[(Bus * 2) + index]);
+ Status = EFI_SUCCESS;
+ }
+ }
}
//
@@ -359,47 +415,47 @@ I2cSetBusFrequency (
//
Status = EFI_SUCCESS;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet bus: %d\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet bus: %d\n", __FUNCTION__, __LINE__, Bus));
ASSERT ((Bus < LPSS_I2C_CLOCK_SCL_INFO_NUMBER));
//
// Set the 100 KHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_SS_SCL_HCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].SS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_SS_SCL_LCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].SS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SS_SCL_HCNT: 0x%08X, R_IC_SS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SS_SCL_HCNT: 0x%08X, R_IC_SS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_LCNT)));
//
// Set the 400 KHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_FS_SCL_HCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].FS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_FS_SCL_LCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].FS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_FS_SCL_HCNT: 0x%08X, R_IC_FS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_FS_SCL_HCNT: 0x%08X, R_IC_FS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_LCNT)));
//
// Set the 3.4MHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_HS_SCL_HCNT, (UINT16)mLPSS_I2C_CLOCK_SCL_INFO[Bus].HS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_HS_SCL_LCNT, (UINT16)mLPSS_I2C_CLOCK_SCL_INFO[Bus].HS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_HS_SCL_HCNT: 0x%08X, R_IC_HS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_HS_SCL_HCNT: 0x%08X, R_IC_HS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_LCNT)));
//
// Set hold register
//
MmioWrite32 (I2cBaseAddress + R_IC_SDA_HOLD, (UINT16) 0x06);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SDA_HOLD: 0x%08X\r\n", __FUNCTION__, __LINE__, MmioRead32 (I2cBaseAddress + R_IC_SDA_HOLD)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SDA_HOLD: 0x%08X\r\n", __FUNCTION__, __LINE__, MmioRead32 (I2cBaseAddress + R_IC_SDA_HOLD)));
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -444,7 +500,10 @@ ProgramPciLpssI2C (
//
// Set PADs to I2C mode
//
- I2cProgramPad (Bus);
+ Status = I2cProgramPad (Bus);
+ if (EFI_ERROR (Status)) {
+ goto Exit;
+ }
//
// Check PMC disable register
@@ -453,28 +512,28 @@ ProgramPciLpssI2C (
Data32 = MmioRead32 (PmcBase + R_PMC_FUNC_DIS);
if (Data32 == 0xFFFFFFFF) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() PMC disable register not available. [%08x]\n", __FUNCTION__, __LINE__, PMC_BASE_ADDRESS));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() PMC disable register not available. [%08x]\n", __FUNCTION__, __LINE__, PMC_BASE_ADDRESS));
} else {
if ((Data32 & I2cPortDisable[Bus]) != 0) {
// This I2C port is disabled. Turn it on.
Data32 &= ~I2cPortDisable[Bus];
MmioWrite32 (PmcBase + R_PMC_FUNC_DIS, Data32);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() enable I2C controller #%x\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() enable I2C controller #%x\n", __FUNCTION__, __LINE__, Bus));
// Make sure it took.
if (Data32 != MmioRead32 (PmcBase + R_PMC_FUNC_DIS)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C() failed to enable I2C controller #%x [%08x:%08x]\n",
- __FUNCTION__,
- __LINE__,
- Bus,
- Data32,
- MmioRead32 (PmcBase + R_PMC_FUNC_DIS)));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C() failed to enable I2C controller #%x [%08x:%08x]\n",
+ __FUNCTION__,
+ __LINE__,
+ Bus,
+ Data32,
+ MmioRead32 (PmcBase + R_PMC_FUNC_DIS)));
Status = EFI_DEVICE_ERROR;
goto Exit;
}
}
}
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C()------------BusNo=%x\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C()------------BusNo=%x\n", __FUNCTION__, __LINE__, Bus));
PciMmBase = MmPciAddress (
mI2cLpssPciDeviceList[Bus].Segment,
@@ -483,12 +542,12 @@ ProgramPciLpssI2C (
mI2cLpssPciDeviceList[Bus].FunctionNum,
0
);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Program Pci Lpss I2C Device %x %x %x PciMmBase:%x\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].BusNum,
- mI2cLpssPciDeviceList[Bus].DeviceNum,
- mI2cLpssPciDeviceList[Bus].FunctionNum, PciMmBase));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Program Pci Lpss I2C Device %x %x %x PciMmBase:%x\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].BusNum,
+ mI2cLpssPciDeviceList[Bus].DeviceNum,
+ mI2cLpssPciDeviceList[Bus].FunctionNum, PciMmBase));
//
// Check if device present
@@ -504,11 +563,11 @@ ProgramPciLpssI2C (
if ((I2CBar0 != (UINT32) mI2cLpssPciDeviceList[Bus].Bar0) || (I2CBar1 != (UINT32) mI2cLpssPciDeviceList[Bus].Bar1)) {
mI2cLpssPciDeviceList[Bus].Bar0 = MmioRead32 (PciMmBase + R_LPSS_IO_BAR) & B_LPSS_IO_BAR_BA; // get the address allocated.
mI2cLpssPciDeviceList[Bus].Bar1 = MmioRead32 (PciMmBase + R_LPSS_IO_BAR1) & B_LPSS_IO_BAR_BA;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Get bar0:0x%x bar1:0x%x\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].Bar0,
- mI2cLpssPciDeviceList[Bus].Bar1));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Get bar0:0x%x bar1:0x%x\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].Bar0,
+ mI2cLpssPciDeviceList[Bus].Bar1));
}
} else {
//
@@ -533,16 +592,16 @@ ProgramPciLpssI2C (
//
MmioWrite32 (mI2cLpssPciDeviceList[Bus].Bar0 + R_LPSS_IO_MEM_RESETS, B_LPSS_IO_MEM_HC_RESET_REL | B_LPSS_IO_MEM_iDMA_RESET_REL);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() Programmed()\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() Programmed()\n", __FUNCTION__, __LINE__));
Status = EFI_SUCCESS;
goto Exit;
} else {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Pci Lpss I2C Device %x %x %x does not exist!\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].BusNum,
- mI2cLpssPciDeviceList[Bus].DeviceNum,
- mI2cLpssPciDeviceList[Bus].FunctionNum));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Pci Lpss I2C Device %x %x %x does not exist!\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].BusNum,
+ mI2cLpssPciDeviceList[Bus].DeviceNum,
+ mI2cLpssPciDeviceList[Bus].FunctionNum));
Status = EFI_NOT_READY;
goto Exit;
@@ -550,7 +609,7 @@ ProgramPciLpssI2C (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -616,7 +675,7 @@ I2cInit (
0
);
BaseAddress = MmioRead32 (PciMmBase + R_LPSS_IO_BAR) & B_LPSS_IO_BAR_BA;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%08x:0x%08x \n", __FUNCTION__, __LINE__, BaseAddress, (UINT32) mI2cLpssPciDeviceList[Bus].Bar0));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%08x:0x%08x \n", __FUNCTION__, __LINE__, BaseAddress, (UINT32) mI2cLpssPciDeviceList[Bus].Bar0));
//
// Skip reinit if targeting the same I2C bus
@@ -633,7 +692,7 @@ I2cInit (
//
Status = ProgramPciLpssI2C (Bus);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C failed! %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C failed! %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
@@ -641,7 +700,7 @@ I2cInit (
// Retrieve I2C MMIO base address
//
BaseAddress = (UINT32) mI2cLpssPciDeviceList[Bus].Bar0;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%x \n", __FUNCTION__, __LINE__, BaseAddress));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%x \n", __FUNCTION__, __LINE__, BaseAddress));
//
// Reset controller
@@ -664,7 +723,7 @@ I2cInit (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -696,7 +755,7 @@ I2cPoll (
}
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -722,7 +781,7 @@ I2cRead (
UINT32 Data32;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Sanity checks
@@ -748,7 +807,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -783,7 +842,7 @@ I2cReset (
MicroSecondDelay (10);
NumTries--;
if (0 == NumTries) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Try timeout\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Try timeout\n", __FUNCTION__, __LINE__));
Status = EFI_DEVICE_ERROR;
goto Exit;
}
@@ -797,7 +856,7 @@ I2cReset (
// Disable I2C controller
//
Status = I2cDisable (I2cBaseAddress);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cDisable Status = %r\n", __FUNCTION__, __LINE__, Status));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cDisable Status = %r\n", __FUNCTION__, __LINE__, Status));
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -847,13 +906,13 @@ I2cReset (
// Set I2C Mode
//
MmioWrite32 (I2cBaseAddress + R_IC_CON, I2cMode);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cMode: 0x%04x\r\n", __FUNCTION__, __LINE__, I2cMode));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cMode: 0x%04x\r\n", __FUNCTION__, __LINE__, I2cMode));
MicroSecondDelay (I2C_ROUTINE_DELAY);
//
// Enable I2C controller
//
Status = I2cEnable (I2cBaseAddress);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cEnable Status = %r\n", __FUNCTION__, __LINE__, Status));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cEnable Status = %r\n", __FUNCTION__, __LINE__, Status));
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -871,7 +930,7 @@ I2cReset (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -924,9 +983,9 @@ I2cSendCommand (
//
if ((I2cGetRawStatus (I2cBaseAddress) & I2C_INTR_TX_ABRT) != 0) {
TxAbortStatus = I2cGetTxAbortStatus (I2cBaseAddress);
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
//
// Clear TX Abort
//
@@ -941,7 +1000,7 @@ I2cSendCommand (
// Set status
//
if (TxAbortStatus & (I2C_ABRT_7B_ADDR_NOACK | I2C_ABRT_10ADDR1_NOACK | I2C_ABRT_10ADDR2_NOACK)) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
Status = EFI_NO_RESPONSE;
} else {
Status = EFI_DEVICE_ERROR;
@@ -953,7 +1012,7 @@ I2cSendCommand (
//
if (((I2cGetStatus (I2cBaseAddress) & STAT_RFNE) != 0) && ReadFlag) {
*Data = MmioRead32 (I2cBaseAddress + R_IC_DATA_CMD) & 0xFF;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%02x was received [%d:%d]\n", __FUNCTION__, __LINE__, *Data, Start, End));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%02x was received [%d:%d]\n", __FUNCTION__, __LINE__, *Data, Start, End));
MicroSecondDelay (FIFO_WRITE_DELAY);
//
// Now empty the RX FIFO if stop bit set
@@ -962,8 +1021,8 @@ I2cSendCommand (
MmioRead32 (I2cBaseAddress + R_IC_DATA_CMD);
MicroSecondDelay (FIFO_WRITE_DELAY);
}
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
Status = EFI_SUCCESS;
goto Exit;
}
@@ -994,7 +1053,7 @@ I2cSendCommand (
while (!ReadFlag) {
if ((I2cGetRawStatus (I2cBaseAddress) & I2C_INTR_TX_ABRT) != 0) {
TxAbortStatus = I2cGetTxAbortStatus (I2cBaseAddress);
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
//
// Clear TX Abort
//
@@ -1009,16 +1068,16 @@ I2cSendCommand (
// Set status
//
if (TxAbortStatus & (I2C_ABRT_7B_ADDR_NOACK | I2C_ABRT_10ADDR1_NOACK | I2C_ABRT_10ADDR2_NOACK)) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
Status = EFI_NO_RESPONSE;
} else {
Status = EFI_DEVICE_ERROR;
}
}
if (I2cGetTxFifo (I2cBaseAddress) == 0) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%04x was sent [%d:%d]\n", __FUNCTION__, __LINE__, Data32, Start, End));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%04x was sent [%d:%d]\n", __FUNCTION__, __LINE__, Data32, Start, End));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
Status = EFI_SUCCESS;
goto Exit;
}
@@ -1026,7 +1085,7 @@ I2cSendCommand (
if (Count++ < 1024) { //to avoid sys hung without ul-pmc device on RVP
continue; //Waiting the last request to get data and make (ReceiveDataEnd > ReadBuffer) =TRUE.
} else {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - hardware timeout, 1024 times try!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - hardware timeout, 1024 times try!\n", __FUNCTION__, __LINE__));
Status = EFI_TIMEOUT;
goto Exit;
}
@@ -1049,7 +1108,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r [%x]\n", __FUNCTION__, __LINE__, Status, CountOut));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r [%x]\n", __FUNCTION__, __LINE__, Status, CountOut));
}
return Status;
}
@@ -1073,7 +1132,7 @@ I2cSetOffset (
UINT8 index;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Sanity checks
@@ -1116,7 +1175,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -1142,7 +1201,7 @@ I2cWrite (
UINT32 Data32;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Send CMD for write
@@ -1157,7 +1216,7 @@ I2cWrite (
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -1198,7 +1257,7 @@ ByteReadI2C_Basic (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1210,7 +1269,7 @@ ByteReadI2C_Basic (
//
// Something went wrong. Bail from this for loop.
//
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cRead() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cRead() = %r\n", __FUNCTION__, __LINE__, Status));
break;
}
}
@@ -1254,7 +1313,7 @@ ByteWriteI2C_Basic (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1266,7 +1325,7 @@ ByteWriteI2C_Basic (
//
// Something went wrong. Bail from this for loop.
//
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cWrite() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cWrite() = %r\n", __FUNCTION__, __LINE__, Status));
break;
}
}
@@ -1304,7 +1363,7 @@ ByteReadI2C (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1312,12 +1371,12 @@ ByteReadI2C (
//
Status = I2cSetOffset (I2cBaseAddress, &Offset, 1);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
goto Exit;
}
Status = ByteReadI2C_Basic (BusNo, SlaveAddress, ReadBytes, ReadBuffer, TRUE, TRUE);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteReadI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteReadI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
@@ -1355,7 +1414,7 @@ ByteWriteI2C (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1363,12 +1422,12 @@ ByteWriteI2C (
//
Status = I2cSetOffset (I2cBaseAddress, &Offset, 1);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
goto Exit;
}
Status = ByteWriteI2C_Basic (BusNo, SlaveAddress, WriteBytes, WriteBuffer, FALSE, TRUE);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteWriteI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteWriteI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
index 0083211b47..1e85f05bae 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
@@ -31,11 +31,6 @@
#include <ScRegs/RegsI2c.h>
//
-// Externs
-//
-extern BOOLEAN gI2cDebugFlag;
-
-//
// Structures
//
typedef struct _I2C_LPSS_PCI_DEVICE_INFO {
@@ -56,5 +51,11 @@ typedef struct _LPSS_I2C_CLOCK_SCL_INFO {
UINT16 HS_SCL_LCNT;
} LPSS_I2C_CLOCK_SCL_INFO;
+typedef struct _LPSS_I2C_GPIO_MODE {
+ UINT32 Offset;
+ BOOLEAN Mode1Flag;
+ BOOLEAN Mode2Flag;
+} LPSS_I2C_GPIO_MODE;
+
#endif // _I2C_COMMON_H_
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
index fb9210d732..9ef30bdff5 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
@@ -39,6 +39,7 @@
[Pcd]
gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress ## SOMETIMES_CONSUMES
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## SOMETIMES_CONSUMES
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag
[Sources]
I2cLib.c
--
2.11.0.windows.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after GPIO init
2018-09-21 18:28 [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after GPIO init Steele, Kelly
@ 2018-09-27 3:08 ` Wei, David
0 siblings, 0 replies; 2+ messages in thread
From: Wei, David @ 2018-09-27 3:08 UTC (permalink / raw)
To: Steele, Kelly, edk2-devel@lists.01.org; +Cc: Guo, Mang, Wei, David
Reviewed-by: David Wei <david.wei@intel.com<mailto:david.wei@intel.com>>
I am OK with this patch.
Thanks,
David Wei
Intel SSG/STO/UEFI BIOS
From: Steele, Kelly
Sent: Saturday, September 22, 2018 2:28 AM
To: edk2-devel@lists.01.org
Cc: Wei, David <david.wei@intel.com>; Guo, Mang <mang.guo@intel.com>
Subject: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after GPIO init
>From b4b50a16977879f664fe93c1fd8355ac5df012c3 Mon Sep 17 00:00:00 2001
From: Kelly Steele <kelly.steele@intel.com<mailto:kelly.steele@intel.com>>
Date: Fri, 21 Sep 2018 11:20:56 -0700
Subject: [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after
GPIO init
Need to prevent modifying the SoC PADs after GPIO init in the I2C code
so I added a PCD flag for this purpose. While in the I2C library, I
cleaned it up. This still leaves a brief window from after GPIO init
and when the flag gets set for the I2C library to modify the SoC I2C
PADs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Kelly Steele <kelly.steele@intel.com<mailto:kelly.steele@intel.com>>
---
.../PlatformPostMemPei/PlatformInit.c | 16 +-
.../PlatformPostMemPei/PlatformPostMemPei.inf | 5 +-
Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec | 7 +-
.../SouthCluster/Include/Library/I2cLib.h | 10 +-
.../SouthCluster/Include/ScRegs/RegsI2c.h | 2 +-
.../SouthCluster/Library/I2cLib/I2cLib.c | 277 +++++++++++++--------
.../SouthCluster/Library/I2cLib/I2cLib.h | 11 +-
.../SouthCluster/Library/I2cLib/I2cLib.inf | 1 +
8 files changed, 202 insertions(+), 127 deletions(-)
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
index acaaebbfbb..eceecdf730 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformInit.c
@@ -280,7 +280,7 @@ BXTPolicyInit (
PeiGetSectionFromFv (PeiLogoGuid, &Buffer, &Size);
if (Buffer == NULL) {
- DEBUG (( DEBUG_ERROR, "Could not locate PeiLogo"));
+ DEBUG ((DEBUG_ERROR, "Could not locate PeiLogo"));
}
//
@@ -290,7 +290,7 @@ BXTPolicyInit (
PeiGetSectionFromFv (VbtGuid, &Buffer, &Size);
if (Buffer == NULL) {
- DEBUG (( DEBUG_ERROR, "Could not locate VBT"));
+ DEBUG ((DEBUG_ERROR, "Could not locate VBT"));
}
@@ -330,7 +330,7 @@ ConfigurePmicIMON (
StallCount = 0;
while (StallCount < 1000) {
- Data = MmioRead32 (MchBar + R_BIOS_MAILBOX_INTERFACE);
+ Data = MmioRead32 (MchBar + R_BIOS_MAILBOX_INTERFACE);
if ((Data & BIT31) == BIT31) {
MicroSecondDelay (1);
} else {
@@ -355,7 +355,7 @@ ConfigurePmicIMON (
if ((PkgPwrSKU & 0x07FFF) >= 0x0903){
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_DATA), 0xe8330466);
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_INTERFACE), 0x8000001d);
- } else {
+ } else {
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_DATA), 0xed3303b3);
MmioWrite32 ( (MchBar + R_BIOS_MAILBOX_INTERFACE), 0x8000001d);
}
@@ -412,7 +412,7 @@ PlatformInitEntryPoint (
}
PWM_Fan_Start ();
-
+
ConfigurePmicIMON();
//
@@ -422,7 +422,11 @@ PlatformInitEntryPoint (
if (BoardPostMemInitFunc != NULL) {
BoardPostMemInitFunc (PeiServices, PlatformInfo);
}
- // MultiPlatformInfoInit(PeiServices, PlatformInfo);
+
+ //
+ // Set PCD flag to indicate that we have performed the GPIO initialization
+ //
+ PcdSetBool (PcdAfterGpioInitFlag, TRUE);
//
// Set the new boot mode
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
index c7c0f4dfe3..4a50131764 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf
@@ -1,7 +1,7 @@
## @file
# Component description file for PlatformInit module.
#
-# Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 1999 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -31,8 +31,8 @@
[Packages]
MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
BroxtonPlatformPkg/PlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
BroxtonSiPkg/BroxtonSiPkg.dec
UefiCpuPkg/UefiCpuPkg.dec
@@ -123,6 +123,7 @@
gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc
gPlatformModuleTokenSpaceGuid.PcdBoardVbtFileGuid
gPlatformModuleTokenSpaceGuid.PcdOemLogoFileGuid
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag
[Depex]
gDramPolicyPpiGuid
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
index 05508a4c18..ee8124270f 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec
@@ -5,7 +5,7 @@
# DSC and EDK II INF files to generate AutoGen.c and AutoGen.h files
# for the EDK II build infrastructure.
#
-# Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -241,7 +241,7 @@
gInterruptConfigGuid = { 0x097dccd0, 0xf570, 0x41f6, { 0x9d, 0xf0, 0x72, 0xe2, 0x5a, 0xbe, 0xd3, 0x98 } }
gEfiBpdtLibBp1DataGuid = { 0x7a4ecf02, 0xa1cf, 0x4e42, { 0xb6, 0x33, 0xfe, 0x95, 0x54, 0xbb, 0x60, 0xf8 } }
gEfiBpdtLibBp2DataGuid = { 0x75b0886e, 0xcd6a, 0x469f, { 0xae, 0x0b, 0x8c, 0xed, 0x90, 0x33, 0xd1, 0x99 } }
-
+
gAcpiDmarTableFileGuid = { 0x6767abfe, 0x27d2, 0x41b3, { 0xa0, 0x84, 0xb8, 0xa8, 0x98, 0x24, 0xd3, 0x5a } }
[Includes.common]
@@ -334,7 +334,8 @@
gEfiBxtTokenSpaceGuid.PcdSetCoreCount|0|UINT32|0x10000223
gEfiBxtTokenSpaceGuid.PcdVtdGfxBaseAddress|0xFED64000|UINT32|0x10000224
gSiPkgTokenSpaceGuid.PcdForceVolatileVariable|FALSE|BOOLEAN|0x30000012
-
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag|FALSE|BOOLEAN|0x30000013
+
## I2S Audio Configuration
## Blue Tooth Render
gEfiBxtTokenSpaceGuid.HdaEndpointBtRenderVirtualBusId|0x0F|UINT8|0x80000001
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
index 1c715d558e..8aa7e22fa3 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/Library/I2cLib.h
@@ -28,7 +28,8 @@
#define I2C_ROUTINE_DELAY 10
#define INVALID_I2C_ADDRESS 0xFF
#define MAX_I2C_ADDRESS 0x7F
-#define MAX_I2C_BUS 7
+#define MAX_I2C_BUS 8
+#define I2C_SMBUS_BUS MAX_I2C_BUS
////
@@ -43,6 +44,13 @@ typedef enum {
////
+//// Externs
+////
+extern BOOLEAN gI2cDebugFlag;
+extern BOOLEAN gI2cQuietFlag;
+
+
+////
//// Functions
////
//
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
index 8a7463b538..17107b80b2 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Include/ScRegs/RegsI2c.h
@@ -1,7 +1,7 @@
/** @file
Register names for I2C device.
- Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
index b7ecaca302..5691694d81 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.c
@@ -18,7 +18,7 @@
//
// List of I2C controllers
//
-I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
+I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[MAX_I2C_BUS + 1] = {
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C0, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*0), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*0) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C1, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*1), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*1) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C0, PCI_FUNCTION_NUMBER_LPSS_I2C2, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*2), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*2) + LPSS_I2C_TMP_BAR1_OFFSET},
@@ -26,6 +26,7 @@ I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C4, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*4), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*4) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C5, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*5), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*5) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C6, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*6), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*6) + LPSS_I2C_TMP_BAR1_OFFSET},
+ {0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C7, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7) + LPSS_I2C_TMP_BAR1_OFFSET},
{0, DEFAULT_PCI_BUS_NUMBER_SC, PCI_DEVICE_NUMBER_LPSS_I2C1, PCI_FUNCTION_NUMBER_LPSS_I2C7, LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7), LPSS_I2C0_TMP_BAR0 + (LPSS_I2C_TMP_BAR0_DELTA*7) + LPSS_I2C_TMP_BAR1_OFFSET}
};
#define I2C_LPSS_PCI_DEVICE_NUMBER (sizeof (mI2cLpssPciDeviceList) / sizeof (I2C_LPSS_PCI_DEVICE_INFO))
@@ -33,7 +34,7 @@ I2C_LPSS_PCI_DEVICE_INFO mI2cLpssPciDeviceList[] = {
//
// List of I2C controller clock values
//
-LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
+LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[MAX_I2C_BUS + 1] = {
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x64, 0xC8, 0x06, 0x13},
@@ -41,6 +42,7 @@ LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
{0x244, 0x2DA, 0x1E, 0x50, 0x06, 0x13},
{0x244, 0x2D0, 0x69, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x69, 0xC8, 0x06, 0x13},
+ {0x244, 0x2D0, 0x70, 0xC8, 0x06, 0x13},
{0x244, 0x2D0, 0x70, 0xC8, 0x06, 0x13}
};
#define LPSS_I2C_CLOCK_SCL_INFO_NUMBER (sizeof (mLPSS_I2C_CLOCK_SCL_INFO) / sizeof (LPSS_I2C_CLOCK_SCL_INFO))
@@ -48,26 +50,53 @@ LPSS_I2C_CLOCK_SCL_INFO mLPSS_I2C_CLOCK_SCL_INFO[] = {
//
// List of I2C controller PAD settings
//
-BXT_GPIO_PAD_INIT mI2C_LPSS_PAD_INFO[] = {
- BXT_GPIO_PAD_CONF (L"GPIO_124 LPSS_I2C0_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0000, WEST),
+BXT_GPIO_PAD_INIT mI2C_LPSS_PAD_INFO[(MAX_I2C_BUS + 1) * 2] = {
+ BXT_GPIO_PAD_CONF (L"GPIO_124 LPSS_I2C0_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0000, WEST), // LPSS I2C0
BXT_GPIO_PAD_CONF (L"GPIO_125 LPSS_I2C0_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0008, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_126 LPSS_I2C1_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0010, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_126 LPSS_I2C1_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0010, WEST), // LPSS I2C1
BXT_GPIO_PAD_CONF (L"GPIO_127 LPSS_I2C1_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0018, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_128 LPSS_I2C2_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0020, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_128 LPSS_I2C2_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0020, WEST), // LPSS I2C2
BXT_GPIO_PAD_CONF (L"GPIO_129 LPSS_I2C2_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0028, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_130 LPSS_I2C3_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0030, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_130 LPSS_I2C3_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0030, WEST), // LPSS I2C3
BXT_GPIO_PAD_CONF (L"GPIO_131 LPSS_I2C3_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0038, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_132 LPSS_I2C4_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0040, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_132 LPSS_I2C4_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0040, WEST), // LPSS I2C4
BXT_GPIO_PAD_CONF (L"GPIO_133 LPSS_I2C4_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0048, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_134 LPSS_I2C5_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0050, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_134 LPSS_I2C5_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0050, WEST), // LPSS I2C5
BXT_GPIO_PAD_CONF (L"GPIO_135 LPSS_I2C5_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0058, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_136 LPSS_I2C6_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0060, WEST),
+ BXT_GPIO_PAD_CONF (L"GPIO_136 LPSS_I2C6_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0060, WEST), // LPSS I2C6
BXT_GPIO_PAD_CONF (L"GPIO_137 LPSS_I2C6_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0068, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_138 LPSS_I2C7_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0070, WEST),
- BXT_GPIO_PAD_CONF (L"GPIO_139 LPSS_I2C7_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0078, WEST)
+ BXT_GPIO_PAD_CONF (L"GPIO_138 LPSS_I2C7_SDA", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0070, WEST), // LPSS I2C7
+ BXT_GPIO_PAD_CONF (L"GPIO_139 LPSS_I2C7_SCL", M1, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D0RxDRx0I, EnPu, GPIO_PADBAR + 0x0078, WEST),
+ BXT_GPIO_PAD_CONF (L"SMB_CLK", M2, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0100, SOUTHWEST), // SMB_CLK --> LPSS I2C7
+ BXT_GPIO_PAD_CONF (L"SMB_DATA", M2, NA, NA, NA, NA, Wake_Disabled, P_20K_H, NA, NA, D1RxDRx1I, EnPu, GPIO_PADBAR + 0x0108, SOUTHWEST)
};
+LPSS_I2C_GPIO_MODE mModeAllowed[(MAX_I2C_BUS + 1) * 2] = {
+// Offset M1 M2
+//==========================================
+ {W_GPIO_124, TRUE, FALSE}, // LPSS I2C0 SDA
+ {W_GPIO_125, TRUE, FALSE}, // LPSS I2C0 SCL
+ {W_GPIO_126, TRUE, FALSE}, // LPSS I2C1 SDA
+ {W_GPIO_127, TRUE, FALSE}, // LPSS I2C1 SCL
+ {W_GPIO_128, TRUE, FALSE}, // LPSS I2C2 SDA
+ {W_GPIO_129, TRUE, FALSE}, // LPSS I2C2 SCL
+ {W_GPIO_130, TRUE, FALSE}, // LPSS I2C3 SDA
+ {W_GPIO_131, TRUE, FALSE}, // LPSS I2C3 SCL
+ {W_GPIO_132, TRUE, FALSE}, // LPSS I2C4 SDA
+ {W_GPIO_133, TRUE, FALSE}, // LPSS I2C4 SCL
+ {W_GPIO_134, TRUE, TRUE}, // LPSS I2C5 SDA
+ {W_GPIO_135, TRUE, TRUE}, // LPSS I2C5 SCL
+ {W_GPIO_136, TRUE, TRUE}, // LPSS I2C6 SDA
+ {W_GPIO_137, TRUE, TRUE}, // LPSS I2C6 SCL
+ {W_GPIO_138, TRUE, TRUE}, // LPSS I2C7 SDA
+ {W_GPIO_139, TRUE, TRUE}, // LPSS I2C7 SCL
+ {SW_SMB_CLK, FALSE, TRUE}, // SMBUS SCL
+ {SW_SMB_DATA, FALSE, TRUE} // SMBUS SDA
+};
+#define LPSS_I2C_GPIO_MODE_NUMBER (sizeof (mModeAllowed) / sizeof (LPSS_I2C_GPIO_MODE))
+
BOOLEAN gI2cDebugFlag = FALSE;
+BOOLEAN gI2cQuietFlag = FALSE;
////
//// Internal I2C functions
@@ -135,7 +164,7 @@ I2cDisable (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -177,7 +206,7 @@ I2cEnable (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -290,19 +319,39 @@ I2cGetTxFifo (
}
EFI_STATUS
+I2cVerifyPad (
+ IN UINT32 PadOffset
+ )
+{
+ UINT8 index;
+ BXT_CONF_PAD0 padConfg0;
+ EFI_STATUS Status;
+
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Verifying pad 0x%08x...\n", __FUNCTION__, __LINE__, PadOffset));
+
+ Status = EFI_UNSUPPORTED;
+ for (index = 0; index < LPSS_I2C_GPIO_MODE_NUMBER; index++) {
+ if (PadOffset == mModeAllowed[index].Offset) {
+ padConfg0.padCnf0 = GpioPadRead (PadOffset + BXT_GPIO_PAD_CONF0_OFFSET);
+ if ((mModeAllowed[index].Mode1Flag && (padConfg0.r.PMode == M1)) || (mModeAllowed[index].Mode2Flag && (padConfg0.r.PMode == M2))) {
+ Status = EFI_SUCCESS;
+ }
+ }
+ }
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Returning --> %r\n", __FUNCTION__, __LINE__, Status));
+ return Status;
+}
+
+EFI_STATUS
I2cProgramPad (
IN UINT8 Bus
)
{
+ UINT32 CommAndOffset;
UINT8 index;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PADs for bus #%d\n", __FUNCTION__, __LINE__, Bus));
-
- //
- // Initialize variables
- //
- Status = EFI_SUCCESS;
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PADs for bus #%d\n", __FUNCTION__, __LINE__, Bus));
//
// Sanity checks
@@ -316,8 +365,15 @@ I2cProgramPad (
// Program SDA/SCL
//
for (index = 0; index < 2; index++) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PAD %s\n", __FUNCTION__, __LINE__, mI2C_LPSS_PAD_INFO[(Bus * 2) + index].pad_name));
- GpioPadConfigTable (1, &mI2C_LPSS_PAD_INFO[(Bus * 2) + index]);
+ CommAndOffset = (((UINT32) mI2C_LPSS_PAD_INFO[(Bus * 2) + index].Community) << 16) + mI2C_LPSS_PAD_INFO[(Bus * 2) + index].MMIO_ADDRESS;
+ Status = I2cVerifyPad (CommAndOffset);
+ if (EFI_ERROR (Status)) {
+ if (! PcdGetBool (PcdAfterGpioInitFlag)) {
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Programming PAD %s\n", __FUNCTION__, __LINE__, mI2C_LPSS_PAD_INFO[(Bus * 2) + index].pad_name));
+ GpioPadConfigTable (1, &mI2C_LPSS_PAD_INFO[(Bus * 2) + index]);
+ Status = EFI_SUCCESS;
+ }
+ }
}
//
@@ -359,47 +415,47 @@ I2cSetBusFrequency (
//
Status = EFI_SUCCESS;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet bus: %d\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet bus: %d\n", __FUNCTION__, __LINE__, Bus));
ASSERT ((Bus < LPSS_I2C_CLOCK_SCL_INFO_NUMBER));
//
// Set the 100 KHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_SS_SCL_HCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].SS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_SS_SCL_LCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].SS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SS_SCL_HCNT: 0x%08X, R_IC_SS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SS_SCL_HCNT: 0x%08X, R_IC_SS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_SS_SCL_LCNT)));
//
// Set the 400 KHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_FS_SCL_HCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].FS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_FS_SCL_LCNT, (UINT16) mLPSS_I2C_CLOCK_SCL_INFO[Bus].FS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_FS_SCL_HCNT: 0x%08X, R_IC_FS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_FS_SCL_HCNT: 0x%08X, R_IC_FS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_FS_SCL_LCNT)));
//
// Set the 3.4MHz clock divider according to SV result and I2C spec
//
MmioWrite32 (I2cBaseAddress + R_IC_HS_SCL_HCNT, (UINT16)mLPSS_I2C_CLOCK_SCL_INFO[Bus].HS_SCL_HCNT);
MmioWrite32 (I2cBaseAddress + R_IC_HS_SCL_LCNT, (UINT16)mLPSS_I2C_CLOCK_SCL_INFO[Bus].HS_SCL_LCNT);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_HS_SCL_HCNT: 0x%08X, R_IC_HS_SCL_LCNT: 0x%08X\r\n",
- __FUNCTION__,
- __LINE__,
- MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_HCNT),
- MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_LCNT)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_HS_SCL_HCNT: 0x%08X, R_IC_HS_SCL_LCNT: 0x%08X\r\n",
+ __FUNCTION__,
+ __LINE__,
+ MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_HCNT),
+ MmioRead32 (I2cBaseAddress + R_IC_HS_SCL_LCNT)));
//
// Set hold register
//
MmioWrite32 (I2cBaseAddress + R_IC_SDA_HOLD, (UINT16) 0x06);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SDA_HOLD: 0x%08X\r\n", __FUNCTION__, __LINE__, MmioRead32 (I2cBaseAddress + R_IC_SDA_HOLD)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cBusFrequencySet R_IC_SDA_HOLD: 0x%08X\r\n", __FUNCTION__, __LINE__, MmioRead32 (I2cBaseAddress + R_IC_SDA_HOLD)));
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -444,7 +500,10 @@ ProgramPciLpssI2C (
//
// Set PADs to I2C mode
//
- I2cProgramPad (Bus);
+ Status = I2cProgramPad (Bus);
+ if (EFI_ERROR (Status)) {
+ goto Exit;
+ }
//
// Check PMC disable register
@@ -453,28 +512,28 @@ ProgramPciLpssI2C (
Data32 = MmioRead32 (PmcBase + R_PMC_FUNC_DIS);
if (Data32 == 0xFFFFFFFF) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() PMC disable register not available. [%08x]\n", __FUNCTION__, __LINE__, PMC_BASE_ADDRESS));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() PMC disable register not available. [%08x]\n", __FUNCTION__, __LINE__, PMC_BASE_ADDRESS));
} else {
if ((Data32 & I2cPortDisable[Bus]) != 0) {
// This I2C port is disabled. Turn it on.
Data32 &= ~I2cPortDisable[Bus];
MmioWrite32 (PmcBase + R_PMC_FUNC_DIS, Data32);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() enable I2C controller #%x\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() enable I2C controller #%x\n", __FUNCTION__, __LINE__, Bus));
// Make sure it took.
if (Data32 != MmioRead32 (PmcBase + R_PMC_FUNC_DIS)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C() failed to enable I2C controller #%x [%08x:%08x]\n",
- __FUNCTION__,
- __LINE__,
- Bus,
- Data32,
- MmioRead32 (PmcBase + R_PMC_FUNC_DIS)));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C() failed to enable I2C controller #%x [%08x:%08x]\n",
+ __FUNCTION__,
+ __LINE__,
+ Bus,
+ Data32,
+ MmioRead32 (PmcBase + R_PMC_FUNC_DIS)));
Status = EFI_DEVICE_ERROR;
goto Exit;
}
}
}
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C()------------BusNo=%x\n", __FUNCTION__, __LINE__, Bus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C()------------BusNo=%x\n", __FUNCTION__, __LINE__, Bus));
PciMmBase = MmPciAddress (
mI2cLpssPciDeviceList[Bus].Segment,
@@ -483,12 +542,12 @@ ProgramPciLpssI2C (
mI2cLpssPciDeviceList[Bus].FunctionNum,
0
);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Program Pci Lpss I2C Device %x %x %x PciMmBase:%x\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].BusNum,
- mI2cLpssPciDeviceList[Bus].DeviceNum,
- mI2cLpssPciDeviceList[Bus].FunctionNum, PciMmBase));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Program Pci Lpss I2C Device %x %x %x PciMmBase:%x\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].BusNum,
+ mI2cLpssPciDeviceList[Bus].DeviceNum,
+ mI2cLpssPciDeviceList[Bus].FunctionNum, PciMmBase));
//
// Check if device present
@@ -504,11 +563,11 @@ ProgramPciLpssI2C (
if ((I2CBar0 != (UINT32) mI2cLpssPciDeviceList[Bus].Bar0) || (I2CBar1 != (UINT32) mI2cLpssPciDeviceList[Bus].Bar1)) {
mI2cLpssPciDeviceList[Bus].Bar0 = MmioRead32 (PciMmBase + R_LPSS_IO_BAR) & B_LPSS_IO_BAR_BA; // get the address allocated.
mI2cLpssPciDeviceList[Bus].Bar1 = MmioRead32 (PciMmBase + R_LPSS_IO_BAR1) & B_LPSS_IO_BAR_BA;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Get bar0:0x%x bar1:0x%x\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].Bar0,
- mI2cLpssPciDeviceList[Bus].Bar1));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Get bar0:0x%x bar1:0x%x\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].Bar0,
+ mI2cLpssPciDeviceList[Bus].Bar1));
}
} else {
//
@@ -533,16 +592,16 @@ ProgramPciLpssI2C (
//
MmioWrite32 (mI2cLpssPciDeviceList[Bus].Bar0 + R_LPSS_IO_MEM_RESETS, B_LPSS_IO_MEM_HC_RESET_REL | B_LPSS_IO_MEM_iDMA_RESET_REL);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() Programmed()\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - ProgramPciLpssI2C() Programmed()\n", __FUNCTION__, __LINE__));
Status = EFI_SUCCESS;
goto Exit;
} else {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Pci Lpss I2C Device %x %x %x does not exist!\n",
- __FUNCTION__,
- __LINE__,
- mI2cLpssPciDeviceList[Bus].BusNum,
- mI2cLpssPciDeviceList[Bus].DeviceNum,
- mI2cLpssPciDeviceList[Bus].FunctionNum));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Pci Lpss I2C Device %x %x %x does not exist!\n",
+ __FUNCTION__,
+ __LINE__,
+ mI2cLpssPciDeviceList[Bus].BusNum,
+ mI2cLpssPciDeviceList[Bus].DeviceNum,
+ mI2cLpssPciDeviceList[Bus].FunctionNum));
Status = EFI_NOT_READY;
goto Exit;
@@ -550,7 +609,7 @@ ProgramPciLpssI2C (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -616,7 +675,7 @@ I2cInit (
0
);
BaseAddress = MmioRead32 (PciMmBase + R_LPSS_IO_BAR) & B_LPSS_IO_BAR_BA;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%08x:0x%08x \n", __FUNCTION__, __LINE__, BaseAddress, (UINT32) mI2cLpssPciDeviceList[Bus].Bar0));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%08x:0x%08x \n", __FUNCTION__, __LINE__, BaseAddress, (UINT32) mI2cLpssPciDeviceList[Bus].Bar0));
//
// Skip reinit if targeting the same I2C bus
@@ -633,7 +692,7 @@ I2cInit (
//
Status = ProgramPciLpssI2C (Bus);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C failed! %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ProgramPciLpssI2C failed! %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
@@ -641,7 +700,7 @@ I2cInit (
// Retrieve I2C MMIO base address
//
BaseAddress = (UINT32) mI2cLpssPciDeviceList[Bus].Bar0;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%x \n", __FUNCTION__, __LINE__, BaseAddress));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2CBaseAddress = 0x%x \n", __FUNCTION__, __LINE__, BaseAddress));
//
// Reset controller
@@ -664,7 +723,7 @@ I2cInit (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -696,7 +755,7 @@ I2cPoll (
}
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -722,7 +781,7 @@ I2cRead (
UINT32 Data32;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Sanity checks
@@ -748,7 +807,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -783,7 +842,7 @@ I2cReset (
MicroSecondDelay (10);
NumTries--;
if (0 == NumTries) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Try timeout\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Try timeout\n", __FUNCTION__, __LINE__));
Status = EFI_DEVICE_ERROR;
goto Exit;
}
@@ -797,7 +856,7 @@ I2cReset (
// Disable I2C controller
//
Status = I2cDisable (I2cBaseAddress);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cDisable Status = %r\n", __FUNCTION__, __LINE__, Status));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cDisable Status = %r\n", __FUNCTION__, __LINE__, Status));
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -847,13 +906,13 @@ I2cReset (
// Set I2C Mode
//
MmioWrite32 (I2cBaseAddress + R_IC_CON, I2cMode);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cMode: 0x%04x\r\n", __FUNCTION__, __LINE__, I2cMode));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cMode: 0x%04x\r\n", __FUNCTION__, __LINE__, I2cMode));
MicroSecondDelay (I2C_ROUTINE_DELAY);
//
// Enable I2C controller
//
Status = I2cEnable (I2cBaseAddress);
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cEnable Status = %r\n", __FUNCTION__, __LINE__, Status));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - I2cEnable Status = %r\n", __FUNCTION__, __LINE__, Status));
if (EFI_ERROR (Status)) {
goto Exit;
}
@@ -871,7 +930,7 @@ I2cReset (
Exit:
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -924,9 +983,9 @@ I2cSendCommand (
//
if ((I2cGetRawStatus (I2cBaseAddress) & I2C_INTR_TX_ABRT) != 0) {
TxAbortStatus = I2cGetTxAbortStatus (I2cBaseAddress);
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
//
// Clear TX Abort
//
@@ -941,7 +1000,7 @@ I2cSendCommand (
// Set status
//
if (TxAbortStatus & (I2C_ABRT_7B_ADDR_NOACK | I2C_ABRT_10ADDR1_NOACK | I2C_ABRT_10ADDR2_NOACK)) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
Status = EFI_NO_RESPONSE;
} else {
Status = EFI_DEVICE_ERROR;
@@ -953,7 +1012,7 @@ I2cSendCommand (
//
if (((I2cGetStatus (I2cBaseAddress) & STAT_RFNE) != 0) && ReadFlag) {
*Data = MmioRead32 (I2cBaseAddress + R_IC_DATA_CMD) & 0xFF;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%02x was received [%d:%d]\n", __FUNCTION__, __LINE__, *Data, Start, End));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%02x was received [%d:%d]\n", __FUNCTION__, __LINE__, *Data, Start, End));
MicroSecondDelay (FIFO_WRITE_DELAY);
//
// Now empty the RX FIFO if stop bit set
@@ -962,8 +1021,8 @@ I2cSendCommand (
MmioRead32 (I2cBaseAddress + R_IC_DATA_CMD);
MicroSecondDelay (FIFO_WRITE_DELAY);
}
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
Status = EFI_SUCCESS;
goto Exit;
}
@@ -994,7 +1053,7 @@ I2cSendCommand (
while (!ReadFlag) {
if ((I2cGetRawStatus (I2cBaseAddress) & I2C_INTR_TX_ABRT) != 0) {
TxAbortStatus = I2cGetTxAbortStatus (I2cBaseAddress);
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - TX ABRT [%04x]\n", __FUNCTION__, __LINE__, TxAbortStatus));
//
// Clear TX Abort
//
@@ -1009,16 +1068,16 @@ I2cSendCommand (
// Set status
//
if (TxAbortStatus & (I2C_ABRT_7B_ADDR_NOACK | I2C_ABRT_10ADDR1_NOACK | I2C_ABRT_10ADDR2_NOACK)) {
- DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a(#%4d) - Nobody home!\n", __FUNCTION__, __LINE__));
Status = EFI_NO_RESPONSE;
} else {
Status = EFI_DEVICE_ERROR;
}
}
if (I2cGetTxFifo (I2cBaseAddress) == 0) {
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%04x was sent [%d:%d]\n", __FUNCTION__, __LINE__, Data32, Start, End));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - MmioRead32, byte 0x%04x was sent [%d:%d]\n", __FUNCTION__, __LINE__, Data32, Start, End));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - RX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetRxFifo (I2cBaseAddress)));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - TX FIFO = %04x\n", __FUNCTION__, __LINE__, I2cGetTxFifo (I2cBaseAddress)));
Status = EFI_SUCCESS;
goto Exit;
}
@@ -1026,7 +1085,7 @@ I2cSendCommand (
if (Count++ < 1024) { //to avoid sys hung without ul-pmc device on RVP
continue; //Waiting the last request to get data and make (ReceiveDataEnd > ReadBuffer) =TRUE.
} else {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - hardware timeout, 1024 times try!\n", __FUNCTION__, __LINE__));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - hardware timeout, 1024 times try!\n", __FUNCTION__, __LINE__));
Status = EFI_TIMEOUT;
goto Exit;
}
@@ -1049,7 +1108,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r [%x]\n", __FUNCTION__, __LINE__, Status, CountOut));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r [%x]\n", __FUNCTION__, __LINE__, Status, CountOut));
}
return Status;
}
@@ -1073,7 +1132,7 @@ I2cSetOffset (
UINT8 index;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Sanity checks
@@ -1116,7 +1175,7 @@ Exit:
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -1142,7 +1201,7 @@ I2cWrite (
UINT32 Data32;
EFI_STATUS Status;
- if (gI2cDebugFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
+ if (gI2cDebugFlag && !gI2cQuietFlag) DEBUG ((DEBUG_INFO, "%a (#%4d) - Starting\n", __FUNCTION__, __LINE__));
//
// Send CMD for write
@@ -1157,7 +1216,7 @@ I2cWrite (
// Display error messages
//
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - Ending with %r\n", __FUNCTION__, __LINE__, Status));
}
return Status;
}
@@ -1198,7 +1257,7 @@ ByteReadI2C_Basic (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1210,7 +1269,7 @@ ByteReadI2C_Basic (
//
// Something went wrong. Bail from this for loop.
//
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cRead() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cRead() = %r\n", __FUNCTION__, __LINE__, Status));
break;
}
}
@@ -1254,7 +1313,7 @@ ByteWriteI2C_Basic (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1266,7 +1325,7 @@ ByteWriteI2C_Basic (
//
// Something went wrong. Bail from this for loop.
//
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cWrite() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cWrite() = %r\n", __FUNCTION__, __LINE__, Status));
break;
}
}
@@ -1304,7 +1363,7 @@ ByteReadI2C (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1312,12 +1371,12 @@ ByteReadI2C (
//
Status = I2cSetOffset (I2cBaseAddress, &Offset, 1);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
goto Exit;
}
Status = ByteReadI2C_Basic (BusNo, SlaveAddress, ReadBytes, ReadBuffer, TRUE, TRUE);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteReadI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteReadI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
@@ -1355,7 +1414,7 @@ ByteWriteI2C (
//
Status = I2cInit (BusNo, SlaveAddress, Standard_Speed, &I2cBaseAddress);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cInit() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
//
@@ -1363,12 +1422,12 @@ ByteWriteI2C (
//
Status = I2cSetOffset (I2cBaseAddress, &Offset, 1);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - I2cSetOffset() = %r [%02x:%02x:%04x]\n", __FUNCTION__, __LINE__, Status, BusNo, SlaveAddress, Offset));
goto Exit;
}
Status = ByteWriteI2C_Basic (BusNo, SlaveAddress, WriteBytes, WriteBuffer, FALSE, TRUE);
if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteWriteI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
+ if (!gI2cQuietFlag) DEBUG ((DEBUG_ERROR, "%a (#%4d) - ByteWriteI2C_Basic() = %r\n", __FUNCTION__, __LINE__, Status));
goto Exit;
}
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
index 0083211b47..1e85f05bae 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.h
@@ -31,11 +31,6 @@
#include <ScRegs/RegsI2c.h>
//
-// Externs
-//
-extern BOOLEAN gI2cDebugFlag;
-
-//
// Structures
//
typedef struct _I2C_LPSS_PCI_DEVICE_INFO {
@@ -56,5 +51,11 @@ typedef struct _LPSS_I2C_CLOCK_SCL_INFO {
UINT16 HS_SCL_LCNT;
} LPSS_I2C_CLOCK_SCL_INFO;
+typedef struct _LPSS_I2C_GPIO_MODE {
+ UINT32 Offset;
+ BOOLEAN Mode1Flag;
+ BOOLEAN Mode2Flag;
+} LPSS_I2C_GPIO_MODE;
+
#endif // _I2C_COMMON_H_
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
index fb9210d732..9ef30bdff5 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/I2cLib/I2cLib.inf
@@ -39,6 +39,7 @@
[Pcd]
gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress ## SOMETIMES_CONSUMES
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress ## SOMETIMES_CONSUMES
+ gSiPkgTokenSpaceGuid.PcdAfterGpioInitFlag
[Sources]
I2cLib.c
--
2.11.0.windows.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
end of thread, other threads:[~2018-09-27 3:09 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-09-21 18:28 [PATCH] [edk2-platforms/devel-IntelAtomProcessorE3900] Flag after GPIO init Steele, Kelly
2018-09-27 3:08 ` Wei, David
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox