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contact devel+owner@edk2.groups.io Resent-Date: Sun, 31 Mar 2024 05:06:25 -0700 Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: DI0RRAgWD3Iwivzxbm5lzsHMx7686176AA= Content-Language: en-GB Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=QY5Haq4b; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none) Hi Prabin, I am going to drop patch 7/9 that adds the SMBIOS support, and merge the=20 remaining series. Please fix patch 7/9 and send it as a separate patch that adds SMBIOS=20 support for RD-Fremont. Regards, Sami Mujawar On 11/03/2024 01:14 pm, Prabin CA wrote: > Changes since V4: > - Addressed the comments shared by Levi for V3. > > Changes since V3: > - Rebase on top of latest upstream branch. > > Changes since V2: > - Removed author's signed-off on the patches, which is owned by another a= uthor. > > Changes since V1: > - Corrected memory map in the DSDT file. > > This patch series introduce support for RD-Fremont reference design > platform. This platform includes 32 CPUs, but the fixed virtual platform > (FVP) simulates 16 CPUs of the platform. There is one CPU per cluster in > the system and so the FVP simulates 16 clusters. Each of the CPUs > include 64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache. > The platform also includes system level cache of 32MB and 8GB of RAM. > Also, this patch series adding the extended SMBIO support for RD-Fremont > platform. > > In addition to patches that introduce RD-Fremont platform, there are > four patches that update support for existing platforms. The first patch > in this series correct the typo while defining the CPPC support. > The second patch in this series changes the data type of PcdSmmuBase > from u32 to u64. The third patch refactor the system memory map base and > size values. The fourth patch add a flag to enable PCIE support for > existing and future platforms. > > This patch series should be applied on top of the patch series > https://edk2.groups.io/g/devel/message/116262 > > Link to gitlab branch with the patches in this series - > https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platf= orms/-/commits/topics/rdfremont/ > > Prabin CA (7): > Platform/Sgi: Correct typo in defining CPPC performance limited regist= er > Platform/Sgi: Refactor system memory base and size definitions > Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms > Platform/Sgi: Add initial support for RD-Fremont platform > Platform/Sgi: Extend SMBIOS support for RD-Fremont > Platform/Sgi: Low Power Idle States for RD-Fremont > Platform/Sgi: Add CPPC support for RD-Fremont platform > > Shriram K (1): > Platform/Sgi: Add ACPI tables for RD-Fremont platform > > Vivek Gautam (1): > Platform/Sgi: Update the datatype of PcdSmmuBase from u32 to u64 > > Platform/ARM/SgiPkg/SgiPlatform.dec = | 3 +- > Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc = | 8 +- > Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc = | 8 +- > Platform/ARM/SgiPkg/{SgiMemoryMap2.dsc.inc =3D> SgiMemoryMap3.dsc.inc} = | 88 ++-- > Platform/ARM/SgiPkg/SgiPlatform.dsc.inc = | 12 +- > Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc = | 4 +- > Platform/ARM/SgiPkg/{RdV1/RdV1.dsc =3D> RdFremont/RdFremont.dsc} = | 14 +- > Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc = | 4 +- > Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc = | 4 +- > Platform/ARM/SgiPkg/RdV1/RdV1.dsc = | 4 +- > Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc = | 4 +- > Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc = | 4 +- > Platform/ARM/SgiPkg/SgiPlatform.fdf = | 4 +- > Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf = | 75 +++ > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf = | 5 +- > Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h = | 3 +- > Platform/ARM/SgiPkg/Include/SgiPlatform.h = | 5 + > Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c = | 5 +- > Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation= .c | 5 +- > Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c = | 1 + > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c = | 6 + > Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c = | 25 +- > Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl = | 512 ++++++++++++++++++++ > Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc = | 138 ++++++ > Platform/ARM/SgiPkg/AcpiTables/RdFremont/Pptt.aslc = | 167 +++++++ > Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc = | 10 + > 26 files changed, 1033 insertions(+), 85 deletions(-) > copy Platform/ARM/SgiPkg/{SgiMemoryMap2.dsc.inc =3D> SgiMemoryMap3.dsc.= inc} (62%) > copy Platform/ARM/SgiPkg/{RdV1/RdV1.dsc =3D> RdFremont/RdFremont.dsc} (= 77%) > create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.i= nf > create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdFremont/Dsdt.asl > create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdFremont/Madt.aslc > create mode 100644 Platform/ARM/SgiPkg/AcpiTables/RdFremont/Pptt.aslc > create mode 100644 Platform/ARM/SgiPkg/RdFremont/RdFremont.fdf.inc > -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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