From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web08.29837.1647866661614615744 for ; Mon, 21 Mar 2022 05:44:22 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=DEGvmY7m; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: ted.kuo@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647866661; x=1679402661; h=from:to:cc:subject:date:message-id; bh=+rFAu9uRAjYXrATa9KNSMA/RtcWpliGsj6pOuaVNm0w=; b=DEGvmY7mvULQ3Mhj3w4qbYojY2YhCwMiTv0ylZhsWrQuk54jiBjaE+VK 0Rf2hS6uu1dFLf3W8YkFjBB0GUkEYkOP0VLiWzSw18Tc+s3Bf77D/aABG 0ekSthlf2vqP4llyE5B0uMITfO0vmh03/lsMBLVS3GPXSKhptXjhrX3Bw VDk1z4oTYRwOM5AfCYH9FqY90lEuF3GEReeMDyoSaC7p6QHLzutsu7RaJ CA29vvqJ6tvpU75XkPWN9r4573Ry3D4XomXw0FqO7qD3VALH3IzfOEF46 rw0ZLlFPuidWQixEJ/XLqvAqiYdCqi8ngvxGFTx1UFZEDH6YCa7egOmr7 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10292"; a="318250648" X-IronPort-AV: E=Sophos;i="5.90,198,1643702400"; d="scan'208";a="318250648" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 05:44:20 -0700 X-IronPort-AV: E=Sophos;i="5.90,198,1643702400"; d="scan'208";a="692159723" Received: from tedkuo1-win10.gar.corp.intel.com ([10.5.215.13]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Mar 2022 05:44:19 -0700 From: "Kuo, Ted" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng , Ashraf Ali S Subject: [edk2-devel][PATCH 2/2] IntelFsp2Pkg: Ensure new stack is aligned to old stack for X64 Date: Mon, 21 Mar 2022 20:43:28 +0800 Message-Id: <8c8e4573d5998e2e957dfef66ab7a7774794a31b.1647864782.git.ted.kuo@intel.com> X-Mailer: git-send-email 2.16.2.windows.1 In-Reply-To: References: In-Reply-To: References: REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3865 Ensure bit3:0 of NewStack is aligned with bit3:0 of OldStack for X64 before switching stack. Otherwise, RSP may not be aligned to a 16-byte boundary after returning from SecTemporaryRamSupport. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Ashraf Ali S Signed-off-by: Ted Kuo --- IntelFsp2Pkg/FspSecCore/SecMain.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index d376fb8361..f93e2d2ff7 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -258,6 +258,14 @@ SecTemporaryRamSupport ( NewStack = (VOID *)(UINTN)PermanentMemoryBase; } + // + // Ensure bit3:0 of NewStack is aligned with bit3:0 of OldStack for X64 before switching stack. + // Otherwise, RSP may not be aligned to a 16-byte boundary after returning from SecTemporaryRamSupport. + // + if ((sizeof (UINTN) == sizeof (UINT64)) && (((UINTN)NewStack & 0x0F) != ((UINTN)OldStack & 0x0F))) { + NewStack = (VOID *)((UINTN)NewStack - 8); + } + // // Migrate Heap // -- 2.16.2.windows.1