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From: "Sean Rhodes" <sean@starlabs.systems>
To: devel@edk2.groups.io
Cc: Sean Rhodes <sean@starlabs.systems>,
	Guo Dong <guo.dong@intel.com>,
	Ray Ni <ray.ni@intel.com>,
	Maurice Ma <maurice.ma@intel.com>,
	Benjamin You <benjamin.you@intel.com>
Subject: [PATCH] UefiPayloadPkg: Hook up PCIE_BASE build option
Date: Mon,  4 Jul 2022 08:42:43 +0100
Message-Id: <8daed0cd002332cb8068e6afa690249bc02d0bad.1656920563.git.sean@starlabs.systems>
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Hook up PCIE_BASE to PcdPciExpressBaseAddress

Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
---
 UefiPayloadPkg/UefiPayloadPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload=
Pkg.dsc
index cfcf38578d..0de87bd6bd 100644
--- a/UefiPayloadPkg/UefiPayloadPkg.dsc
+++ b/UefiPayloadPkg/UefiPayloadPkg.dsc
@@ -33,6 +33,7 @@
   DEFINE UNIVERSAL_PAYLOAD            =3D FALSE=0D
   DEFINE SECURITY_STUB_ENABLE         =3D TRUE=0D
   DEFINE SMM_SUPPORT                  =3D FALSE=0D
+  DEFINE PCIE_BASE                    =3D 0=0D
   DEFINE PLATFORM_BOOT_TIMEOUT        =3D 3=0D
   DEFINE ABOVE_4G_MEMORY              =3D TRUE=0D
   DEFINE BOOT_MANAGER_ESCAPE          =3D FALSE=0D
@@ -506,7 +507,7 @@
 =0D
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31=0D
   gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100=0D
-  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0=0D
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|$(PCIE_BASE)=0D
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseSize|0=0D
   gEfiMdeModulePkgTokenSpaceGuid.PcdGhcbBase|0=0D
   gEfiMdeModulePkgTokenSpaceGuid.PcdTestKeyUsed|FALSE=0D
--=20
2.34.1