From: "Pete Batard" <pete@akeo.ie>
To: GH Cao <driver1998@foxmail.com>, devel@edk2.groups.io
Cc: ard.biesheuvel@arm.com, leif@nuviainc.com
Subject: Re: [edk2-platforms][PATCH] Platform/RaspberryPi: Update Rhpx.asl and Uart.asl to match GpuDevs.asl
Date: Tue, 28 Apr 2020 11:04:07 +0100 [thread overview]
Message-ID: <8ddb693c-f2f6-350f-1d23-f17a4dd63f5b@akeo.ie> (raw)
In-Reply-To: <20200428050907.287-1-driver1998@foxmail.com>
On 2020.04.28 06:09, GH Cao wrote:
> GPU devices are in container GPV0 for DMA constraints now, but references in
> Rhpx.asl and Uart.asl are not updated, which breaks the rhproxy driver of
> Windows 10.
>
> Signed-off-by: GH Cao <driver1998@foxmail.com>
> ---
> Platform/RaspberryPi/AcpiTables/Rhpx.asl | 112 +++++++++++------------
> Platform/RaspberryPi/AcpiTables/Uart.asl | 6 +-
> 2 files changed, 59 insertions(+), 59 deletions(-)
>
> diff --git a/Platform/RaspberryPi/AcpiTables/Rhpx.asl b/Platform/RaspberryPi/AcpiTables/Rhpx.asl
> index 0971e13..c8a1817 100644
> --- a/Platform/RaspberryPi/AcpiTables/Rhpx.asl
> +++ b/Platform/RaspberryPi/AcpiTables/Rhpx.asl
> @@ -30,7 +30,7 @@ Device (RHPX)
> 4000000, // Connection speed
> ClockPolarityLow, // Clock polarity
> ClockPhaseFirst, // Clock phase
> - "\\_SB.SPI0", // ResourceSource: SPI bus controller name
> + "\\_SB.GDV0.SPI0", // ResourceSource: SPI bus controller name
> 0, // ResourceSourceIndex
> // Resource usage
> // DescriptorName: creates name for offset of resource descriptor
> @@ -49,7 +49,7 @@ Device (RHPX)
> 4000000, // Connection speed
> ClockPolarityLow, // Clock polarity
> ClockPhaseFirst, // Clock phase
> - "\\_SB.SPI0", // ResourceSource: SPI bus controller name
> + "\\_SB.GDV0.SPI0", // ResourceSource: SPI bus controller name
> 0, // ResourceSourceIndex
> // Resource usage
> // DescriptorName: creates name for offset of resource descriptor
> @@ -61,7 +61,7 @@ Device (RHPX)
> , // SlaveMode: default to ControllerInitiated
> 0, // ConnectionSpeed: placeholder
> , // Addressing Mode: default to 7 bit
> - "\\_SB.I2C1", // ResourceSource: I2C bus controller name
> + "\\_SB.GDV0.I2C1", // ResourceSource: I2C bus controller name
> ,
> ,
> , // Descriptor Name: creates name for offset of resource descriptor
> @@ -80,92 +80,92 @@ Device (RHPX)
> 4000000, // Connection speed
> ClockPolarityLow, // Clock polarity
> ClockPhaseFirst, // Clock phase
> - "\\_SB.SPI1", // ResourceSource: SPI bus controller name
> + "\\_SB.GDV0.SPI1", // ResourceSource: SPI bus controller name
> 0, // ResourceSourceIndex
> // Resource usage
> // DescriptorName: creates name for offset of resource descriptor
> ) // Vendor Data
>
> // GPIO 2
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 2 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 2 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 2 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 2 }
> // GPIO 3
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 3 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 3 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 3 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 3 }
> // GPIO 4
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 4 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 4 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 4 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 4 }
> // GPIO 5
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 5 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 5 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 5 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 5 }
> // GPIO 6
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 6 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 6 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 6 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 6 }
> // GPIO 7
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 7 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 7 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 7 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 7 }
> // GPIO 8
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 8 }
> - GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GPI0",) { 8 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 8 }
> + GpioInt (Edge, ActiveBoth, Shared, PullUp, 0, "\\_SB.GDV0.GPI0",) { 8 }
> // GPIO 9
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 9 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 9 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 9 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 9 }
> // GPIO 10
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 10 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 10 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 10 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 10 }
> // GPIO 11
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 11 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 11 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 11 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 11 }
> // GPIO 12
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 12 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 12 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 12 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 12 }
> // GPIO 13
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 13 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 13 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 13 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 13 }
> // NTRAID#MSFT-7141401-2016/04/7-jordanrh - disable UART muxing
> // until a proper solution can be created for the dmap conflict
> // GPIO 14 - UART TX
> - // GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 14 }
> - // GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 14 }
> + // GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 14 }
> + // GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 14 }
> // GPIO 15 - UART RX
> - // GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 15 }
> - // GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 15 }
> + // GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 15 }
> + // GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 15 }
> // GPIO 16
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 16 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 16 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 16 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 16 }
> // GPIO 17
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 17 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 17 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 17 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 17 }
> // GPIO 18
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 18 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 18 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 18 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 18 }
> // GPIO 19
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 19 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 19 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 19 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 19 }
> // GPIO 20
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 20 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 20 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 20 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 20 }
> // GPIO 21
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 21 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 21 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 21 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 21 }
> // GPIO 22
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 22 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 22 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 22 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 22 }
> // GPIO 23
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 23 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 23 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 23 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 23 }
> // GPIO 24
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 24 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 24 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 24 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 24 }
> // GPIO 25
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 25 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 25 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 25 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 25 }
> // GPIO 26
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 26 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 26 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 26 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 26 }
> // GPIO 27
> - GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GPI0", 0, ResourceConsumer,,) { 27 }
> - GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GPI0",) { 27 }
> + GpioIO (Shared, PullDown, 0, 0, IoRestrictionNone, "\\_SB.GDV0.GPI0", 0, ResourceConsumer,,) { 27 }
> + GpioInt (Edge, ActiveBoth, Shared, PullDown, 0, "\\_SB.GDV0.GPI0",) { 27 }
> })
>
> Name (_DSD, Package()
> diff --git a/Platform/RaspberryPi/AcpiTables/Uart.asl b/Platform/RaspberryPi/AcpiTables/Uart.asl
> index f6a14d6..5a2404f 100644
> --- a/Platform/RaspberryPi/AcpiTables/Uart.asl
> +++ b/Platform/RaspberryPi/AcpiTables/Uart.asl
> @@ -127,9 +127,9 @@ Device(BTH0)
> 16, // ReceiveBufferSize
> 16, // TransmitBufferSize
> #if (RPI_MODEL == 4)
> - "\\_SB.URTM", // ResourceSource:
> + "\\_SB.GDV0.URTM", // ResourceSource:
> #else
> - "\\_SB.URT0", // ResourceSource:
> + "\\_SB.GDV0.URT0", // ResourceSource:
> #endif
> // UART bus controller name
> , // ResourceSourceIndex: assumed to be 0
> @@ -142,7 +142,7 @@ Device(BTH0)
> //
> // RPIQ connection for BT_ON/OFF
> //
> - GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.RPIQ", 0, ResourceConsumer, , ) { 128 }
> + GpioIO (Shared, PullUp, 0, 0, IoRestrictionNone, "\\_SB.GDV0.RPIQ", 0, ResourceConsumer, , ) { 128 }
> })
> Return (RBUF)
> }
>
Thanks for fixing this!
We should really have done the above in commit
fcc2a81066a24abac8673c901402316b6b252415 but missed it at the time.
Reviewed-by: Pete Batard <pete@akeo.ie>
next prev parent reply other threads:[~2020-04-28 10:04 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-28 5:09 [edk2-platforms][PATCH] Platform/RaspberryPi: Update Rhpx.asl and Uart.asl to match GpuDevs.asl GH Cao
2020-04-28 10:04 ` Pete Batard [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-04-28 1:22 GH Cao
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=8ddb693c-f2f6-350f-1d23-f17a4dd63f5b@akeo.ie \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox