From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web11.9986.1590140775609003826 for ; Fri, 22 May 2020 02:46:15 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: ard.biesheuvel@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 09A9D30E; Fri, 22 May 2020 02:46:15 -0700 (PDT) Received: from [192.168.1.81] (unknown [10.37.8.250]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E91FA3F305; Fri, 22 May 2020 02:46:11 -0700 (PDT) Subject: Re: [PATCH edk2-platforms 00/16] Add PCIe Support To: Wasim Khan , devel@edk2.groups.io, meenakshi.aggarwal@nxp.com, vabhav.sharma@nxp.com, V.Sethi@nxp.com, leif@nuviainc.com, jon@solid-run.com Cc: Wasim Khan References: <1590102139-16588-1-git-send-email-wasim.khan@oss.nxp.com> From: "Ard Biesheuvel" Message-ID: <8e8d0ede-17e6-bbb1-2b3a-ea420933c62b@arm.com> Date: Fri, 22 May 2020 11:46:07 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: <1590102139-16588-1-git-send-email-wasim.khan@oss.nxp.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 5/22/20 1:02 AM, Wasim Khan wrote: > From: Wasim Khan > > Add PCIe Support for NXP Layerscape SoC which supports > different PCIe controllers. > Use generic PCIe drivers and wire up PciHostBridgeLib, > PciSegmentLib and PciCpuIo2Dxe driver for controller > specific implementation. > Thanks. This is looking good. Please take a look at the feedback, and give others some time to respond as well. In the meantime, I think we can simply merge #14 and #16 right away (unless Leif has any objections) > Wasim Khan (16): > Silicon/NXP/NxpQoriqLs.dec: Add PCIe related PCDs. > Silicon/NXP: LS1043A: Define PCIe related PCDs > Silicon/NXP: Implement PciHostBridgeLib support > Silicon/NXP: PciHostBridgeLib: CFG Shift feature support for PCIeLS > Ctrl > Silicon/NXP: PciHostBridgeLib: Setup PCIe LsGen4 Controller and ATU > Windows > Silicon/NXP: PciHostBridgeLib: add Workaround for A-011451 > Silicon/NXP: PciHostBridgeLib: Dump Layerscale Gen4 ATU windows > Silicon/NXP: PciHostBridgeLib: Dump Layerscale iATU windows > Silicon/NXP: Implement PciSegmentLib for PCIe Layerscape Controller > Silicon/NXP: PciSegmentLib: Add ECAM config support for PCIe LS > Controller > Silicon/NXP: PciSegmentLib: Add support PCIe LsGen4 Controller > Silicon/NXP: PciSegmentLib: LsGen4Ctrl: Add Workaround for A-011264 > Silicon/NXP/Drivers: Implement PciCpuIo2Dxe Driver > Platform/NXP: LS1043aRdbPkg: Enable NetworkPkg > Platform/NXP: LS1043aRdbPkg: Enable PCIE support > Platform/NXP: LS1043aRdbPkg : Increase fv image size > > Silicon/NXP/NxpQoriqLs.dec | 13 + > Silicon/NXP/LS1043A/LS1043A.dsc.inc | 8 + > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.dsc | 20 + > Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 20 +- > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 40 + > .../Library/PciHostBridgeLib/PciHostBridgeLib.inf | 45 ++ > .../NXP/Library/PciSegmentLib/PciSegmentLib.inf | 36 + > Silicon/NXP/Include/Pcie.h | 231 ++++++ > Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 628 +++++++++++++++ > .../Library/PciHostBridgeLib/PciHostBridgeLib.c | 842 +++++++++++++++++++++ > Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c | 699 +++++++++++++++++ > 11 files changed, 2579 insertions(+), 3 deletions(-) > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf > create mode 100644 Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.inf > create mode 100755 Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.inf > create mode 100755 Silicon/NXP/Include/Pcie.h > create mode 100755 Silicon/NXP/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c > create mode 100644 Silicon/NXP/Library/PciHostBridgeLib/PciHostBridgeLib.c > create mode 100755 Silicon/NXP/Library/PciSegmentLib/PciSegmentLib.c >