* [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
@ 2024-02-02 9:11 dorax.hsueh
2024-02-02 17:36 ` Saloni Kasbekar
2024-04-08 22:25 ` Nate DeSimone
0 siblings, 2 replies; 10+ messages in thread
From: dorax.hsueh @ 2024-02-02 9:11 UTC (permalink / raw)
To: devel
Cc: DoraX Hsueh, Sai Chaganty, Rosen Chuang, Saloni Kasbekar,
Haoyu Tang, Nate DeSimone
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 18 +++++++++---------
.../AlderlakePRvp/OpenBoardPkg.fdf | 6 ++++++
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 +++++++++-
3 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..b57246ed 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -26,22 +26,22 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002F0000 #
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003D0000 # Flash addr (0xFF400000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00730000 # Flash addr (0xFF760000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007C0000 # Flash addr (0xFF7F0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00860000 # Flash addr (0xFF860000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009E0000 # Flash addr (0xFFA00000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A60000 # Flash addr (0xFFA80000)
SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C90000 # Flash addr (0xFFCB0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..dd66a74d 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
## This is the VARIABLE_STORE_HEADER
+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
# Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
#Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
# This can speed up the Variable Dispatch a bit.
0xB8, 0xDF, 0x02, 0x00,
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled
# Stage 6 - boot with advanced features enabled
#
- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
#
# 0: FSP Wrapper is running in Dispatch mode.
@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
+!endif
+
+[PcdsDynamicHii.common.DEFAULT]
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
+
[PcdsDynamicHii.X64.DEFAULT]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
--
2.26.2.windows.1
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* Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
2024-02-02 9:11 dorax.hsueh
@ 2024-02-02 17:36 ` Saloni Kasbekar
2024-04-08 22:25 ` Nate DeSimone
1 sibling, 0 replies; 10+ messages in thread
From: Saloni Kasbekar @ 2024-02-02 17:36 UTC (permalink / raw)
To: Hsueh, DoraX, devel@edk2.groups.io
Cc: Chaganty, Rangasai V, Chuang, Rosen, Tang, Haoyu,
Desimone, Nathaniel L
Reviewed-by: Saloni Kasbekar <saloni.kasbekar@intel.com>
-----Original Message-----
From: Hsueh, DoraX <dorax.hsueh@intel.com>
Sent: Friday, February 2, 2024 1:12 AM
To: devel@edk2.groups.io
Cc: Hsueh, DoraX <dorax.hsueh@intel.com>; Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Chuang, Rosen <rosen.chuang@intel.com>; Kasbekar, Saloni <saloni.kasbekar@intel.com>; Tang, Haoyu <haoyu.tang@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
Since installing windows does not meet the minimum system requirements, Added TPM related code to meet the requirements.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 18 +++++++++---------
.../AlderlakePRvp/OpenBoardPkg.fdf | 6 ++++++
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 +++++++++-
3 files changed, 24 insertions(+), 10 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..b57246ed 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/Fla
+++ shMapInclude.fdf
@@ -26,22 +26,22 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002F0000 #+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003D0000 # Flash addr (0xFF400000) SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00730000 # Flash addr (0xFF760000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007C0000 # Flash addr (0xFF7F0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00860000 # Flash addr (0xFF860000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 # -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009E0000 # Flash addr (0xFFA00000) SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A60000 # Flash addr (0xFFA80000) SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C90000 # Flash addr (0xFFCB0000)+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 # SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000) SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000 SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..dd66a74d 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fd
+++ f
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ## This is the VARIABLE_STORE_HEADER+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,+!else # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,+!endif #Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8 # This can speed up the Variable Dispatch a bit. 0xB8, 0xDF, 0x02, 0x00,diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd
+++ .dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled # Stage 6 - boot with advanced features enabled #- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5 # # 0: FSP Wrapper is running in Dispatch mode.@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16 gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}+!endif++[PcdsDynamicHii.common.DEFAULT]+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS+ [PcdsDynamicHii.X64.DEFAULT] gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout" gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"--
2.26.2.windows.1
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* Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
2024-02-02 9:11 dorax.hsueh
2024-02-02 17:36 ` Saloni Kasbekar
@ 2024-04-08 22:25 ` Nate DeSimone
1 sibling, 0 replies; 10+ messages in thread
From: Nate DeSimone @ 2024-04-08 22:25 UTC (permalink / raw)
To: Hsueh, DoraX, devel@edk2.groups.io
Cc: Chaganty, Rangasai V, Chuang, Rosen, Kasbekar, Saloni,
Tang, Haoyu
Hi Dora,
Removing FvAdvanced in a violation of the MinPlatform specification. The relevant section is here:
https://tianocore-docs.github.io/edk2-MinimumPlatformSpecification/draft/appendix_a_full_maps/a1_firmware_volume_layout.html#a1-firmware-volume-layout
Please add FvAdvanced back into the ROM.
In addition, PcdBootStage should be set to 6 by default (not 5).
Thanks,
Nate
> -----Original Message-----
> From: Hsueh, DoraX <dorax.hsueh@intel.com>
> Sent: Friday, February 2, 2024 1:12 AM
> To: devel@edk2.groups.io
> Cc: Hsueh, DoraX <dorax.hsueh@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Chuang, Rosen <rosen.chuang@intel.com>;
> Kasbekar, Saloni <saloni.kasbekar@intel.com>; Tang, Haoyu
> <haoyu.tang@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>
> Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install
> Windows11.
>
> From: DoraX Hsueh <dorax.hsueh@intel.com>
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=4665
>
> Since installing windows does not meet the minimum system requirements,
> Added TPM related code to meet the requirements.
>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Rosen Chuang <rosen.chuang@intel.com>
> Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
> Cc: Haoyu Tang <haoyu.tang@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
> ---
> .../Include/Fdf/FlashMapInclude.fdf | 20 +++++-----
> .../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++----------------
> .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++-
> .../AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 9 +----
> .../BiosInfo/BiosInfo.inf | 2 -
> .../AlderlakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
> 6 files changed, 25 insertions(+), 54 deletions(-)
>
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> index 03c198c0..9a4ae7e8 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> @@ -25,23 +25,21 @@ SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = 0x000020
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x00030000 # Flash addr (0xFF030000)
> SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
>
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x000E0000 # Flash addr (0xFF400000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00650000 #
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00730000 # Flash addr (0xFF760000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007C0000 # Flash addr (0xFF7F0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00860000 # Flash addr (0xFF860000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
>
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009E0000 # Flash addr (0xFFA00000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
> -SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A60000 # Flash addr (0xFFA80000)
> SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C90000 # Flash addr (0xFFCB0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> index f1ce271b..7fb6198f 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> @@ -113,9 +113,15 @@ DATA = {
> #Blockmap[1]: End
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> ## This is the VARIABLE_STORE_HEADER
> +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
> + # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
> + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
> + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
> +!else
> # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
> 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
> 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
> +!endif
> #Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
> # This can speed up the Variable Dispatch a bit.
> 0xB8, 0xDF, 0x02, 0x00,
> @@ -141,11 +147,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
> #NV_FTW_SPARE
>
> -
> -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize
> -gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize
> -FV = FvAdvanced
> -
> gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset|gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize
> gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase|gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize
> FV = FvOptional
> @@ -646,28 +647,6 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
>
> INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
>
> -
> -[FV.FvAdvanced]
> -BlockSize = $(FLASH_BLOCK_SIZE)
> -FvAlignment = 16
> -ERASE_POLARITY = 1
> -MEMORY_MAPPED = TRUE
> -STICKY_WRITE = TRUE
> -LOCK_CAP = TRUE
> -LOCK_STATUS = TRUE
> -WRITE_DISABLED_CAP = TRUE
> -WRITE_ENABLED_CAP = TRUE
> -WRITE_STATUS = TRUE
> -WRITE_LOCK_CAP = TRUE
> -WRITE_LOCK_STATUS = TRUE
> -READ_DISABLED_CAP = TRUE
> -READ_ENABLED_CAP = TRUE
> -READ_STATUS = TRUE
> -READ_LOCK_CAP = TRUE
> -READ_LOCK_STATUS = TRUE
> -FvNameGuid = B23E7388-9953-45C7-9201-0473DDE5487A
> -
> -
> [FV.FvFwBinaries]
> BlockSize = $(FLASH_BLOCK_SIZE)
> FvAlignment = 16
> @@ -688,10 +667,6 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
>
> -
> -
> -
> -
> [FV.FvOptional]
> BlockSize = $(FLASH_BLOCK_SIZE)
> FvAlignment = 16
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> index 3eb9a575..b52ed92c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> @@ -25,7 +25,7 @@
> # Stage 5 - boot to OS with security boot enabled
> # Stage 6 - boot with advanced features enabled
> #
> - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
> + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
>
> #
> # 0: FSP Wrapper is running in Dispatch mode.
> @@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
> gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>
> +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
> +!endif
> +
> +[PcdsDynamicHii.common.DEFAULT]
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
> +
> [PcdsDynamicHii.X64.DEFAULT]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
> gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
> index 64462900..306b42d9 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
> @@ -19,7 +19,7 @@
> #include <Ppi/FirmwareVolumeInfoMeasurementExcluded.h>
> #include <Library/MemoryAllocationLib.h>
>
> -#define BASE_FV_SIZE 10
> +#define BASE_FV_SIZE 9
>
> #define FSP_WRAPPER_FV_SIZE 3
>
> @@ -65,13 +65,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
> FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize),
> FixedPcdGet32 (PcdFlashNvStorageVariableBase)
> },
> - {
> - FIT_TYPE_07_BIOS_STARTUP_MODULE,
> - BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
> - 0x0100,
> - FixedPcdGet32 (PcdFlashFvAdvancedSize),
> - FixedPcdGet32 (PcdFlashFvAdvancedBase)
> - },
> {
> FIT_TYPE_07_BIOS_STARTUP_MODULE,
> BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> index b1145180..70b1f80b 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
> @@ -51,8 +51,6 @@
> gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
> gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase ## CONSUMES
> gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize ## CONSUMES
> - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
> - gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
> gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase ## CONSUMES
> gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize ## CONSUMES
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
> index 0f0ed386..7f3295d8 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
> @@ -28,7 +28,6 @@ Include
> #
> # FvImage File
> #
> - gFvAdvancedFileGuid = {0xAD198BA5, 0xC330, 0x41CD, {0xB0, 0x97, 0x16, 0x48, 0x83, 0x28, 0xB7, 0x98}}
> gFvOsBootFileGuid = {0xB9020753, 0x84A8, 0x4BB6, {0x94, 0x7C, 0xCE, 0x7D, 0x41, 0xF5, 0xCE, 0x39}}
> gFvUefiBootFileGuid = {0x9E21FD93, 0x9C72, 0x4c15, {0x8C, 0x4B, 0xE7, 0x7F, 0x1D, 0xB2, 0xD7, 0x92}}
> gTianoLogoGuid = {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
> --
> 2.26.2.windows.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
@ 2024-04-09 6:12 dorax.hsueh
0 siblings, 0 replies; 10+ messages in thread
From: dorax.hsueh @ 2024-04-09 6:12 UTC (permalink / raw)
To: devel
Cc: DoraX Hsueh, Sai Chaganty, Rosen Chuang, Saloni Kasbekar,
Haoyu Tang, Nate DeSimone
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
1. Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
2. Remove FvAdvanced.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 20 +++++-----
.../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++----------------
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++-
.../AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 9 +----
.../BiosInfo/BiosInfo.inf | 2 -
.../AlderlakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
6 files changed, 25 insertions(+), 54 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..9a4ae7e8 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -25,23 +25,21 @@ SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize = 0x000020
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x00030000 # Flash addr (0xFF030000)
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x000E0000 # Flash addr (0xFF400000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00650000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00730000 # Flash addr (0xFF760000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007C0000 # Flash addr (0xFF7F0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00860000 # Flash addr (0xFF860000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009E0000 # Flash addr (0xFFA00000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A60000 # Flash addr (0xFFA80000)
SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C90000 # Flash addr (0xFFCB0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..7fb6198f 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
## This is the VARIABLE_STORE_HEADER
+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
# Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
#Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
# This can speed up the Variable Dispatch a bit.
0xB8, 0xDF, 0x02, 0x00,
@@ -141,11 +147,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|gEfiMdeModulePkgTo
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
#NV_FTW_SPARE
-
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize
-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize
-FV = FvAdvanced
-
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset|gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase|gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize
FV = FvOptional
@@ -646,28 +647,6 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
-
-[FV.FvAdvanced]
-BlockSize = $(FLASH_BLOCK_SIZE)
-FvAlignment = 16
-ERASE_POLARITY = 1
-MEMORY_MAPPED = TRUE
-STICKY_WRITE = TRUE
-LOCK_CAP = TRUE
-LOCK_STATUS = TRUE
-WRITE_DISABLED_CAP = TRUE
-WRITE_ENABLED_CAP = TRUE
-WRITE_STATUS = TRUE
-WRITE_LOCK_CAP = TRUE
-WRITE_LOCK_STATUS = TRUE
-READ_DISABLED_CAP = TRUE
-READ_ENABLED_CAP = TRUE
-READ_STATUS = TRUE
-READ_LOCK_CAP = TRUE
-READ_LOCK_STATUS = TRUE
-FvNameGuid = B23E7388-9953-45C7-9201-0473DDE5487A
-
-
[FV.FvFwBinaries]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
@@ -688,10 +667,6 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
-
-
-
-
[FV.FvOptional]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled
# Stage 6 - boot with advanced features enabled
#
- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
#
# 0: FSP Wrapper is running in Dispatch mode.
@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
+!endif
+
+[PcdsDynamicHii.common.DEFAULT]
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
+
[PcdsDynamicHii.X64.DEFAULT]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
index 64462900..306b42d9 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -19,7 +19,7 @@
#include <Ppi/FirmwareVolumeInfoMeasurementExcluded.h>
#include <Library/MemoryAllocationLib.h>
-#define BASE_FV_SIZE 10
+#define BASE_FV_SIZE 9
#define FSP_WRAPPER_FV_SIZE 3
@@ -65,13 +65,6 @@ GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize),
FixedPcdGet32 (PcdFlashNvStorageVariableBase)
},
- {
- FIT_TYPE_07_BIOS_STARTUP_MODULE,
- BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
- 0x0100,
- FixedPcdGet32 (PcdFlashFvAdvancedSize),
- FixedPcdGet32 (PcdFlashFvAdvancedBase)
- },
{
FIT_TYPE_07_BIOS_STARTUP_MODULE,
BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
index b1145180..70b1f80b 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -51,8 +51,6 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize ## CONSUMES
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesBase ## CONSUMES
gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase ## CONSUMES
- gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize ## CONSUMES
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalBase ## CONSUMES
gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize ## CONSUMES
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase ## CONSUMES
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
index 0f0ed386..7f3295d8 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/OpenBoardPkg.dec
@@ -28,7 +28,6 @@ Include
#
# FvImage File
#
- gFvAdvancedFileGuid = {0xAD198BA5, 0xC330, 0x41CD, {0xB0, 0x97, 0x16, 0x48, 0x83, 0x28, 0xB7, 0x98}}
gFvOsBootFileGuid = {0xB9020753, 0x84A8, 0x4BB6, {0x94, 0x7C, 0xCE, 0x7D, 0x41, 0xF5, 0xCE, 0x39}}
gFvUefiBootFileGuid = {0x9E21FD93, 0x9C72, 0x4c15, {0x8C, 0x4B, 0xE7, 0x7F, 0x1D, 0xB2, 0xD7, 0x92}}
gTianoLogoGuid = {0x7BB28B99, 0x61BB, 0x11D5, {0x9A, 0x5D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D}}
--
2.26.2.windows.1
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* [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
@ 2024-04-22 7:06 dorax.hsueh
0 siblings, 0 replies; 10+ messages in thread
From: dorax.hsueh @ 2024-04-22 7:06 UTC (permalink / raw)
To: devel
Cc: DoraX Hsueh, Sai Chaganty, Rosen Chuang, Saloni Kasbekar,
Haoyu Tang, Nate DeSimone
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
1. Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
2. Support stage 6, add FvAdvancedPreMemory.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 26 +++++++------
.../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
.../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++++++++++++++++--
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++-
4 files changed, 57 insertions(+), 17 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..3e515d4e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
index 4cdc9c01..8468410e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
@@ -49,6 +49,7 @@
# Include PCD configuration for this board
#
!include OpenBoardPkgPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
################################################################################
#
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..3115ce50 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
## This is the VARIABLE_STORE_HEADER
+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
# Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
#Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
# This can speed up the Variable Dispatch a bit.
0xB8, 0xDF, 0x02, 0x00,
@@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
# FSP_T Section
FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+FV = FvAdvancedPreMemory
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
FV = FvPreMemory
@@ -646,6 +656,29 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
+#
+# Pre-memory Advanced Features
+#
+[FV.FvAdvancedPreMemory]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
+
+!include AdvancedFeaturePkg/Include/PreMemory.fdf
[FV.FvAdvanced]
BlockSize = $(FLASH_BLOCK_SIZE)
@@ -688,10 +721,6 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
-
-
-
-
[FV.FvOptional]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled
# Stage 6 - boot with advanced features enabled
#
- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
#
# 0: FSP Wrapper is running in Dispatch mode.
@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
+!endif
+
+[PcdsDynamicHii.common.DEFAULT]
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
+
[PcdsDynamicHii.X64.DEFAULT]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
--
2.26.2.windows.1
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* [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
@ 2024-04-22 8:37 dorax.hsueh
2024-05-02 23:43 ` Nate DeSimone
0 siblings, 1 reply; 10+ messages in thread
From: dorax.hsueh @ 2024-04-22 8:37 UTC (permalink / raw)
To: devel
Cc: DoraX Hsueh, Sai Chaganty, Rosen Chuang, Saloni Kasbekar,
Haoyu Tang, Nate DeSimone, Chasel Chiu
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
1. Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
2. Support stage 6, add FvAdvancedPreMemory.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 26 +++++++------
.../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
.../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++++++++++++++++--
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++-
4 files changed, 57 insertions(+), 17 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..3e515d4e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
index 4cdc9c01..8468410e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
@@ -49,6 +49,7 @@
# Include PCD configuration for this board
#
!include OpenBoardPkgPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
################################################################################
#
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..3115ce50 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
## This is the VARIABLE_STORE_HEADER
+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
# Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
#Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
# This can speed up the Variable Dispatch a bit.
0xB8, 0xDF, 0x02, 0x00,
@@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
# FSP_T Section
FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+FV = FvAdvancedPreMemory
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
FV = FvPreMemory
@@ -646,6 +656,29 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
+#
+# Pre-memory Advanced Features
+#
+[FV.FvAdvancedPreMemory]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
+
+!include AdvancedFeaturePkg/Include/PreMemory.fdf
[FV.FvAdvanced]
BlockSize = $(FLASH_BLOCK_SIZE)
@@ -688,10 +721,6 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
-
-
-
-
[FV.FvOptional]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled
# Stage 6 - boot with advanced features enabled
#
- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
#
# 0: FSP Wrapper is running in Dispatch mode.
@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
+!endif
+
+[PcdsDynamicHii.common.DEFAULT]
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
+
[PcdsDynamicHii.X64.DEFAULT]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
--
2.26.2.windows.1
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* Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
2024-04-22 8:37 dorax.hsueh
@ 2024-05-02 23:43 ` Nate DeSimone
0 siblings, 0 replies; 10+ messages in thread
From: Nate DeSimone @ 2024-05-02 23:43 UTC (permalink / raw)
To: Hsueh, DoraX, devel@edk2.groups.io
Cc: Chaganty, Rangasai V, Chuang, Rosen, Kasbekar, Saloni,
Tang, Haoyu, Chiu, Chasel
Hi Dora,
Feedback below.
Thanks,
Nate
> -----Original Message-----
> From: Hsueh, DoraX <dorax.hsueh@intel.com>
> Sent: Monday, April 22, 2024 1:37 AM
> To: devel@edk2.groups.io
> Cc: Hsueh, DoraX <dorax.hsueh@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Chuang, Rosen <rosen.chuang@intel.com>;
> Kasbekar, Saloni <saloni.kasbekar@intel.com>; Tang, Haoyu
> <haoyu.tang@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install
> Windows11.
>
> From: DoraX Hsueh <dorax.hsueh@intel.com>
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=4665
>
> 1. Since installing windows does not meet the minimum system requirements,
> Added TPM related code to meet the requirements.
> 2. Support stage 6, add FvAdvancedPreMemory.
>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Rosen Chuang <rosen.chuang@intel.com>
> Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
> Cc: Haoyu Tang <haoyu.tang@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
> ---
> .../Include/Fdf/FlashMapInclude.fdf | 26 +++++++------
> .../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
> .../AlderlakePRvp/OpenBoardPkg.fdf | 37 +++++++++++++++++--
> .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++++-
> 4 files changed, 57 insertions(+), 17 deletions(-)
>
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> index 03c198c0..3e515d4e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> @@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
> SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
>
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
>
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
> -SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
> SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> index 4cdc9c01..8468410e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> @@ -49,6 +49,7 @@
> # Include PCD configuration for this board
> #
> !include OpenBoardPkgPcd.dsc
> + !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
>
> ################################################################################
> #
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> index f1ce271b..3115ce50 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> @@ -113,9 +113,15 @@ DATA = {
> #Blockmap[1]: End
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> ## This is the VARIABLE_STORE_HEADER
> +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
> + # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
> + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
> + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
> +!else
> # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
> 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
> 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
> +!endif
> #Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
> # This can speed up the Variable Dispatch a bit.
> 0xB8, 0xDF, 0x02, 0x00,
> @@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
> # FSP_T Section
> FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
>
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +FV = FvAdvancedPreMemory
> +
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> FV = FvPreMemory
> @@ -646,6 +656,29 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
>
> INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
>
> +#
> +# Pre-memory Advanced Features
> +#
> +[FV.FvAdvancedPreMemory]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
> +
> +!include AdvancedFeaturePkg/Include/PreMemory.fdf
>
You forgot to add FvAdvancedUncompact and the include for AdvancedFeaturePkg/Include/PostMemory.fdf. Something like this should be added:
[FV.FvAdvancedUncompact]
FvAlignment = 16
ERASE_POLARITY = 1
MEMORY_MAPPED = TRUE
STICKY_WRITE = TRUE
LOCK_CAP = TRUE
LOCK_STATUS = TRUE
WRITE_DISABLED_CAP = TRUE
WRITE_ENABLED_CAP = TRUE
WRITE_STATUS = TRUE
WRITE_LOCK_CAP = TRUE
WRITE_LOCK_STATUS = TRUE
READ_DISABLED_CAP = TRUE
READ_ENABLED_CAP = TRUE
READ_STATUS = TRUE
READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = BE3DF86F-E464-44A3-83F7-0D27E6B88C27
!include AdvancedFeaturePkg/Include/PostMemory.fdf
> [FV.FvAdvanced]
> BlockSize = $(FLASH_BLOCK_SIZE)
> @@ -688,10 +721,6 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
>
You forgot to add the nested FV for FvAdvancedUncompact. Something like this should be included:
FILE FV_IMAGE = 5248467B-B87B-4E74-AC02-398AF4BCB712 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FvAdvancedUncompact
}
}
> -
> -
> -
> -
> [FV.FvOptional]
> BlockSize = $(FLASH_BLOCK_SIZE)
> FvAlignment = 16
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> index 3eb9a575..b52ed92c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> @@ -25,7 +25,7 @@
> # Stage 5 - boot to OS with security boot enabled
> # Stage 6 - boot with advanced features enabled
> #
> - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
> + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
>
> #
> # 0: FSP Wrapper is running in Dispatch mode.
> @@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
> gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>
> +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
> +!endif
> +
> +[PcdsDynamicHii.common.DEFAULT]
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
> +
> [PcdsDynamicHii.X64.DEFAULT]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
> gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
> --
> 2.26.2.windows.1
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* [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
@ 2024-05-06 9:49 dorax.hsueh
2024-05-06 17:23 ` Nate DeSimone
2024-05-06 17:24 ` Nate DeSimone
0 siblings, 2 replies; 10+ messages in thread
From: dorax.hsueh @ 2024-05-06 9:49 UTC (permalink / raw)
To: devel
Cc: DoraX Hsueh, Sai Chaganty, Rosen Chuang, Saloni Kasbekar,
Haoyu Tang, Nate DeSimone, Chasel Chiu
From: DoraX Hsueh <dorax.hsueh@intel.com>
https://bugzilla.tianocore.org/show_bug.cgi?id=4665
1. Since installing windows does not meet the minimum system requirements,
Added TPM related code to meet the requirements.
2. Support stage 6, add FvAdvancedPreMemory.
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Rosen Chuang <rosen.chuang@intel.com>
Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
Cc: Haoyu Tang <haoyu.tang@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
---
.../Include/Fdf/FlashMapInclude.fdf | 26 ++++----
.../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
.../AlderlakePRvp/OpenBoardPkg.fdf | 66 +++++++++++++++++--
.../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++-
4 files changed, 86 insertions(+), 17 deletions(-)
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
index 03c198c0..3e515d4e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
@@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
-SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
+SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
-SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
+SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
index 4cdc9c01..8468410e 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
@@ -49,6 +49,7 @@
# Include PCD configuration for this board
#
!include OpenBoardPkgPcd.dsc
+ !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
################################################################################
#
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
index f1ce271b..39afcf4c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
@@ -113,9 +113,15 @@ DATA = {
#Blockmap[1]: End
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
## This is the VARIABLE_STORE_HEADER
+!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
# Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
#Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
# This can speed up the Variable Dispatch a bit.
0xB8, 0xDF, 0x02, 0x00,
@@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
# FSP_T Section
FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
+FV = FvAdvancedPreMemory
+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
FV = FvPreMemory
@@ -646,6 +656,53 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
+#
+# Pre-memory Advanced Features
+#
+[FV.FvAdvancedPreMemory]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
+
+!include AdvancedFeaturePkg/Include/PreMemory.fdf
+
+#
+# Post-Memory Advanced Features
+#
+[FV.FvAdvancedUncompact]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = BE3DF86F-E464-44A3-83F7-0D27E6B88C27
+
+!include AdvancedFeaturePkg/Include/PostMemory.fdf
[FV.FvAdvanced]
BlockSize = $(FLASH_BLOCK_SIZE)
@@ -667,6 +724,11 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = B23E7388-9953-45C7-9201-0473DDE5487A
+FILE FV_IMAGE = 5248467B-B87B-4E74-AC02-398AF4BCB712 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ SECTION FV_IMAGE = FvAdvancedUncompact
+ }
+ }
[FV.FvFwBinaries]
BlockSize = $(FLASH_BLOCK_SIZE)
@@ -688,10 +750,6 @@ READ_LOCK_CAP = TRUE
READ_LOCK_STATUS = TRUE
FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
-
-
-
-
[FV.FvOptional]
BlockSize = $(FLASH_BLOCK_SIZE)
FvAlignment = 16
diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
index 3eb9a575..b52ed92c 100644
--- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
@@ -25,7 +25,7 @@
# Stage 5 - boot to OS with security boot enabled
# Stage 6 - boot with advanced features enabled
#
- gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
+ gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
#
# 0: FSP Wrapper is running in Dispatch mode.
@@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
+!endif
+
+[PcdsDynamicHii.common.DEFAULT]
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
+
[PcdsDynamicHii.X64.DEFAULT]
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
--
2.26.2.windows.1
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* Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
2024-05-06 9:49 dorax.hsueh
@ 2024-05-06 17:23 ` Nate DeSimone
2024-05-06 17:24 ` Nate DeSimone
1 sibling, 0 replies; 10+ messages in thread
From: Nate DeSimone @ 2024-05-06 17:23 UTC (permalink / raw)
To: Hsueh, DoraX, devel@edk2.groups.io
Cc: Chaganty, Rangasai V, Chuang, Rosen, Kasbekar, Saloni,
Tang, Haoyu, Chiu, Chasel
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> -----Original Message-----
> From: Hsueh, DoraX <dorax.hsueh@intel.com>
> Sent: Monday, May 6, 2024 2:50 AM
> To: devel@edk2.groups.io
> Cc: Hsueh, DoraX <dorax.hsueh@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Chuang, Rosen <rosen.chuang@intel.com>;
> Kasbekar, Saloni <saloni.kasbekar@intel.com>; Tang, Haoyu
> <haoyu.tang@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install
> Windows11.
>
> From: DoraX Hsueh <dorax.hsueh@intel.com>
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=4665
>
> 1. Since installing windows does not meet the minimum system requirements,
> Added TPM related code to meet the requirements.
> 2. Support stage 6, add FvAdvancedPreMemory.
>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Rosen Chuang <rosen.chuang@intel.com>
> Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
> Cc: Haoyu Tang <haoyu.tang@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
> ---
> .../Include/Fdf/FlashMapInclude.fdf | 26 ++++----
> .../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
> .../AlderlakePRvp/OpenBoardPkg.fdf | 66 +++++++++++++++++--
> .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++-
> 4 files changed, 86 insertions(+), 17 deletions(-)
>
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> index 03c198c0..3e515d4e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> @@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
> SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
>
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
>
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
> -SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
> SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> index 4cdc9c01..8468410e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> @@ -49,6 +49,7 @@
> # Include PCD configuration for this board
> #
> !include OpenBoardPkgPcd.dsc
> + !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
>
> ################################################################################
> #
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> index f1ce271b..39afcf4c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> @@ -113,9 +113,15 @@ DATA = {
> #Blockmap[1]: End
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> ## This is the VARIABLE_STORE_HEADER
> +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
> + # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
> + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
> + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
> +!else
> # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
> 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
> 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
> +!endif
> #Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
> # This can speed up the Variable Dispatch a bit.
> 0xB8, 0xDF, 0x02, 0x00,
> @@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
> # FSP_T Section
> FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
>
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +FV = FvAdvancedPreMemory
> +
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> FV = FvPreMemory
> @@ -646,6 +656,53 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
>
> INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
>
> +#
> +# Pre-memory Advanced Features
> +#
> +[FV.FvAdvancedPreMemory]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
> +
> +!include AdvancedFeaturePkg/Include/PreMemory.fdf
> +
> +#
> +# Post-Memory Advanced Features
> +#
> +[FV.FvAdvancedUncompact]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +FvNameGuid = BE3DF86F-E464-44A3-83F7-0D27E6B88C27
> +
> +!include AdvancedFeaturePkg/Include/PostMemory.fdf
>
> [FV.FvAdvanced]
> BlockSize = $(FLASH_BLOCK_SIZE)
> @@ -667,6 +724,11 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = B23E7388-9953-45C7-9201-0473DDE5487A
>
> +FILE FV_IMAGE = 5248467B-B87B-4E74-AC02-398AF4BCB712 {
> + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> + SECTION FV_IMAGE = FvAdvancedUncompact
> + }
> + }
>
> [FV.FvFwBinaries]
> BlockSize = $(FLASH_BLOCK_SIZE)
> @@ -688,10 +750,6 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
>
> -
> -
> -
> -
> [FV.FvOptional]
> BlockSize = $(FLASH_BLOCK_SIZE)
> FvAlignment = 16
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> index 3eb9a575..b52ed92c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> @@ -25,7 +25,7 @@
> # Stage 5 - boot to OS with security boot enabled
> # Stage 6 - boot with advanced features enabled
> #
> - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
> + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
>
> #
> # 0: FSP Wrapper is running in Dispatch mode.
> @@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
> gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>
> +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
> +!endif
> +
> +[PcdsDynamicHii.common.DEFAULT]
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
> +
> [PcdsDynamicHii.X64.DEFAULT]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
> gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
> --
> 2.26.2.windows.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11.
2024-05-06 9:49 dorax.hsueh
2024-05-06 17:23 ` Nate DeSimone
@ 2024-05-06 17:24 ` Nate DeSimone
1 sibling, 0 replies; 10+ messages in thread
From: Nate DeSimone @ 2024-05-06 17:24 UTC (permalink / raw)
To: Hsueh, DoraX, devel@edk2.groups.io
Cc: Chaganty, Rangasai V, Chuang, Rosen, Kasbekar, Saloni,
Tang, Haoyu, Chiu, Chasel
Pushed as 0ab97ab
> -----Original Message-----
> From: Hsueh, DoraX <dorax.hsueh@intel.com>
> Sent: Monday, May 6, 2024 2:50 AM
> To: devel@edk2.groups.io
> Cc: Hsueh, DoraX <dorax.hsueh@intel.com>; Chaganty, Rangasai V
> <rangasai.v.chaganty@intel.com>; Chuang, Rosen <rosen.chuang@intel.com>;
> Kasbekar, Saloni <saloni.kasbekar@intel.com>; Tang, Haoyu
> <haoyu.tang@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Chiu, Chasel <chasel.chiu@intel.com>
> Subject: [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install
> Windows11.
>
> From: DoraX Hsueh <dorax.hsueh@intel.com>
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=4665
>
> 1. Since installing windows does not meet the minimum system requirements,
> Added TPM related code to meet the requirements.
> 2. Support stage 6, add FvAdvancedPreMemory.
>
> Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
> Cc: Rosen Chuang <rosen.chuang@intel.com>
> Cc: Saloni Kasbekar <saloni.kasbekar@intel.com>
> Cc: Haoyu Tang <haoyu.tang@intel.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Signed-off-by: DoraX Hsueh <dorax.hsueh@intel.com>
> ---
> .../Include/Fdf/FlashMapInclude.fdf | 26 ++++----
> .../AlderlakePRvp/OpenBoardPkg.dsc | 1 +
> .../AlderlakePRvp/OpenBoardPkg.fdf | 66 +++++++++++++++++--
> .../AlderlakePRvp/OpenBoardPkgPcd.dsc | 10 ++-
> 4 files changed, 86 insertions(+), 17 deletions(-)
>
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> index 03c198c0..3e515d4e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/Include/Fdf/FlashMapInclude.fdf
> @@ -26,27 +26,29 @@ SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x000300
> SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x00030000 #
>
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = 0x000E0000 # Flash addr (0xFF0E0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x00310000 #
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003F0000 # Flash addr (0xFF400000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x002E0000 #
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x003C0000 # Flash addr (0xFF3C0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x00360000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00750000 # Flash addr (0xFF760000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = 0x00720000 # Flash addr (0xFF720000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = 0x00090000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007E0000 # Flash addr (0xFF7F0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x007B0000 # Flash addr (0xFF7B0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = 0x000A0000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00880000 # Flash addr (0xFF860000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = 0x00850000 # Flash addr (0xFF850000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x00180000 #
>
> -SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x00A00000 # Flash addr (0xFFA00000)
> +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x009D0000 # Flash addr (0xFF9D0000)
> SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x00080000 # Keep 0x80000 or larger
> -SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A80000 # Flash addr (0xFFA80000)
> +SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = 0x00A50000 # Flash addr (0xFFA50000)
> SET gIntelSiliconPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x00230000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00CB0000 # Flash addr (0xFFCB0000)
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00040000 #
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CF0000 # Flash addr (0xFFCF0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x00C80000 # Flash addr (0xFFC80000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = 0x00060000 #
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = 0x00CE0000 # Flash addr (0xFFCE0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A0000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D90000 # Flash addr (0xFFD90000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = 0x00D80000 # Flash addr (0xFFD80000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x00150000
> -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = 0x00ED0000 # Flash addr (0xFFED0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00010000
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset = 0x00EE0000 # Flash addr (0xFFEE0000)
> +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize = 0x00010000 #
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = 0x00EF0000 # Flash addr (0xFFEF0000)
> SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = 0x00110000
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> index 4cdc9c01..8468410e 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.dsc
> @@ -49,6 +49,7 @@
> # Include PCD configuration for this board
> #
> !include OpenBoardPkgPcd.dsc
> + !include AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc
>
> ################################################################################
> #
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> index f1ce271b..39afcf4c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkg.fdf
> @@ -113,9 +113,15 @@ DATA = {
> #Blockmap[1]: End
> 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> ## This is the VARIABLE_STORE_HEADER
> +!if gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable == TRUE
> + # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
> + 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
> + 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
> +!else
> # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
> 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
> 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
> +!endif
> #Size: 0x2E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x2DFB8
> # This can speed up the Variable Dispatch a bit.
> 0xB8, 0xDF, 0x02, 0x00,
> @@ -189,6 +195,10 @@ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|gMinPlatformPkgTokenSpaceGuid.P
> # FSP_T Section
> FILE = $(PLATFORM_FSP_BIN_PACKAGE)/Fsp_Rebased_T.fd
>
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedPreMemorySize
> +FV = FvAdvancedPreMemory
> +
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize
> FV = FvPreMemory
> @@ -646,6 +656,53 @@ INF $(PLATFORM_PACKAGE)/Tcg/Tcg2PlatformDxe/Tcg2PlatformDxe.inf
>
> INF IntelSiliconPkg/Feature/SmmAccess/SmmAccessDxe/SmmAccess.inf
>
> +#
> +# Pre-memory Advanced Features
> +#
> +[FV.FvAdvancedPreMemory]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +FvNameGuid = 6053D78A-457E-4490-A237-31D0FBE2F305
> +
> +!include AdvancedFeaturePkg/Include/PreMemory.fdf
> +
> +#
> +# Post-Memory Advanced Features
> +#
> +[FV.FvAdvancedUncompact]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +FvNameGuid = BE3DF86F-E464-44A3-83F7-0D27E6B88C27
> +
> +!include AdvancedFeaturePkg/Include/PostMemory.fdf
>
> [FV.FvAdvanced]
> BlockSize = $(FLASH_BLOCK_SIZE)
> @@ -667,6 +724,11 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = B23E7388-9953-45C7-9201-0473DDE5487A
>
> +FILE FV_IMAGE = 5248467B-B87B-4E74-AC02-398AF4BCB712 {
> + SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> + SECTION FV_IMAGE = FvAdvancedUncompact
> + }
> + }
>
> [FV.FvFwBinaries]
> BlockSize = $(FLASH_BLOCK_SIZE)
> @@ -688,10 +750,6 @@ READ_LOCK_CAP = TRUE
> READ_LOCK_STATUS = TRUE
> FvNameGuid = 8B98AB22-E354-42f0-88B9-049810F0FDAA
>
> -
> -
> -
> -
> [FV.FvOptional]
> BlockSize = $(FLASH_BLOCK_SIZE)
> FvAlignment = 16
> diff --git a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> index 3eb9a575..b52ed92c 100644
> --- a/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/AlderlakeOpenBoardPkg/AlderlakePRvp/OpenBoardPkgPcd.dsc
> @@ -25,7 +25,7 @@
> # Stage 5 - boot to OS with security boot enabled
> # Stage 6 - boot with advanced features enabled
> #
> - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4
> + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|5
>
> #
> # 0: FSP Wrapper is running in Dispatch mode.
> @@ -313,6 +313,14 @@ gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000
> gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|16
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>
> +!if gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable == TRUE
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInitializationPolicy|1
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x5a, 0xf2, 0x6b, 0x28, 0xc3, 0xc2, 0x8c, 0x40, 0xb3, 0xb4, 0x25, 0xe6, 0x75, 0x8b, 0x73, 0x17}
> +!endif
> +
> +[PcdsDynamicHii.common.DEFAULT]
> + gEfiSecurityPkgTokenSpaceGuid.PcdTpm2AcpiTableRev|L"TCG2_VERSION"|gTcg2ConfigFormSetGuid|0x8|4|NV,BS
> +
> [PcdsDynamicHii.X64.DEFAULT]
> gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
> gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
> --
> 2.26.2.windows.1
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2024-04-09 6:12 [edk2-devel] [PATCH] AlderlakeOpenBoardPkg: Fix BootStage 5 can't install Windows11 dorax.hsueh
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2024-05-06 9:49 dorax.hsueh
2024-05-06 17:23 ` Nate DeSimone
2024-05-06 17:24 ` Nate DeSimone
2024-04-22 8:37 dorax.hsueh
2024-05-02 23:43 ` Nate DeSimone
2024-04-22 7:06 dorax.hsueh
2024-02-02 9:11 dorax.hsueh
2024-02-02 17:36 ` Saloni Kasbekar
2024-04-08 22:25 ` Nate DeSimone
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