From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=209.132.183.28; helo=mx1.redhat.com; envelope-from=lersek@redhat.com; receiver=edk2-devel@lists.01.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2581B21A1099D for ; Mon, 27 Nov 2017 07:29:53 -0800 (PST) Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1807213A41; Mon, 27 Nov 2017 15:34:15 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-120-232.rdu2.redhat.com [10.10.120.232]) by smtp.corp.redhat.com (Postfix) with ESMTP id 65BBC60BE3; Mon, 27 Nov 2017 15:34:14 +0000 (UTC) To: Amit kumar , "edk2-devel@lists.01.org" References: From: Laszlo Ersek Message-ID: <90297716-77ec-0fff-5cbf-397009552803@redhat.com> Date: Mon, 27 Nov 2017 16:34:13 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 27 Nov 2017 15:34:15 +0000 (UTC) Subject: Re: Accessing memory above 0xFFFFFFFF limit. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Nov 2017 15:29:54 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 11/27/17 13:20, Amit kumar wrote: > > Hi. > I am trying to allocate a mem buffer above 4Gb address but the allocation > since i am unable to locate EdkiiIoMmuProtocol. > > Status = gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmuProtocol); > Status = mIoMmuProtocol->AllocateBuffer ( > mIoMmuProtocol, > MaxAllocateType, > EfiBootServicesData, > 1, > HostAddress, > EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE > ); PciHostBridgeDxe can perfectly well allocate >4GB memory for DMA purposes even in the absence of the IOMMU protocol. For that, your PCI device driver has to advertize the PCI device as 64-bit capable. In your Driver Binding Start() function, call PciIo->Attributes() with the EfiPciIoAttributeOperationEnable operation, and set EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE. From the v2.7 UEFI spec (14.4 EFI PCI I/O Protocol): If this bit is set, then the PCI controller is capable of producing PCI Dual Address Cycles, so it is able to access a 64-bit address space. If this bit is not set, then the PCI controller is not capable of producing PCI Dual Address Cycles, so it is only able to access a 32-bit address space. PciHostBridgeDxe will ignore the bit if the root bridge that the device belongs to is generally uncapable of 64-bit access. Please see "DmaAbove4G" in the PciHostBridgeLib interface: MdeModulePkg/Include/Library/PciHostBridgeLib.h (You might notice that the PciHostBridgeDxe source code uses EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE, but above I wrote EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE. The PciBusDxe driver maps the latter to the former, in the PciIoAllocateBuffer() function.) Laszlo