From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=marc.zyngier@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id 0C4FA223CCEE7 for ; Thu, 1 Feb 2018 08:48:13 -0800 (PST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 22AFA1435; Thu, 1 Feb 2018 08:53:50 -0800 (PST) Received: from [10.1.207.62] (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 513793F24D; Thu, 1 Feb 2018 08:53:49 -0800 (PST) To: Ard Biesheuvel , "edk2-devel@lists.01.org" Cc: Leif Lindholm , Alan Ott References: <20180201160435.3010-1-ard.biesheuvel@linaro.org> <20180201160435.3010-3-ard.biesheuvel@linaro.org> From: Marc Zyngier Organization: ARM Ltd Message-ID: <9033881e-9469-581e-b391-93b7962fa5a0@arm.com> Date: Thu, 1 Feb 2018 16:53:47 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: X-Mailman-Approved-At: Thu, 01 Feb 2018 09:07:15 -0800 Subject: Re: [PATCH edk2-non-osi 2/2] Silicon/AMD/Styx: update ArmTrustedFirmware.bin X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Feb 2018 16:48:14 -0000 Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit On 01/02/18 16:42, Ard Biesheuvel wrote: > On 1 February 2018 at 16:04, Ard Biesheuvel wrote: >> The ARM Trusted Firmware build we have been using up until now was built >> with optimizations disabled (which means every variable manipulation >> involves a load, the operation itself and a store), and runs with the >> MMU disabled, making it needlessly slow. >> >> This appears to be due to the fact that >> a) the page tables are not set up correctly, so not all memory can be >> accessed from EL3 >> b) the handling of SMC service calls does not take into account that >> these calls may be made with the MMU off (e.g., by UEFI PEI). >> >> These issues have been fixed in the source code, which should hopefully >> remove any performance bottlenecks that may become more noticeable now >> that we are going to call into the secure firmware more often to perform >> Spectre variant 2 mitigations, which have been backported as well. >> >> So update the binary image to a RELEASE build that was created with >> optimizations enabled, and has the above fixes incorporated. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Ard Biesheuvel >> --- >> Silicon/AMD/Styx/ArmTrustedFirmware.bin | Bin 75344 -> 34320 bytes >> 1 file changed, 0 insertions(+), 0 deletions(-) >> > > Note to Marc: this is the exact image I shared with you as > bl31.bin-release earlier today, so if that works as expected, could > you report back here please? Thanks. Absolutely. I'll give it a shot at the weekend (or earlier if I can). Thanks, M. -- Jazz is not dead. It just smells funny...