From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id DBC65AC0EA2 for ; Fri, 1 Mar 2024 12:21:21 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=JyLG3oDuRt/3uGeotclmh7judUTQ7iHYsPODiI09ddA=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Language:Content-Type:Content-Transfer-Encoding; s=20140610; t=1709295680; v=1; b=I7yxCaQtE8We68WchU8byLJtmCTnSGd3ygy+MVxcSc1mk01d70WZCl2t8C4plpYnWzjjp6QY /AJW9mO7lc+xyrRWUqA+eyhqRYCV3rnFBnAkaV1RKYjSQD6xgqfZ6XLYi6jngyHYztSacaTJJ9l tiXBMINTfrHd7O2gVAs26ioo= X-Received: by 127.0.0.2 with SMTP id tBGfYY7687511xSMkbGs5wqK; Fri, 01 Mar 2024 04:21:20 -0800 X-Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.21250.1709295679822426556 for ; Fri, 01 Mar 2024 04:21:20 -0800 X-Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-534-gL4IXzyANbC1OMNVwxvK3w-1; Fri, 01 Mar 2024 07:21:15 -0500 X-MC-Unique: gL4IXzyANbC1OMNVwxvK3w-1 X-Received: from smtp.corp.redhat.com (int-mx10.intmail.prod.int.rdu2.redhat.com [10.11.54.10]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 33A9B884342; Fri, 1 Mar 2024 12:21:15 +0000 (UTC) X-Received: from [10.39.194.215] (unknown [10.39.194.215]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 98B5C492BE2; Fri, 1 Mar 2024 12:21:13 +0000 (UTC) Message-ID: <924d38d4-1169-5387-8375-aeabeb1c7d33@redhat.com> Date: Fri, 1 Mar 2024 13:21:12 +0100 MIME-Version: 1.0 Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg/CpuPageTableLib: qualify page table accesses as volatile To: devel@edk2.groups.io, jianfeng.zhou@intel.com Cc: Ray Ni , Rahul Kumar , Gerd Hoffmann , Pedro Falcato , Zhang Di , Tan Dun , Michael Brown References: <20240301025447.41170-1-jianfeng.zhou@intel.com> From: "Laszlo Ersek" In-Reply-To: <20240301025447.41170-1-jianfeng.zhou@intel.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.10 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lersek@redhat.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: QcxojMxVnwfTZwO9Z6C5KqiQx7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=I7yxCaQt; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=redhat.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On 3/1/24 03:54, Zhou Jianfeng wrote: > Add volatile qualifier to page table related variable to prevent > compiler from optimizing away the variables which may lead to > unexpected result. >=20 > Signed-off-by: Zhou Jianfeng > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Rahul Kumar > Cc: Gerd Hoffmann > Cc: Pedro Falcato > Cc: Zhang Di > Cc: Tan Dun > Cc: Michael Brown > --- > .../Library/CpuPageTableLib/CpuPageTableMap.c | 36 +++++++++---------- > 1 file changed, 18 insertions(+), 18 deletions(-) >=20 > diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiC= puPkg/Library/CpuPageTableLib/CpuPageTableMap.c > index c4e46a6d74..0a380a04cb 100644 > --- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > +++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c > @@ -20,17 +20,17 @@ > **/ > VOID > PageTableLibSetPte4K ( > - IN OUT IA32_PTE_4K *Pte4K, > - IN UINT64 Offset, > - IN IA32_MAP_ATTRIBUTE *Attribute, > - IN IA32_MAP_ATTRIBUTE *Mask > + IN OUT volatile IA32_PTE_4K *Pte4K, > + IN UINT64 Offset, > + IN IA32_MAP_ATTRIBUTE *Attribute, > + IN IA32_MAP_ATTRIBUTE *Mask > ) > { > IA32_PTE_4K LocalPte4K; >=20 > LocalPte4K.Uint64 =3D Pte4K->Uint64; > if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddr= essHigh) { > - LocalPte4K.Uint64 =3D (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (A= ttribute) + Offset) | (Pte4K->Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40); > + LocalPte4K.Uint64 =3D (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (A= ttribute) + Offset) | (LocalPte4K.Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_40); > } >=20 > if (Mask->Bits.Present) { > @@ -94,17 +94,17 @@ PageTableLibSetPte4K ( > **/ > VOID > PageTableLibSetPleB ( > - IN OUT IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB, > - IN UINT64 Offset, > - IN IA32_MAP_ATTRIBUTE *Attribute, > - IN IA32_MAP_ATTRIBUTE *Mask > + IN OUT volatile IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE *PleB, > + IN UINT64 Offset, > + IN IA32_MAP_ATTRIBUTE *Attribute, > + IN IA32_MAP_ATTRIBUTE *Mask > ) > { > IA32_PAGE_LEAF_ENTRY_BIG_PAGESIZE LocalPleB; >=20 > LocalPleB.Uint64 =3D PleB->Uint64; > if (Mask->Bits.PageTableBaseAddressLow || Mask->Bits.PageTableBaseAddr= essHigh) { > - LocalPleB.Uint64 =3D (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (At= tribute) + Offset) | (PleB->Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_39); > + LocalPleB.Uint64 =3D (IA32_MAP_ATTRIBUTE_PAGE_TABLE_BASE_ADDRESS (At= tribute) + Offset) | (LocalPleB.Uint64 & ~IA32_PE_BASE_ADDRESS_MASK_39); > } >=20 > LocalPleB.Bits.MustBeOne =3D 1; > @@ -171,11 +171,11 @@ PageTableLibSetPleB ( > **/ > VOID > PageTableLibSetPle ( > - IN UINTN Level, > - IN OUT IA32_PAGING_ENTRY *Ple, > - IN UINT64 Offset, > - IN IA32_MAP_ATTRIBUTE *Attribute, > - IN IA32_MAP_ATTRIBUTE *Mask > + IN UINTN Level, > + IN OUT volatile IA32_PAGING_ENTRY *Ple, > + IN UINT64 Offset, > + IN IA32_MAP_ATTRIBUTE *Attribute, > + IN IA32_MAP_ATTRIBUTE *Mask > ) > { > if (Level =3D=3D 1) { > @@ -195,9 +195,9 @@ PageTableLibSetPle ( > **/ > VOID > PageTableLibSetPnle ( > - IN OUT IA32_PAGE_NON_LEAF_ENTRY *Pnle, > - IN IA32_MAP_ATTRIBUTE *Attribute, > - IN IA32_MAP_ATTRIBUTE *Mask > + IN OUT volatile IA32_PAGE_NON_LEAF_ENTRY *Pnle, > + IN IA32_MAP_ATTRIBUTE *Attribute, > + IN IA32_MAP_ATTRIBUTE *Mask > ) > { > IA32_PAGE_NON_LEAF_ENTRY LocalPnle; Reviewed-by: Laszlo Ersek -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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