From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 546C578003C for ; Mon, 20 Nov 2023 03:07:27 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=pfzF/0V4p2r8HlVUm6s1WE0ZRxfauQt8kDvfiX7RY8U=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1700449646; v=1; b=oYm5IgqT6YpaER6JBAXEn/IZAhMMBq0VQpF2AV1NjQCnz90rvkYThZxqaKDHWGJk6Io9rfXr MK7MA/YvfTfGVUkcLP1Np5bw4wF5OsL2uzUMDdfo3i+9a7n+R3HLDq2S+R2EPKJE8oI5LZ/LXdy ECLCB0M8SXt2+FzpxhNW/e0g= X-Received: by 127.0.0.2 with SMTP id f7sgYY7687511xyc7lBqRV7o; Sun, 19 Nov 2023 19:07:26 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.42978.1700449644577461790 for ; Sun, 19 Nov 2023 19:07:25 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8AxV_FqzVplSSE7AA--.51917S3; Mon, 20 Nov 2023 11:07:22 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Bxni9pzVpllDVHAA--.25244S3; Mon, 20 Nov 2023 11:07:21 +0800 (CST) Message-ID: <93d4df41-bbea-47c1-80bf-97a56250fe36@loongson.cn> Date: Mon, 20 Nov 2023 11:07:21 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v3 09/39] MdePkg: Add a new library named PeiServicesTablePointerLibReg To: devel@edk2.groups.io, quic_llindhol@quicinc.com Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Ard Biesheuvel , Sami Mujawar , Laszlo Ersek , Sunil V L References: <20231117095742.3605778-1-lichao@loongs> <20231117095949.3608941-1-lichao@loongson.cn> From: "Chao Li" In-Reply-To: X-CM-TRANSID: AQAAf8Bxni9pzVpllDVHAA--.25244S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQABCGVawioAkwAFsJ X-Coremail-Antispam: 1Uk129KBj93XoW3ZF4UGFW7tw1kZw1UCFW7Awc_yoWkXFWrpw 4UGrWktr15J34Sgry2qa1rAFW5ua97ury5Crn2yF1rCw4kArW0qF12qFyrKF1ruF4rZw1I gryayw4UuayDXFcCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJUUUyGb4IE77IF4wAF F20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r 1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAF wI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv67 AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8I j28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAv7VC0I7IYx2IY67AKxVWUAVWUtw Av7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcVAKI48JMx8G jcxK6IxK0xIIj40E5I8CrwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8Jw C20s026c02F40E14v26r106r1rMI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAF wI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjx v20xvEc7CjxVAFwI0_Jr0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2 jsIE14v26r1j6r4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_Jr0_GrUvcSsGvfC2KfnxnUUI43 ZEXa7IU1WSoJUUUUU== Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: nPbS1y9iOk5xlOLcVaxOvdRQx7686176AA= Content-Type: multipart/alternative; boundary="------------BR3N02NNnJBPzLJJjkQCIpGO" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=oYm5IgqT; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------BR3N02NNnJBPzLJJjkQCIpGO Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi Leif, There are indeed typos and I will fix them in V4. Thank you! Thanks, Chao On 2023/11/17 19:35, Leif Lindholm wrote: > Not my package, just spotted a typo below: > > On Fri, Nov 17, 2023 at 17:59:49 +0800, Chao Li wrote: >> Since some ARCH or platform not require execute code on memory during >> PEI phase, some values may transferred via CPU registers. >> >> Adding PeiServcieTablePointerLibReg to allow set and get the PEI service >> table pointer depend by a CPU register, this library can accommodate lot >> of platforms who not require execte code on memory during PEI phase. >> >> Adding PeiServiceTablePointerLibReg to allows setting and getting the >> PEI service table pointer via CPU registers, and the library can >> accommodate many platforms that do not need to execute code on memory >> during the PEI phase. >> >> The idea of this library is derived from >> ArmPkg/Library/PeiServicesTablePointerLib/ >> >> BZ:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4584 >> >> Cc: Michael D Kinney >> Cc: Liming Gao >> Cc: Zhiguang Liu >> Cc: Leif Lindholm >> Cc: Ard Biesheuvel >> Cc: Sami Mujawar >> Cc: Laszlo Ersek >> Cc: Sunil V L >> Signed-off-by: Chao Li >> --- >> .../Library/PeiServicesTablePointerLib.h | 37 +++++++- >> .../PeiServicesTablePointer.c | 86 +++++++++++++++++++ >> .../PeiServicesTablePointerLib.uni | 20 +++++ >> .../PeiServicesTablePointerLibReg.inf | 40 +++++++++ >> MdePkg/MdePkg.dsc | 1 + >> 5 files changed, 180 insertions(+), 4 deletions(-) >> create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiSer= vicesTablePointer.c >> create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiSer= vicesTablePointerLib.uni >> create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiSer= vicesTablePointerLibReg.inf >> >> diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePk= g/Include/Library/PeiServicesTablePointerLib.h >> index 61635eff00..f5c764cb13 100644 >> --- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h >> +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h >> @@ -52,10 +52,11 @@ SetPeiServicesTablePointer ( >> immediately preceding the Interrupt Descriptor Table (IDT) in memory= . >> For X64 CPUs, the PEI Services Table pointer is stored in the 8 byte= s >> immediately preceding the Interrupt Descriptor Table (IDT) in memory= . >> - For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored = in >> - a dedicated CPU register. This means that there is no memory storage >> - associated with storing the PEI Services Table pointer, so no additio= nal >> - migration actions are required for Itanium or ARM CPUs. >> + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer >> + is stored in a dedicated CPU register. This means that there is no >> + memory storage associated with storing the PEI Services Table pointer= , >> + so no additional migration actions are required for Itanium, ARM and >> + LoongArch CPUs. >> =20 >> **/ >> VOID >> @@ -64,4 +65,32 @@ MigratePeiServicesTablePointer ( >> VOID >> ); >> =20 >> +/** >> + Retrieves the cached value of the PEI Services Table pointer from a C= PU register. >> + >> + Returns the cached value of the PEI Services Table pointer in a CPU s= pecific manner >> + as specified in the CPU binding section of the Platform Initializatio= n Pre-EFI >> + Initialization Core Interface Specification. >> + >> + @return The pointer to PeiServices. >> +**/ >> +CONST EFI_PEI_SERVICES ** >> +EFIAPI >> +GetPeiServicesTablePointerFromRegister ( >> + VOID >> + ); >> + >> +/** >> + Set the pointer PEI Service Table to a CPU register. >> + >> + Caches the pointer to the PEI Services Table specified by PeiServices= TablePointer >> + in a platform specific manner. >> + >> + @param PeiServicesTablePointer The address of PeiServices. >> +**/ >> +VOID >> +EFIAPI >> +SetPeiServicesTablePointerToRegester ( > SetPeiServicesTablePointerToRegester -> > SetPeiServicesTablePointerToRegister > > Regester -> Register. > > / > Leif > >> + IN UINTN PeiServicesTablePointer >> + ); >> #endif >> diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTab= lePointer.c b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTable= Pointer.c >> new file mode 100644 >> index 0000000000..0227f98871 >> --- /dev/null >> +++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePoint= er.c >> @@ -0,0 +1,86 @@ >> +/** @file >> + PEI Services Table Pointer Library For Reigseter Mechanism. >> + >> + This library is used for PEIM which does executed from flash device d= irectly but >> + executed in memory. >> + >> + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved. >> + Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<= BR> >> + Copyright (c) 2023 Loongson Technology Corporation Limited. All right= s reserved.
>> + >> + SPDX-License-Identifier: BSD-2-Clause-Patent >> + >> +**/ >> + >> +#include >> +#include >> +#include >> + >> +/** >> + Caches a pointer PEI Services Table. >> + >> + Caches the pointer to the PEI Services Table specified by PeiServices= TablePointer >> + in a platform specific manner. >> + >> + If PeiServicesTablePointer is NULL, then ASSERT(). >> + >> + @param PeiServicesTablePointer The address of PeiServices pointe= r. >> +**/ >> +VOID >> +EFIAPI >> +SetPeiServicesTablePointer ( >> + IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer >> + ) >> +{ >> + ASSERT (PeiServicesTablePointer !=3D NULL); >> + SetPeiServicesTablePointerToRegester ((UINTN)PeiServicesTablePointer)= ; >> +} >> + >> +/** >> + Retrieves the cached value of the PEI Services Table pointer. >> + >> + Returns the cached value of the PEI Services Table pointer in a CPU s= pecific manner >> + as specified in the CPU binding section of the Platform Initializatio= n Pre-EFI >> + Initialization Core Interface Specification. >> + >> + If the cached PEI Services Table pointer is NULL, then ASSERT(). >> + >> + @return The pointer to PeiServices. >> + >> +**/ >> +CONST EFI_PEI_SERVICES ** >> +EFIAPI >> +GetPeiServicesTablePointer ( >> + VOID >> + ) >> +{ >> + CONST EFI_PEI_SERVICES **PeiServices; >> + >> + PeiServices =3D GetPeiServicesTablePointerFromRegister (); >> + ASSERT (PeiServices !=3D NULL); >> + return PeiServices; >> +} >> + >> +/** >> + Perform CPU specific actions required to migrate the PEI Services Tab= le >> + pointer from temporary RAM to permanent RAM. >> + >> + For IA32 CPUs, the PEI Services Table pointer is stored in the 4 byte= s >> + immediately preceding the Interrupt Descriptor Table (IDT) in memory. >> + For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes >> + immediately preceding the Interrupt Descriptor Table (IDT) in memory. >> + For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer >> + is stored in a dedicated CPU register. This means that there is no >> + memory storage associated with storing the PEI Services Table pointer= , >> + so no additional migration actions are required for Itanium, ARM and >> + LoongArch CPUs. >> + >> +**/ >> +VOID >> +EFIAPI >> +MigratePeiServicesTablePointer ( >> + VOID >> + ) >> +{ >> + return; >> +} >> diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTab= lePointerLib.uni b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServices= TablePointerLib.uni >> new file mode 100644 >> index 0000000000..937cf857d9 >> --- /dev/null >> +++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePoint= erLib.uni >> @@ -0,0 +1,20 @@ >> +// /** @file >> +// Instance of PEI Services Table Pointer Library using CPU register fo= r the table pointer. >> +// >> +// PEI Services Table Pointer Library implementation that retrieves a p= ointer to the >> +// PEI Services Table from a CPU register. Applies to modules that exec= ute from >> +// read-only memory. >> +// >> +// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. >> +// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.=
>> +// Copyright (c) 2023 Loongson Technology Corporation Limited. All righ= ts reserved.
>> +// >> +// SPDX-License-Identifier: BSD-2-Clause-Patent >> +// >> +// **/ >> + >> + >> +#string STR_MODULE_ABSTRACT #language en-US "Instance of PE= I Services Table Pointer Library using CPU register for the table pointer" >> + >> +#string STR_MODULE_DESCRIPTION #language en-US "The PEI Servic= es Table Pointer Library implementation that retrieves a pointer to the PEI= Services Table from a CPU register. Applies to modules that execute from r= ead-only memory." >> + >> diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTab= lePointerLibReg.inf b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServi= cesTablePointerLibReg.inf >> new file mode 100644 >> index 0000000000..22499e22ad >> --- /dev/null >> +++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePoint= erLibReg.inf >> @@ -0,0 +1,40 @@ >> +## @file >> +# Instance of PEI Services Table Pointer Library using CPU register for= the table pointer. >> +# >> +# PEI Services Table Pointer Library implementation that retrieves a po= inter to the >> +# PEI Services Table from a CPU register. Applies to modules that execu= te from >> +# read-only memory. >> +# >> +# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved. >> +# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<= BR> >> +# Copyright (c) 2023 Loongson Technology Corporation Limited. All right= s reserved.
>> +# >> +# SPDX-License-Identifier: BSD-2-Clause-Patent >> +# >> +# >> +## >> + >> +[Defines] >> + INF_VERSION =3D 0x00010005 >> + BASE_NAME =3D PeiServicesTablePointerLib >> + MODULE_UNI_FILE =3D PeiServicesTablePointerLib.uni >> + FILE_GUID =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2= B7 >> + MODULE_TYPE =3D PEIM >> + VERSION_STRING =3D 1.0 >> + LIBRARY_CLASS =3D PeiServicesTablePointerLib|PEIM PE= I_CORE SEC >> + >> +# >> +# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 RISCV64 LOONGARCH= 64 >> +# >> + >> +[Sources] >> + PeiServicesTablePointer.c >> + >> +[Packages] >> + MdePkg/MdePkg.dec >> + >> +[LibraryClasses] >> + DebugLib >> + >> +[Pcd] >> + >> diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc >> index 3abd1a1e23..2e9a3d4b4c 100644 >> --- a/MdePkg/MdePkg.dsc >> +++ b/MdePkg/MdePkg.dsc >> @@ -103,6 +103,7 @@ >> MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.i= nf >> MdePkg/Library/PeiServicesLib/PeiServicesLib.inf >> MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib= .inf >> + MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerL= ibReg.inf >> MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.inf >> MdePkg/Library/PeiPciLibPciCfg2/PeiPciLibPciCfg2.inf >> MdePkg/Library/PeiPciSegmentLibPciCfg2/PeiPciSegmentLibPciCfg2.inf >> --=20 >> 2.27.0 >> > >=20 > -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111438): https://edk2.groups.io/g/devel/message/111438 Mute This Topic: https://groups.io/mt/102644754/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --------------BR3N02NNnJBPzLJJjkQCIpGO Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Hi Leif,

There are indeed typos and I will fix them in V4. Thank you!


=
Thanks,
Chao
On 2023/11/17 19:35, Leif Lindholm wrote:
Not my package, just spotted a=
 typo below:

On Fri, Nov 17, 2023 at 17:59:49 +0800, Chao Li wrote:

Since some ARCH or platform =
not require execute code on memory during
PEI phase, some values may transferred via CPU registers.

Adding PeiServcieTablePointerLibReg to allow set and get the PEI service
table pointer depend by a CPU register, this library can accommodate lot
of platforms who not require execte code on memory during PEI phase.

Adding PeiServiceTablePointerLibReg to allows setting and getting the
PEI service table pointer via CPU registers, and the library can
accommodate many platforms that do not need to execute code on memory
during the PEI phase.

The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=
=3D4584

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
 .../Library/PeiServicesTablePointerLib.h      | 37 +++++++-
 .../PeiServicesTablePointer.c                 | 86 +++++++++++++++++++
 .../PeiServicesTablePointerLib.uni            | 20 +++++
 .../PeiServicesTablePointerLibReg.inf         | 40 +++++++++
 MdePkg/MdePkg.dsc                             |  1 +
 5 files changed, 180 insertions(+), 4 deletions(-)
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiService=
sTablePointer.c
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiService=
sTablePointerLib.uni
 create mode 100644 MdePkg/Library/PeiServicesTablePointerLibReg/PeiService=
sTablePointerLibReg.inf

diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/I=
nclude/Library/PeiServicesTablePointerLib.h
index 61635eff00..f5c764cb13 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
   For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
   immediately preceding the Interrupt Descriptor Table (IDT) in memory.
-  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
-  a dedicated CPU register.  This means that there is no memory storage
-  associated with storing the PEI Services Table pointer, so no additional
-  migration actions are required for Itanium or ARM CPUs.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
=20
 **/
 VOID
@@ -64,4 +65,32 @@ MigratePeiServicesTablePointer (
   VOID
   );
=20
+/**
+  Retrieves the cached value of the PEI Services Table pointer from a CPU =
register.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU spec=
ific manner
+  as specified in the CPU binding section of the Platform Initialization P=
re-EFI
+  Initialization Core Interface Specification.
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointerFromRegister (
+  VOID
+  );
+
+/**
+  Set the pointer PEI Service Table to a CPU register.
+
+  Caches the pointer to the PEI Services Table specified by PeiServicesTab=
lePointer
+  in a platform specific manner.
+
+  @param    PeiServicesTablePointer   The address of PeiServices.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointerToRegester (

SetPeiServicesTablePointerToRegester ->
SetPeiServicesTablePointerToRegister

Regester -> Register.

/
    Leif


+  IN UINTN  PeiServicesTabl=
ePointer
+  );
 #endif
diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTableP=
ointer.c b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePoi=
nter.c
new file mode 100644
index 0000000000..0227f98871
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointer.=
c
@@ -0,0 +1,86 @@
+/** @file
+  PEI Services Table Pointer Library For Reigseter Mechanism.
+
+  This library is used for PEIM which does executed from flash device dire=
ctly but
+  executed in memory.
+
+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR=
>
+  Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
BR>
+  Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r=
eserved.<BR>
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/DebugLib.h>
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by PeiServicesTab=
lePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT().
+
+  @param    PeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES  **PeiServicesTablePointer
+  )
+{
+  ASSERT (PeiServicesTablePointer !=3D NULL);
+  SetPeiServicesTablePointerToRegester ((UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU spec=
ific manner
+  as specified in the CPU binding section of the Platform Initialization P=
re-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+  @return  The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  CONST EFI_PEI_SERVICES  **PeiServices;
+
+  PeiServices =3D GetPeiServicesTablePointerFromRegister ();
+  ASSERT (PeiServices !=3D NULL);
+  return PeiServices;
+}
+
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+  is stored in a dedicated CPU register.  This means that there is no
+  memory storage associated with storing the PEI Services Table pointer,
+  so no additional migration actions are required for Itanium, ARM and
+  LoongArch CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  return;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTableP=
ointerLib.uni b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTab=
lePointerLib.uni
new file mode 100644
index 0000000000..937cf857d9
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerL=
ib.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Instance of PEI Services Table Pointer Library using CPU register for t=
he table pointer.
+//
+// PEI Services Table Pointer Library implementation that retrieves a poin=
ter to the
+// PEI Services Table from a CPU register. Applies to modules that execute=
 from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<B=
R>
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
;BR>
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights =
reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT             #language en-US "Instance of PEI S=
ervices Table Pointer Library using CPU register for the table pointer"
+
+#string STR_MODULE_DESCRIPTION          #language en-US "The PEI Services =
Table Pointer Library implementation that retrieves a pointer to the PEI Se=
rvices Table from a CPU register. Applies to modules that execute from read=
-only memory."
+
diff --git a/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTableP=
ointerLibReg.inf b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServices=
TablePointerLibReg.inf
new file mode 100644
index 0000000000..22499e22ad
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerL=
ibReg.inf
@@ -0,0 +1,40 @@
+## @file
+# Instance of PEI Services Table Pointer Library using CPU register for th=
e table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a point=
er to the
+# PEI Services Table from a CPU register. Applies to modules that execute =
from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR=
>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<=
BR>
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights r=
eserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    =3D 0x00010005
+  BASE_NAME                      =3D PeiServicesTablePointerLib
+  MODULE_UNI_FILE                =3D PeiServicesTablePointerLib.uni
+  FILE_GUID                      =3D 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+  MODULE_TYPE                    =3D PEIM
+  VERSION_STRING                 =3D 1.0
+  LIBRARY_CLASS                  =3D PeiServicesTablePointerLib|PEIM PEI_C=
ORE SEC
+
+#
+#  VALID_ARCHITECTURES           =3D IA32 X64 AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  PeiServicesTablePointer.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+
+[Pcd]
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..2e9a3d4b4c 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -103,6 +103,7 @@
   MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
   MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
   MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
+  MdePkg/Library/PeiServicesTablePointerLibReg/PeiServicesTablePointerLibR=
eg.inf
   MdePkg/Library/PeiSmbusLibSmbus2Ppi/PeiSmbusLibSmbus2Ppi.inf
   MdePkg/Library/PeiPciLibPciCfg2/PeiPciLibPciCfg2.inf
   MdePkg/Library/PeiPciSegmentLibPciCfg2/PeiPciSegmentLibPciCfg2.inf
--=20
2.27.0
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