From: "John Chew" <yuinyee.chew@starfivetech.com>
To: Ard Biesheuvel <ardb@kernel.org>,devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v3 2/5] DesignWare/DwEmmcDxe: Add CPU little endian option
Date: Sun, 26 Nov 2023 23:09:05 -0800 [thread overview]
Message-ID: <9575.1701068945988795618@groups.io> (raw)
In-Reply-To: <CAMj1kXG0n4kr38oOoiCB8U_tn8R3Kq4Zm4D4MiGGgD8ywmLikw@mail.gmail.com>
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Hi Ard,
I take it this means that the IP can be synthesized in both little and big endian versions, right?
Yes, correct.
Is there no ID register in the hardware you can derive this information from?
Yes, in RISC-V we can determine the CPU endianness based on mstatus.MBE and mstatus.SBE register in M-Mode and S-Mode respectively.
However, this driver will be used for other architecture, so reading this register will not make sense for other architectures such as ARM and x86.
I have not seen any API to call in EDK2 in order to check for CPU endiness.
Alternatively, I can update the handling by using software checking for the CPU endianness as follows:
This will not use PCD to determine the CPU endianness.
I will change this handling in the coming patch series if you think it is okay.
Thank you for your time =)
Regards,
John
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next prev parent reply other threads:[~2023-11-27 7:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-03 2:51 [edk2-devel] [PATCH v3 0/5] Designware MMCDXE changes and enhancement John Chew
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 1/5] DesignWare/DwEmmcDxe: Enabled Internal IDMAC interrupt RX/TX register John Chew
2023-11-22 15:41 ` Ard Biesheuvel
2023-11-27 7:10 ` John Chew
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 2/5] DesignWare/DwEmmcDxe: Add CPU little endian option John Chew
2023-11-22 15:45 ` Ard Biesheuvel
2023-11-27 7:09 ` John Chew [this message]
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 3/5] DesignWare/DwEmmcDxe: Remove ARM dependency library John Chew
2023-11-22 15:46 ` Ard Biesheuvel
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 4/5] DesignWare/DwEmmcDxe: Add handling for SDMMC John Chew
2023-11-22 15:47 ` Ard Biesheuvel
2023-11-03 2:51 ` [edk2-devel] [PATCH v3 5/5] DesignWare/DwEmmcDxe: Force DMA buffer to allocate below 4GB John Chew
2023-11-22 15:49 ` Ard Biesheuvel
2023-11-07 1:09 ` [edk2-devel] [PATCH v3 0/5] Designware MMCDXE changes and enhancement John Chew
2023-11-22 4:06 ` John Chew
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