Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

Per the discussion in the memory protections design meeting
this morning, I am kicking this patch back to the top of
the inbox for review. If folks would like me to resend this
patchset since the thread got bogged down with scheduling
meetings, just let me know.

I'll also pull up the BZ link for when the equivalent
change went into the x86 CpuDxe driver in 2017:

https://bugzilla.tianocore.org/show_bug.cgi?id=753

This contains lots of information about why the change went
in on the x86 side (some dead mail links, but they can be
retrieved through some digging). AFAICT, this change wasn't
applied to ARM at the time due to an oversight, not a general
design decision.

Thanks,
Oliver

On 4/25/2023 5:09 PM, Oliver Smith-Denny wrote:
> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
> 
> GCD with the page table. However, unlike when the UefiCpuPkg's
> 
> CpuDxe initializes, the Arm version does not update the GCD
> 
> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
> 
> the capabilities to be the existing page table attributes for
> 
> this range, but the UefiCpuPkg CpuDxe sets the above attributes
> 
> as they are software constructs, possible to set for any memory
> 
> hardware).
> 
> 
> 
> As a result, when the GCD attributes are attempted to be set
> 
> against the old GCD capabilities, attributes that are set in the
> 
> page table can get lost because the new attributes are not in the
> 
> old GCD capabilities (and yet they are already set in the page
> 
> table) meaning that the attempted sync between the GCD and the
> 
> page table was a failure and drivers querying one vs the other
> 
> will see different state. This can lead to RWX memory regions
> 
> even with the no-execute policy set, because core drivers (such
> 
> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
> 
> allocate pages, query the GCD attributes, attempt to set a new
> 
> cache attribute and end up clearing the XP bit in the page table
> 
> because the GCD attributes do not have XP set.
> 
> 
> 
> This patch follows the UefiCpuPkg pattern and adds
> 
> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
> 
> initialization. This ensures that memory regions which already have
> 
> these attributes set get them set in the GCD attributes, properly
> 
> syncing between the GCD and the page table.
> 
> 
> 
> This mitigates the issue seen, however, additional investigations
> 
> into setting the GCD attributes earlier and maintaining a better
> 
> sync between the GCD and the page table are being done.
> 
> 
> 
> Feedback on this proposal is greatly appreciated, particularly
> 
> any pitfalls or more architectural solutions to issues seen
> 
> with syncing the GCD and the page table.
> 
> 
> 
> PR: https://github.com/tianocore/edk2/pull/4311
> 
> Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
> 
> 
> 
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> 
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> 
> Cc: Sami Mujawar <sami.mujawar@arm.com>
> 
> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
> 
> Cc: Sean Brogan <sean.brogan@microsoft.com>
> 
> 
> 
> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
> 
> ---
> 
>   ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
> 
>   1 file changed, 49 insertions(+), 6 deletions(-)
> 
> 
> 
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> 
> index 2e73719dce04..3ef0380e084f 100644
> 
> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> 
> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> 
> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
> 
>     UINTN                 EndIndex;
> 
>     EFI_PHYSICAL_ADDRESS  RegionStart;
> 
>     UINT64                RegionLength;
> 
> +  UINT64                Capabilities;
> 
>   
> 
>     DEBUG ((
> 
>       DEBUG_GCD,
> 
> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
> 
>         RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
> 
>       }
> 
>   
> 
> +    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
> 
> +    // constructs, not hardware features) and they are critical to maintaining a security boundary
> 
> +    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
> 
> +
> 
>       //
> 
> -    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
> 
> +    // Update GCD capabilities as these may have changed in the page table since the GCD was created
> 
> +    // this follows the same pattern as x86 GCD and Page Table syncing
> 
>       //
> 
> -    gDS->SetMemorySpaceAttributes (
> 
> -           RegionStart,
> 
> -           RegionLength,
> 
> -           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
> 
> -           );
> 
> +    Status = gDS->SetMemorySpaceCapabilities (
> 
> +                    RegionStart,
> 
> +                    RegionLength,
> 
> +                    Capabilities
> 
> +                    );
> 
> +
> 
> +    if (EFI_ERROR (Status)) {
> 
> +      DEBUG ((
> 
> +        DEBUG_ERROR,
> 
> +        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> 
> +        __func__,
> 
> +        Capabilities,
> 
> +        RegionStart,
> 
> +        RegionLength,
> 
> +        Status
> 
> +        ));
> 
> +      ASSERT_EFI_ERROR (Status);
> 
> +      continue;
> 
> +    }
> 
> +
> 
> +    //
> 
> +    // Set memory attributes according to the page table attribute and the original attribute of descriptor
> 
> +    //
> 
> +    Status = gDS->SetMemorySpaceAttributes (
> 
> +                    RegionStart,
> 
> +                    RegionLength,
> 
> +                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
> 
> +                    );
> 
> +
> 
> +    if (EFI_ERROR (Status)) {
> 
> +      DEBUG ((
> 
> +        DEBUG_ERROR,
> 
> +        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> 
> +        __func__,
> 
> +        Attributes,
> 
> +        RegionStart,
> 
> +        RegionLength,
> 
> +        Status
> 
> +        ));
> 
> +      ASSERT_EFI_ERROR (Status);
> 
> +      continue;
> 
> +    }
> 
>     }
> 
>   
> 
>     return EFI_SUCCESS;
> 

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ard Biesheuvel]

On Wed, 7 Jun 2023 at 18:10, Oliver Smith-Denny
<osde@linux.microsoft.com> wrote:
>
> Per the discussion in the memory protections design meeting
> this morning, I am kicking this patch back to the top of
> the inbox for review. If folks would like me to resend this
> patchset since the thread got bogged down with scheduling
> meetings, just let me know.
>
> I'll also pull up the BZ link for when the equivalent
> change went into the x86 CpuDxe driver in 2017:
>
> https://bugzilla.tianocore.org/show_bug.cgi?id=753
>
> This contains lots of information about why the change went
> in on the x86 side (some dead mail links, but they can be
> retrieved through some digging). AFAICT, this change wasn't
> applied to ARM at the time due to an oversight, not a general
> design decision.
>

Thanks for the background, this is useful.

So I agree that for all system memory regions, we should be setting
the RP, RO and XP capabilities. But what I don't understand is why
these are not set to begin with.

IOW, the resource descriptor HOBs that the initial regions are based
on should have these capabilities set already, and then, we wouldn't
have to do anything to at this point. If there is anything missing
from the generic plumbing to make sure this transformation happens
correctly, we should fix that first, and fix the existing ARM
platforms to set the correct resource attributes.

For example, ArmVirtQemu uses

  ResourceAttributes = (
                        EFI_RESOURCE_ATTRIBUTE_PRESENT |
                        EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
                        EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
                        EFI_RESOURCE_ATTRIBUTE_TESTED
                        );

for the resource descriptor HOBs, and afaict, this should include

EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE
EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE
EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE

to accurately describe the region's capabilities.

WIth that out of the way, I wonder if we still need this patch at all.

Thanks,
Ard.



>
> On 4/25/2023 5:09 PM, Oliver Smith-Denny wrote:
> > When ArmPkg's CpuDxe driver initializes, it attempts to sync the
> >
> > GCD with the page table. However, unlike when the UefiCpuPkg's
> >
> > CpuDxe initializes, the Arm version does not update the GCD
> >
> > capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
> >
> > the capabilities to be the existing page table attributes for
> >
> > this range, but the UefiCpuPkg CpuDxe sets the above attributes
> >
> > as they are software constructs, possible to set for any memory
> >
> > hardware).
> >
> >
> >
> > As a result, when the GCD attributes are attempted to be set
> >
> > against the old GCD capabilities, attributes that are set in the
> >
> > page table can get lost because the new attributes are not in the
> >
> > old GCD capabilities (and yet they are already set in the page
> >
> > table) meaning that the attempted sync between the GCD and the
> >
> > page table was a failure and drivers querying one vs the other
> >
> > will see different state. This can lead to RWX memory regions
> >
> > even with the no-execute policy set, because core drivers (such
> >
> > as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
> >
> > allocate pages, query the GCD attributes, attempt to set a new
> >
> > cache attribute and end up clearing the XP bit in the page table
> >
> > because the GCD attributes do not have XP set.
> >
> >
> >
> > This patch follows the UefiCpuPkg pattern and adds
> >
> > EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
> >
> > initialization. This ensures that memory regions which already have
> >
> > these attributes set get them set in the GCD attributes, properly
> >
> > syncing between the GCD and the page table.
> >
> >
> >
> > This mitigates the issue seen, however, additional investigations
> >
> > into setting the GCD attributes earlier and maintaining a better
> >
> > sync between the GCD and the page table are being done.
> >
> >
> >
> > Feedback on this proposal is greatly appreciated, particularly
> >
> > any pitfalls or more architectural solutions to issues seen
> >
> > with syncing the GCD and the page table.
> >
> >
> >
> > PR: https://github.com/tianocore/edk2/pull/4311
> >
> > Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
> >
> >
> >
> > Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> >
> > Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> >
> > Cc: Sami Mujawar <sami.mujawar@arm.com>
> >
> > Cc: Michael Kubacki <mikuback@linux.microsoft.com>
> >
> > Cc: Sean Brogan <sean.brogan@microsoft.com>
> >
> >
> >
> > Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
> >
> > ---
> >
> >   ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
> >
> >   1 file changed, 49 insertions(+), 6 deletions(-)
> >
> >
> >
> > diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >
> > index 2e73719dce04..3ef0380e084f 100644
> >
> > --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >
> > +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >
> > @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
> >
> >     UINTN                 EndIndex;
> >
> >     EFI_PHYSICAL_ADDRESS  RegionStart;
> >
> >     UINT64                RegionLength;
> >
> > +  UINT64                Capabilities;
> >
> >
> >
> >     DEBUG ((
> >
> >       DEBUG_GCD,
> >
> > @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
> >
> >         RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
> >
> >       }
> >
> >
> >
> > +    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
> >
> > +    // constructs, not hardware features) and they are critical to maintaining a security boundary
> >
> > +    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
> >
> > +
> >
> >       //
> >
> > -    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
> >
> > +    // Update GCD capabilities as these may have changed in the page table since the GCD was created
> >
> > +    // this follows the same pattern as x86 GCD and Page Table syncing
> >
> >       //
> >
> > -    gDS->SetMemorySpaceAttributes (
> >
> > -           RegionStart,
> >
> > -           RegionLength,
> >
> > -           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
> >
> > -           );
> >
> > +    Status = gDS->SetMemorySpaceCapabilities (
> >
> > +                    RegionStart,
> >
> > +                    RegionLength,
> >
> > +                    Capabilities
> >
> > +                    );
> >
> > +
> >
> > +    if (EFI_ERROR (Status)) {
> >
> > +      DEBUG ((
> >
> > +        DEBUG_ERROR,
> >
> > +        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> >
> > +        __func__,
> >
> > +        Capabilities,
> >
> > +        RegionStart,
> >
> > +        RegionLength,
> >
> > +        Status
> >
> > +        ));
> >
> > +      ASSERT_EFI_ERROR (Status);
> >
> > +      continue;
> >
> > +    }
> >
> > +
> >
> > +    //
> >
> > +    // Set memory attributes according to the page table attribute and the original attribute of descriptor
> >
> > +    //
> >
> > +    Status = gDS->SetMemorySpaceAttributes (
> >
> > +                    RegionStart,
> >
> > +                    RegionLength,
> >
> > +                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
> >
> > +                    );
> >
> > +
> >
> > +    if (EFI_ERROR (Status)) {
> >
> > +      DEBUG ((
> >
> > +        DEBUG_ERROR,
> >
> > +        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> >
> > +        __func__,
> >
> > +        Attributes,
> >
> > +        RegionStart,
> >
> > +        RegionLength,
> >
> > +        Status
> >
> > +        ));
> >
> > +      ASSERT_EFI_ERROR (Status);
> >
> > +      continue;
> >
> > +    }
> >
> >     }
> >
> >
> >
> >     return EFI_SUCCESS;
> >

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

On 6/7/2023 10:31 AM, Ard Biesheuvel wrote:
> On Wed, 7 Jun 2023 at 18:10, Oliver Smith-Denny
> <osde@linux.microsoft.com> wrote:
>>
>> Per the discussion in the memory protections design meeting
>> this morning, I am kicking this patch back to the top of
>> the inbox for review. If folks would like me to resend this
>> patchset since the thread got bogged down with scheduling
>> meetings, just let me know.
>>
>> I'll also pull up the BZ link for when the equivalent
>> change went into the x86 CpuDxe driver in 2017:
>>
>> https://bugzilla.tianocore.org/show_bug.cgi?id=753
>>
>> This contains lots of information about why the change went
>> in on the x86 side (some dead mail links, but they can be
>> retrieved through some digging). AFAICT, this change wasn't
>> applied to ARM at the time due to an oversight, not a general
>> design decision.
>>
> 
> Thanks for the background, this is useful.
> 
> So I agree that for all system memory regions, we should be setting
> the RP, RO and XP capabilities. But what I don't understand is why
> these are not set to begin with.
> 
> IOW, the resource descriptor HOBs that the initial regions are based
> on should have these capabilities set already, and then, we wouldn't
> have to do anything to at this point. If there is anything missing
> from the generic plumbing to make sure this transformation happens
> correctly, we should fix that first, and fix the existing ARM
> platforms to set the correct resource attributes.
> 
> For example, ArmVirtQemu uses
> 
>    ResourceAttributes = (
>                          EFI_RESOURCE_ATTRIBUTE_PRESENT |
>                          EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
>                          EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
>                          EFI_RESOURCE_ATTRIBUTE_TESTED
>                          );
> 
> for the resource descriptor HOBs, and afaict, this should include
> 
> EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE
> EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE
> EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE
> 
> to accurately describe the region's capabilities.
> 
> WIth that out of the way, I wonder if we still need this patch at all.
> 
> Thanks,
> Ard.
> 

I definitely agree this should be set at GCD initialization. Looking
at the code path you present, I think this could work. My initial
concern was that the resource descriptor HOB was passing attributes
not capabilities, but I see that it actually passes both in a field
called attributes :).

On ARM, as you point out, this looks like we would intercept at
MemoryInitPeiLib when it builds the HOBs. This would be a separate
method from what x86 does, but I can take a look at aligning x86
to initializing the capabilities through the resource descriptor
HOBs.

I'll take a crack at this and see how it shapes up. Seems reasonable
to me, though. I'll need to look into adding memory ranges, we would
want new ranges to have the capabilities, too.

Thanks,
Oliver

> 
> 
>>
>> On 4/25/2023 5:09 PM, Oliver Smith-Denny wrote:
>>> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
>>>
>>> GCD with the page table. However, unlike when the UefiCpuPkg's
>>>
>>> CpuDxe initializes, the Arm version does not update the GCD
>>>
>>> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
>>>
>>> the capabilities to be the existing page table attributes for
>>>
>>> this range, but the UefiCpuPkg CpuDxe sets the above attributes
>>>
>>> as they are software constructs, possible to set for any memory
>>>
>>> hardware).
>>>
>>>
>>>
>>> As a result, when the GCD attributes are attempted to be set
>>>
>>> against the old GCD capabilities, attributes that are set in the
>>>
>>> page table can get lost because the new attributes are not in the
>>>
>>> old GCD capabilities (and yet they are already set in the page
>>>
>>> table) meaning that the attempted sync between the GCD and the
>>>
>>> page table was a failure and drivers querying one vs the other
>>>
>>> will see different state. This can lead to RWX memory regions
>>>
>>> even with the no-execute policy set, because core drivers (such
>>>
>>> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
>>>
>>> allocate pages, query the GCD attributes, attempt to set a new
>>>
>>> cache attribute and end up clearing the XP bit in the page table
>>>
>>> because the GCD attributes do not have XP set.
>>>
>>>
>>>
>>> This patch follows the UefiCpuPkg pattern and adds
>>>
>>> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
>>>
>>> initialization. This ensures that memory regions which already have
>>>
>>> these attributes set get them set in the GCD attributes, properly
>>>
>>> syncing between the GCD and the page table.
>>>
>>>
>>>
>>> This mitigates the issue seen, however, additional investigations
>>>
>>> into setting the GCD attributes earlier and maintaining a better
>>>
>>> sync between the GCD and the page table are being done.
>>>
>>>
>>>
>>> Feedback on this proposal is greatly appreciated, particularly
>>>
>>> any pitfalls or more architectural solutions to issues seen
>>>
>>> with syncing the GCD and the page table.
>>>
>>>
>>>
>>> PR: https://github.com/tianocore/edk2/pull/4311
>>>
>>> Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
>>>
>>>
>>>
>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
>>>
>>> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
>>>
>>> Cc: Sami Mujawar <sami.mujawar@arm.com>
>>>
>>> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
>>>
>>> Cc: Sean Brogan <sean.brogan@microsoft.com>
>>>
>>>
>>>
>>> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
>>>
>>> ---
>>>
>>>    ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
>>>
>>>    1 file changed, 49 insertions(+), 6 deletions(-)
>>>
>>>
>>>
>>> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>
>>> index 2e73719dce04..3ef0380e084f 100644
>>>
>>> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>
>>> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>
>>> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
>>>
>>>      UINTN                 EndIndex;
>>>
>>>      EFI_PHYSICAL_ADDRESS  RegionStart;
>>>
>>>      UINT64                RegionLength;
>>>
>>> +  UINT64                Capabilities;
>>>
>>>
>>>
>>>      DEBUG ((
>>>
>>>        DEBUG_GCD,
>>>
>>> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
>>>
>>>          RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
>>>
>>>        }
>>>
>>>
>>>
>>> +    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
>>>
>>> +    // constructs, not hardware features) and they are critical to maintaining a security boundary
>>>
>>> +    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
>>>
>>> +
>>>
>>>        //
>>>
>>> -    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
>>>
>>> +    // Update GCD capabilities as these may have changed in the page table since the GCD was created
>>>
>>> +    // this follows the same pattern as x86 GCD and Page Table syncing
>>>
>>>        //
>>>
>>> -    gDS->SetMemorySpaceAttributes (
>>>
>>> -           RegionStart,
>>>
>>> -           RegionLength,
>>>
>>> -           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
>>>
>>> -           );
>>>
>>> +    Status = gDS->SetMemorySpaceCapabilities (
>>>
>>> +                    RegionStart,
>>>
>>> +                    RegionLength,
>>>
>>> +                    Capabilities
>>>
>>> +                    );
>>>
>>> +
>>>
>>> +    if (EFI_ERROR (Status)) {
>>>
>>> +      DEBUG ((
>>>
>>> +        DEBUG_ERROR,
>>>
>>> +        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
>>>
>>> +        __func__,
>>>
>>> +        Capabilities,
>>>
>>> +        RegionStart,
>>>
>>> +        RegionLength,
>>>
>>> +        Status
>>>
>>> +        ));
>>>
>>> +      ASSERT_EFI_ERROR (Status);
>>>
>>> +      continue;
>>>
>>> +    }
>>>
>>> +
>>>
>>> +    //
>>>
>>> +    // Set memory attributes according to the page table attribute and the original attribute of descriptor
>>>
>>> +    //
>>>
>>> +    Status = gDS->SetMemorySpaceAttributes (
>>>
>>> +                    RegionStart,
>>>
>>> +                    RegionLength,
>>>
>>> +                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
>>>
>>> +                    );
>>>
>>> +
>>>
>>> +    if (EFI_ERROR (Status)) {
>>>
>>> +      DEBUG ((
>>>
>>> +        DEBUG_ERROR,
>>>
>>> +        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
>>>
>>> +        __func__,
>>>
>>> +        Attributes,
>>>
>>> +        RegionStart,
>>>
>>> +        RegionLength,
>>>
>>> +        Status
>>>
>>> +        ));
>>>
>>> +      ASSERT_EFI_ERROR (Status);
>>>
>>> +      continue;
>>>
>>> +    }
>>>
>>>      }
>>>
>>>
>>>
>>>      return EFI_SUCCESS;
>>>
> 
> 
> 
> 

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

On 6/7/2023 11:03 AM, Oliver Smith-Denny wrote:
> On 6/7/2023 10:31 AM, Ard Biesheuvel wrote:
>> On Wed, 7 Jun 2023 at 18:10, Oliver Smith-Denny
>> <osde@linux.microsoft.com> wrote:
>>>
>>> Per the discussion in the memory protections design meeting
>>> this morning, I am kicking this patch back to the top of
>>> the inbox for review. If folks would like me to resend this
>>> patchset since the thread got bogged down with scheduling
>>> meetings, just let me know.
>>>
>>> I'll also pull up the BZ link for when the equivalent
>>> change went into the x86 CpuDxe driver in 2017:
>>>
>>> https://bugzilla.tianocore.org/show_bug.cgi?id=753
>>>
>>> This contains lots of information about why the change went
>>> in on the x86 side (some dead mail links, but they can be
>>> retrieved through some digging). AFAICT, this change wasn't
>>> applied to ARM at the time due to an oversight, not a general
>>> design decision.
>>>
>>
>> Thanks for the background, this is useful.
>>
>> So I agree that for all system memory regions, we should be setting
>> the RP, RO and XP capabilities. But what I don't understand is why
>> these are not set to begin with.
>>
>> IOW, the resource descriptor HOBs that the initial regions are based
>> on should have these capabilities set already, and then, we wouldn't
>> have to do anything to at this point. If there is anything missing
>> from the generic plumbing to make sure this transformation happens
>> correctly, we should fix that first, and fix the existing ARM
>> platforms to set the correct resource attributes.
>>
>> For example, ArmVirtQemu uses
>>
>>    ResourceAttributes = (
>>                          EFI_RESOURCE_ATTRIBUTE_PRESENT |
>>                          EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
>>                          EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
>>                          EFI_RESOURCE_ATTRIBUTE_TESTED
>>                          );
>>
>> for the resource descriptor HOBs, and afaict, this should include
>>
>> EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTABLE
>> EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTABLE
>> EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE
>>
>> to accurately describe the region's capabilities.
>>
>> WIth that out of the way, I wonder if we still need this patch at all.
>>
>> Thanks,
>> Ard.
>>
> 
> I definitely agree this should be set at GCD initialization. Looking
> at the code path you present, I think this could work. My initial
> concern was that the resource descriptor HOB was passing attributes
> not capabilities, but I see that it actually passes both in a field
> called attributes :).
> 
> On ARM, as you point out, this looks like we would intercept at
> MemoryInitPeiLib when it builds the HOBs. This would be a separate
> method from what x86 does, but I can take a look at aligning x86
> to initializing the capabilities through the resource descriptor
> HOBs.
> 
> I'll take a crack at this and see how it shapes up. Seems reasonable
> to me, though. I'll need to look into adding memory ranges, we would
> want new ranges to have the capabilities, too.
> 

Hi Ard,

I'm returning to this after a couple of weeks of vacation, hopefully
with fresh eyes :). The path you describe of resource descriptor HOBs
including the RO/RP/XP capabilities does looks like it would work and
I do like that it moves these capabilities earlier.

That being said, the downside of this approach to me is that it has
the core code rely on the platform doing the right thing, which is
far from guaranteed. I would prefer to have the core code control
the memory protections as much as possible with platform
configurability. Platforms have already had the opportunity to
set these capabilities in resource descriptor HOBs, but are not.

This leads into another related concept, what is the default state
of free memory (is it XP, RO, RP, none of them, some combination,
etc.). This is also something that should be enforced at the core
level, I believe. I will explore this further in a different patch
set.

For this patchset, I think the right approach would be to set the
RP/RO/XP capabilities by default when constructing the GCD. This
would also allow the Intel side to not have the workaround they have,
where they apply these capabilities when syncing the page table and
the GCD after CpuDxe comes up (as I did in this patchset for ARM64).
I can spin off a new version with that once I do so some testing.

Thanks,
Oliver

> 
>>
>>
>>>
>>> On 4/25/2023 5:09 PM, Oliver Smith-Denny wrote:
>>>> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
>>>>
>>>> GCD with the page table. However, unlike when the UefiCpuPkg's
>>>>
>>>> CpuDxe initializes, the Arm version does not update the GCD
>>>>
>>>> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
>>>>
>>>> the capabilities to be the existing page table attributes for
>>>>
>>>> this range, but the UefiCpuPkg CpuDxe sets the above attributes
>>>>
>>>> as they are software constructs, possible to set for any memory
>>>>
>>>> hardware).
>>>>
>>>>
>>>>
>>>> As a result, when the GCD attributes are attempted to be set
>>>>
>>>> against the old GCD capabilities, attributes that are set in the
>>>>
>>>> page table can get lost because the new attributes are not in the
>>>>
>>>> old GCD capabilities (and yet they are already set in the page
>>>>
>>>> table) meaning that the attempted sync between the GCD and the
>>>>
>>>> page table was a failure and drivers querying one vs the other
>>>>
>>>> will see different state. This can lead to RWX memory regions
>>>>
>>>> even with the no-execute policy set, because core drivers (such
>>>>
>>>> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
>>>>
>>>> allocate pages, query the GCD attributes, attempt to set a new
>>>>
>>>> cache attribute and end up clearing the XP bit in the page table
>>>>
>>>> because the GCD attributes do not have XP set.
>>>>
>>>>
>>>>
>>>> This patch follows the UefiCpuPkg pattern and adds
>>>>
>>>> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
>>>>
>>>> initialization. This ensures that memory regions which already have
>>>>
>>>> these attributes set get them set in the GCD attributes, properly
>>>>
>>>> syncing between the GCD and the page table.
>>>>
>>>>
>>>>
>>>> This mitigates the issue seen, however, additional investigations
>>>>
>>>> into setting the GCD attributes earlier and maintaining a better
>>>>
>>>> sync between the GCD and the page table are being done.
>>>>
>>>>
>>>>
>>>> Feedback on this proposal is greatly appreciated, particularly
>>>>
>>>> any pitfalls or more architectural solutions to issues seen
>>>>
>>>> with syncing the GCD and the page table.
>>>>
>>>>
>>>>
>>>> PR: https://github.com/tianocore/edk2/pull/4311
>>>>
>>>> Personal branch: 
>>>> https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
>>>>
>>>>
>>>>
>>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
>>>>
>>>> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
>>>>
>>>> Cc: Sami Mujawar <sami.mujawar@arm.com>
>>>>
>>>> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
>>>>
>>>> Cc: Sean Brogan <sean.brogan@microsoft.com>
>>>>
>>>>
>>>>
>>>> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
>>>>
>>>> ---
>>>>
>>>>    ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
>>>>
>>>>    1 file changed, 49 insertions(+), 6 deletions(-)
>>>>
>>>>
>>>>
>>>> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c 
>>>> b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>>
>>>> index 2e73719dce04..3ef0380e084f 100644
>>>>
>>>> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>>
>>>> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>>>>
>>>> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
>>>>
>>>>      UINTN                 EndIndex;
>>>>
>>>>      EFI_PHYSICAL_ADDRESS  RegionStart;
>>>>
>>>>      UINT64                RegionLength;
>>>>
>>>> +  UINT64                Capabilities;
>>>>
>>>>
>>>>
>>>>      DEBUG ((
>>>>
>>>>        DEBUG_GCD,
>>>>
>>>> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
>>>>
>>>>          RegionLength = MemorySpaceMap[Index].BaseAddress + 
>>>> MemorySpaceMap[Index].Length - RegionStart;
>>>>
>>>>        }
>>>>
>>>>
>>>>
>>>> +    // Always add RO, RP, and XP as all memory is capable of 
>>>> supporting these types (they are software
>>>>
>>>> +    // constructs, not hardware features) and they are critical to 
>>>> maintaining a security boundary
>>>>
>>>> +    Capabilities = MemorySpaceMap[Index].Capabilities | 
>>>> EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
>>>>
>>>> +
>>>>
>>>>        //
>>>>
>>>> -    // Set memory attributes according to MTRR attribute and the 
>>>> original attribute of descriptor
>>>>
>>>> +    // Update GCD capabilities as these may have changed in the 
>>>> page table since the GCD was created
>>>>
>>>> +    // this follows the same pattern as x86 GCD and Page Table syncing
>>>>
>>>>        //
>>>>
>>>> -    gDS->SetMemorySpaceAttributes (
>>>>
>>>> -           RegionStart,
>>>>
>>>> -           RegionLength,
>>>>
>>>> -           (MemorySpaceMap[Index].Attributes & 
>>>> ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & 
>>>> Attributes)
>>>>
>>>> -           );
>>>>
>>>> +    Status = gDS->SetMemorySpaceCapabilities (
>>>>
>>>> +                    RegionStart,
>>>>
>>>> +                    RegionLength,
>>>>
>>>> +                    Capabilities
>>>>
>>>> +                    );
>>>>
>>>> +
>>>>
>>>> +    if (EFI_ERROR (Status)) {
>>>>
>>>> +      DEBUG ((
>>>>
>>>> +        DEBUG_ERROR,
>>>>
>>>> +        "%a - failed to update GCD capabilities: 0x%llx on memory 
>>>> region: 0x%llx length: 0x%llx Status: %r\n",
>>>>
>>>> +        __func__,
>>>>
>>>> +        Capabilities,
>>>>
>>>> +        RegionStart,
>>>>
>>>> +        RegionLength,
>>>>
>>>> +        Status
>>>>
>>>> +        ));
>>>>
>>>> +      ASSERT_EFI_ERROR (Status);
>>>>
>>>> +      continue;
>>>>
>>>> +    }
>>>>
>>>> +
>>>>
>>>> +    //
>>>>
>>>> +    // Set memory attributes according to the page table attribute 
>>>> and the original attribute of descriptor
>>>>
>>>> +    //
>>>>
>>>> +    Status = gDS->SetMemorySpaceAttributes (
>>>>
>>>> +                    RegionStart,
>>>>
>>>> +                    RegionLength,
>>>>
>>>> +                    (MemorySpaceMap[Index].Attributes & 
>>>> ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
>>>>
>>>> +                    );
>>>>
>>>> +
>>>>
>>>> +    if (EFI_ERROR (Status)) {
>>>>
>>>> +      DEBUG ((
>>>>
>>>> +        DEBUG_ERROR,
>>>>
>>>> +        "%a - failed to update GCD attributes: 0x%llx on memory 
>>>> region: 0x%llx length: 0x%llx Status: %r\n",
>>>>
>>>> +        __func__,
>>>>
>>>> +        Attributes,
>>>>
>>>> +        RegionStart,
>>>>
>>>> +        RegionLength,
>>>>
>>>> +        Status
>>>>
>>>> +        ));
>>>>
>>>> +      ASSERT_EFI_ERROR (Status);
>>>>
>>>> +      continue;
>>>>
>>>> +    }
>>>>
>>>>      }
>>>>
>>>>
>>>>
>>>>      return EFI_SUCCESS;
>>>>
>>
>>
>>
>>
> 
> 
> 
> 

[edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

When ArmPkg's CpuDxe driver initializes, it attempts to sync the
GCD with the page table. However, unlike when the UefiCpuPkg's
CpuDxe initializes, the Arm version does not update the GCD
capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
the capabilities to be the existing page table attributes for
this range, but the UefiCpuPkg CpuDxe sets the above attributes
as they are software constructs, possible to set for any memory
hardware).

As a result, when the GCD attributes are attempted to be set
against the old GCD capabilities, attributes that are set in the
page table can get lost because the new attributes are not in the
old GCD capabilities (and yet they are already set in the page
table) meaning that the attempted sync between the GCD and the
page table was a failure and drivers querying one vs the other
will see different state. This can lead to RWX memory regions
even with the no-execute policy set, because core drivers (such
as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
allocate pages, query the GCD attributes, attempt to set a new
cache attribute and end up clearing the XP bit in the page table
because the GCD attributes do not have XP set.

This patch follows the UefiCpuPkg pattern and adds
EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
initialization. This ensures that memory regions which already have
these attributes set get them set in the GCD attributes, properly
syncing between the GCD and the page table.

This mitigates the issue seen, however, additional investigations
into setting the GCD attributes earlier and maintaining a better
sync between the GCD and the page table are being done.

Feedback on this proposal is greatly appreciated, particularly
any pitfalls or more architectural solutions to issues seen
with syncing the GCD and the page table.

PR: https://github.com/tianocore/edk2/pull/4311
Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1

Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Sean Brogan <sean.brogan@microsoft.com>

Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
---
 ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
 1 file changed, 49 insertions(+), 6 deletions(-)

diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
index 2e73719dce04..3ef0380e084f 100644
--- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
+++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
@@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
   UINTN                 EndIndex;
   EFI_PHYSICAL_ADDRESS  RegionStart;
   UINT64                RegionLength;
+  UINT64                Capabilities;
 
   DEBUG ((
     DEBUG_GCD,
@@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
       RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
     }
 
+    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
+    // constructs, not hardware features) and they are critical to maintaining a security boundary
+    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
+
     //
-    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
+    // Update GCD capabilities as these may have changed in the page table since the GCD was created
+    // this follows the same pattern as x86 GCD and Page Table syncing
     //
-    gDS->SetMemorySpaceAttributes (
-           RegionStart,
-           RegionLength,
-           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
-           );
+    Status = gDS->SetMemorySpaceCapabilities (
+                    RegionStart,
+                    RegionLength,
+                    Capabilities
+                    );
+
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
+        __func__,
+        Capabilities,
+        RegionStart,
+        RegionLength,
+        Status
+        ));
+      ASSERT_EFI_ERROR (Status);
+      continue;
+    }
+
+    //
+    // Set memory attributes according to the page table attribute and the original attribute of descriptor
+    //
+    Status = gDS->SetMemorySpaceAttributes (
+                    RegionStart,
+                    RegionLength,
+                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
+                    );
+
+    if (EFI_ERROR (Status)) {
+      DEBUG ((
+        DEBUG_ERROR,
+        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
+        __func__,
+        Attributes,
+        RegionStart,
+        RegionLength,
+        Status
+        ));
+      ASSERT_EFI_ERROR (Status);
+      continue;
+    }
   }
 
   return EFI_SUCCESS;
-- 
2.40.0

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ard Biesheuvel]

On Wed, 26 Apr 2023 at 02:09, Oliver Smith-Denny
<osde@linux.microsoft.com> wrote:
>
> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
> GCD with the page table. However, unlike when the UefiCpuPkg's
> CpuDxe initializes, the Arm version does not update the GCD
> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
> the capabilities to be the existing page table attributes for
> this range, but the UefiCpuPkg CpuDxe sets the above attributes
> as they are software constructs, possible to set for any memory
> hardware).
>
> As a result, when the GCD attributes are attempted to be set
> against the old GCD capabilities, attributes that are set in the
> page table can get lost because the new attributes are not in the
> old GCD capabilities (and yet they are already set in the page
> table) meaning that the attempted sync between the GCD and the
> page table was a failure and drivers querying one vs the other
> will see different state. This can lead to RWX memory regions
> even with the no-execute policy set, because core drivers (such
> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
> allocate pages, query the GCD attributes, attempt to set a new
> cache attribute and end up clearing the XP bit in the page table
> because the GCD attributes do not have XP set.
>
> This patch follows the UefiCpuPkg pattern and adds
> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
> initialization. This ensures that memory regions which already have
> these attributes set get them set in the GCD attributes, properly
> syncing between the GCD and the page table.
>
> This mitigates the issue seen, however, additional investigations
> into setting the GCD attributes earlier and maintaining a better
> sync between the GCD and the page table are being done.
>
> Feedback on this proposal is greatly appreciated, particularly
> any pitfalls or more architectural solutions to issues seen
> with syncing the GCD and the page table.
>

I think this is conceptually correct. However, I've played with this
in the past, and IIRC, these attributes are inherited by the EFI
memory map too, and not updated when allocations are made. This means
that all code and data regions will be listed as RP, RO and XP in the
EFI memory map, which is going to confuse Linux at the very least, and
potentially other OSes as well.

Generally, the EFI and PI specs are very vague when it comes to
defining whether memory region attributes apply to the memory region
itself ("this memory can be mapped as read-only or non-exec") or its
contents ("these pages can be mapped read-only because the code does
not expect to be able to write to it").

Before we have some clarification and some rigid wording in the spec
as to what these attributes actually mean for non-allocated regions vs
allocated ones, I don't think we can use them like this.
Alternatively, we could update the GCD core so these attributes are
not inherited by the EFI memory map.

Another potential concern is fragmentation: the GCD memory map has
very few entries usually under the current usage model, but keeping
track of all memory permission attributes is going to inflate its size
substantially.

Also, including EFI_MEMORY_RP only makes sense if we implement a way
to apply it, which ArmCpuDxe currently does not provide.


> PR: https://github.com/tianocore/edk2/pull/4311
> Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Sami Mujawar <sami.mujawar@arm.com>
> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
> Cc: Sean Brogan <sean.brogan@microsoft.com>
>
> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
> ---
>  ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
>  1 file changed, 49 insertions(+), 6 deletions(-)
>
> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> index 2e73719dce04..3ef0380e084f 100644
> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
>    UINTN                 EndIndex;
>    EFI_PHYSICAL_ADDRESS  RegionStart;
>    UINT64                RegionLength;
> +  UINT64                Capabilities;
>
>    DEBUG ((
>      DEBUG_GCD,
> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
>        RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
>      }
>
> +    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
> +    // constructs, not hardware features) and they are critical to maintaining a security boundary
> +    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
> +
>      //
> -    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
> +    // Update GCD capabilities as these may have changed in the page table since the GCD was created
> +    // this follows the same pattern as x86 GCD and Page Table syncing
>      //
> -    gDS->SetMemorySpaceAttributes (
> -           RegionStart,
> -           RegionLength,
> -           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
> -           );
> +    Status = gDS->SetMemorySpaceCapabilities (
> +                    RegionStart,
> +                    RegionLength,
> +                    Capabilities
> +                    );
> +
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((
> +        DEBUG_ERROR,
> +        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> +        __func__,
> +        Capabilities,
> +        RegionStart,
> +        RegionLength,
> +        Status
> +        ));
> +      ASSERT_EFI_ERROR (Status);
> +      continue;
> +    }
> +
> +    //
> +    // Set memory attributes according to the page table attribute and the original attribute of descriptor
> +    //
> +    Status = gDS->SetMemorySpaceAttributes (
> +                    RegionStart,
> +                    RegionLength,
> +                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
> +                    );
> +
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((
> +        DEBUG_ERROR,
> +        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
> +        __func__,
> +        Attributes,
> +        RegionStart,
> +        RegionLength,
> +        Status
> +        ));
> +      ASSERT_EFI_ERROR (Status);
> +      continue;
> +    }
>    }
>
>    return EFI_SUCCESS;
> --
> 2.40.0
>

Re: [edk2-devel][PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

On 5/1/2023 6:02 AM, Ard Biesheuvel wrote:
> On Wed, 26 Apr 2023 at 02:09, Oliver Smith-Denny
> <osde@linux.microsoft.com> wrote:
>>
>> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
>> GCD with the page table. However, unlike when the UefiCpuPkg's
>> CpuDxe initializes, the Arm version does not update the GCD
>> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
>> the capabilities to be the existing page table attributes for
>> this range, but the UefiCpuPkg CpuDxe sets the above attributes
>> as they are software constructs, possible to set for any memory
>> hardware).
>>
>> As a result, when the GCD attributes are attempted to be set
>> against the old GCD capabilities, attributes that are set in the
>> page table can get lost because the new attributes are not in the
>> old GCD capabilities (and yet they are already set in the page
>> table) meaning that the attempted sync between the GCD and the
>> page table was a failure and drivers querying one vs the other
>> will see different state. This can lead to RWX memory regions
>> even with the no-execute policy set, because core drivers (such
>> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
>> allocate pages, query the GCD attributes, attempt to set a new
>> cache attribute and end up clearing the XP bit in the page table
>> because the GCD attributes do not have XP set.
>>
>> This patch follows the UefiCpuPkg pattern and adds
>> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
>> initialization. This ensures that memory regions which already have
>> these attributes set get them set in the GCD attributes, properly
>> syncing between the GCD and the page table.
>>
>> This mitigates the issue seen, however, additional investigations
>> into setting the GCD attributes earlier and maintaining a better
>> sync between the GCD and the page table are being done.
>>
>> Feedback on this proposal is greatly appreciated, particularly
>> any pitfalls or more architectural solutions to issues seen
>> with syncing the GCD and the page table.
>>
> 
> I think this is conceptually correct. However, I've played with this
> in the past, and IIRC, these attributes are inherited by the EFI
> memory map too, and not updated when allocations are made. This means
> that all code and data regions will be listed as RP, RO and XP in the
> EFI memory map, which is going to confuse Linux at the very least, and
> potentially other OSes as well.

Thanks for the detailed response, I appreciate it!
A clarification here: my patch follows what the x86 code does (see
https://github.com/tianocore/edk2/blob/56e9828380b7425678a080bd3a08e7c741af67ba/UefiCpuPkg/CpuDxe/CpuPageTable.c#LL994C1-L1077C27),
where the capabilities of each region are updated to include RP, RO, and
XP. However, the attributes of each region are only updated to include
these flags if the page table has the attributes set for this region.
I.e. we are only allowing for the possibility of these bits to be
set, but not actually setting them in the attributes unless the page
table already has them set. So, at the very least, we should be
matching what x86 does (so OS's should not be broken), unless
the other discrepancies in the x86 and Arm memory attribute handling
cause issue.

The main thing my change is intended to address is the case where
code that uses the GCD instead of the page table (such as the
NonDiscoverablePciDeviceIo driver I mentioned) attempts to set
a CPU memory attribute (such as UC) and ends up clearing the XP bit
that was set in the page table, but wasn't in the GCD (because it was
never properly synced with the page table). This could also be solved
by going to each caller and updating it to set the GCD capabilities
before it sets the GCD attributes (and perhaps they should be, already).
However, this puts the burden of maintaining memory protections such
as XP on each caller, instead of handling it at a core level (now,
there are of course complete design changes that could make this more
effective, but this was an attempt at a simple first step).

My understanding is that the EFI memory map is built on demand by calls
to GetMemoryMap from the page descriptor list, which is updated
thoughout bootservices, i.e. that it isn't pulling from the GCD. I will
go back and trace through this logic again.

> 
> Generally, the EFI and PI specs are very vague when it comes to
> defining whether memory region attributes apply to the memory region
> itself ("this memory can be mapped as read-only or non-exec") or its
> contents ("these pages can be mapped read-only because the code does
> not expect to be able to write to it").
> 
> Before we have some clarification and some rigid wording in the spec
> as to what these attributes actually mean for non-allocated regions vs
> allocated ones, I don't think we can use them like this.
> Alternatively, we could update the GCD core so these attributes are
> not inherited by the EFI memory map.
> 
> Another potential concern is fragmentation: the GCD memory map has
> very few entries usually under the current usage model, but keeping
> track of all memory permission attributes is going to inflate its size
> substantially.

I think this should not change the size of the GCD, right? It is not
tracking any more regions than it already was. It simply is updating
the capabilities of each region it was already tracking (and possibly
the attributes if the page table had RO, RP, or XP set). I agree that
not tracking each range of memory is critical, we have seen issues when
non-existent memory was getting tracked.

> 
> Also, including EFI_MEMORY_RP only makes sense if we implement a way
> to apply it, which ArmCpuDxe currently does not provide.

Thanks for pointing this out, I hadn't traced and seen that RP is not
implemented. If this moves forward, I can drop it (and with a comment
why it is different).

> 
> 
>> PR: https://github.com/tianocore/edk2/pull/4311
>> Personal branch: https://github.com/os-d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
>>
>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
>> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
>> Cc: Sami Mujawar <sami.mujawar@arm.com>
>> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
>> Cc: Sean Brogan <sean.brogan@microsoft.com>
>>
>> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
>> ---
>>   ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55 +++++++++++++++++---
>>   1 file changed, 49 insertions(+), 6 deletions(-)
>>
>> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>> index 2e73719dce04..3ef0380e084f 100644
>> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
>> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
>>     UINTN                 EndIndex;
>>     EFI_PHYSICAL_ADDRESS  RegionStart;
>>     UINT64                RegionLength;
>> +  UINT64                Capabilities;
>>
>>     DEBUG ((
>>       DEBUG_GCD,
>> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
>>         RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart;
>>       }
>>
>> +    // Always add RO, RP, and XP as all memory is capable of supporting these types (they are software
>> +    // constructs, not hardware features) and they are critical to maintaining a security boundary
>> +    Capabilities = MemorySpaceMap[Index].Capabilities | EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
>> +
>>       //
>> -    // Set memory attributes according to MTRR attribute and the original attribute of descriptor
>> +    // Update GCD capabilities as these may have changed in the page table since the GCD was created
>> +    // this follows the same pattern as x86 GCD and Page Table syncing
>>       //
>> -    gDS->SetMemorySpaceAttributes (
>> -           RegionStart,
>> -           RegionLength,
>> -           (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes)
>> -           );
>> +    Status = gDS->SetMemorySpaceCapabilities (
>> +                    RegionStart,
>> +                    RegionLength,
>> +                    Capabilities
>> +                    );
>> +
>> +    if (EFI_ERROR (Status)) {
>> +      DEBUG ((
>> +        DEBUG_ERROR,
>> +        "%a - failed to update GCD capabilities: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
>> +        __func__,
>> +        Capabilities,
>> +        RegionStart,
>> +        RegionLength,
>> +        Status
>> +        ));
>> +      ASSERT_EFI_ERROR (Status);
>> +      continue;
>> +    }
>> +
>> +    //
>> +    // Set memory attributes according to the page table attribute and the original attribute of descriptor
>> +    //
>> +    Status = gDS->SetMemorySpaceAttributes (
>> +                    RegionStart,
>> +                    RegionLength,
>> +                    (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
>> +                    );
>> +
>> +    if (EFI_ERROR (Status)) {
>> +      DEBUG ((
>> +        DEBUG_ERROR,
>> +        "%a - failed to update GCD attributes: 0x%llx on memory region: 0x%llx length: 0x%llx Status: %r\n",
>> +        __func__,
>> +        Attributes,
>> +        RegionStart,
>> +        RegionLength,
>> +        Status
>> +        ));
>> +      ASSERT_EFI_ERROR (Status);
>> +      continue;
>> +    }
>>     }
>>
>>     return EFI_SUCCESS;
>> --
>> 2.40.0
>>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael D Kinney]

Hi,

These UEFI Memory Map, GCD, and Page Table interactions can be complex and I
agree there are some UEFI/PI spec clarifications that may help.

Ray hosts a TianoCore design meeting when needed.  Do you think a meeting with
an open discussion on these topics would help, or do we prefer to continue with
email discussions?

Thanks,

Mike

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Oliver
> Smith-Denny
> Sent: Monday, May 1, 2023 10:04 AM
> To: Ard Biesheuvel <ardb@kernel.org>
> Cc: devel@edk2.groups.io; Leif Lindholm <quic_llindhol@quicinc.com>; Ard
> Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> <sami.mujawar@arm.com>; Michael Kubacki
> <mikuback@linux.microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities With Page Table Attributes
> 
> On 5/1/2023 6:02 AM, Ard Biesheuvel wrote:
> > On Wed, 26 Apr 2023 at 02:09, Oliver Smith-Denny
> > <osde@linux.microsoft.com> wrote:
> >>
> >> When ArmPkg's CpuDxe driver initializes, it attempts to sync the
> >> GCD with the page table. However, unlike when the UefiCpuPkg's
> >> CpuDxe initializes, the Arm version does not update the GCD
> >> capabilities with EFI_MEMORY_[RO|RP|XP] (this could also set
> >> the capabilities to be the existing page table attributes for
> >> this range, but the UefiCpuPkg CpuDxe sets the above attributes
> >> as they are software constructs, possible to set for any memory
> >> hardware).
> >>
> >> As a result, when the GCD attributes are attempted to be set
> >> against the old GCD capabilities, attributes that are set in the
> >> page table can get lost because the new attributes are not in the
> >> old GCD capabilities (and yet they are already set in the page
> >> table) meaning that the attempted sync between the GCD and the
> >> page table was a failure and drivers querying one vs the other
> >> will see different state. This can lead to RWX memory regions
> >> even with the no-execute policy set, because core drivers (such
> >> as NonDiscoverablePciDeviceIo, to be fixed up in a later patchset)
> >> allocate pages, query the GCD attributes, attempt to set a new
> >> cache attribute and end up clearing the XP bit in the page table
> >> because the GCD attributes do not have XP set.
> >>
> >> This patch follows the UefiCpuPkg pattern and adds
> >> EFI_MEMORY_[RO|RP|XP] to the GCD capabilities during CpuDxe
> >> initialization. This ensures that memory regions which already have
> >> these attributes set get them set in the GCD attributes, properly
> >> syncing between the GCD and the page table.
> >>
> >> This mitigates the issue seen, however, additional investigations
> >> into setting the GCD attributes earlier and maintaining a better
> >> sync between the GCD and the page table are being done.
> >>
> >> Feedback on this proposal is greatly appreciated, particularly
> >> any pitfalls or more architectural solutions to issues seen
> >> with syncing the GCD and the page table.
> >>
> >
> > I think this is conceptually correct. However, I've played with this
> > in the past, and IIRC, these attributes are inherited by the EFI
> > memory map too, and not updated when allocations are made. This means
> > that all code and data regions will be listed as RP, RO and XP in the
> > EFI memory map, which is going to confuse Linux at the very least, and
> > potentially other OSes as well.
> 
> Thanks for the detailed response, I appreciate it!
> A clarification here: my patch follows what the x86 code does (see
> https://github.com/tianocore/edk2/blob/56e9828380b7425678a080bd3a08e
> 7c741af67ba/UefiCpuPkg/CpuDxe/CpuPageTable.c#LL994C1-L1077C27),
> where the capabilities of each region are updated to include RP, RO, and
> XP. However, the attributes of each region are only updated to include
> these flags if the page table has the attributes set for this region.
> I.e. we are only allowing for the possibility of these bits to be
> set, but not actually setting them in the attributes unless the page
> table already has them set. So, at the very least, we should be
> matching what x86 does (so OS's should not be broken), unless
> the other discrepancies in the x86 and Arm memory attribute handling
> cause issue.
> 
> The main thing my change is intended to address is the case where
> code that uses the GCD instead of the page table (such as the
> NonDiscoverablePciDeviceIo driver I mentioned) attempts to set
> a CPU memory attribute (such as UC) and ends up clearing the XP bit
> that was set in the page table, but wasn't in the GCD (because it was
> never properly synced with the page table). This could also be solved
> by going to each caller and updating it to set the GCD capabilities
> before it sets the GCD attributes (and perhaps they should be, already).
> However, this puts the burden of maintaining memory protections such
> as XP on each caller, instead of handling it at a core level (now,
> there are of course complete design changes that could make this more
> effective, but this was an attempt at a simple first step).
> 
> My understanding is that the EFI memory map is built on demand by calls
> to GetMemoryMap from the page descriptor list, which is updated
> thoughout bootservices, i.e. that it isn't pulling from the GCD. I will
> go back and trace through this logic again.
> 
> >
> > Generally, the EFI and PI specs are very vague when it comes to
> > defining whether memory region attributes apply to the memory region
> > itself ("this memory can be mapped as read-only or non-exec") or its
> > contents ("these pages can be mapped read-only because the code does
> > not expect to be able to write to it").
> >
> > Before we have some clarification and some rigid wording in the spec
> > as to what these attributes actually mean for non-allocated regions vs
> > allocated ones, I don't think we can use them like this.
> > Alternatively, we could update the GCD core so these attributes are
> > not inherited by the EFI memory map.
> >
> > Another potential concern is fragmentation: the GCD memory map has
> > very few entries usually under the current usage model, but keeping
> > track of all memory permission attributes is going to inflate its size
> > substantially.
> 
> I think this should not change the size of the GCD, right? It is not
> tracking any more regions than it already was. It simply is updating
> the capabilities of each region it was already tracking (and possibly
> the attributes if the page table had RO, RP, or XP set). I agree that
> not tracking each range of memory is critical, we have seen issues when
> non-existent memory was getting tracked.
> 
> >
> > Also, including EFI_MEMORY_RP only makes sense if we implement a way
> > to apply it, which ArmCpuDxe currently does not provide.
> 
> Thanks for pointing this out, I hadn't traced and seen that RP is not
> implemented. If this moves forward, I can drop it (and with a comment
> why it is different).
> 
> >
> >
> >> PR: https://github.com/tianocore/edk2/pull/4311
> >> Personal branch: https://github.com/os-
> d/edk2/tree/osde/sync_aarch64_gcd_capabilities_v1
> >>
> >> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> >> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> >> Cc: Sami Mujawar <sami.mujawar@arm.com>
> >> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
> >> Cc: Sean Brogan <sean.brogan@microsoft.com>
> >>
> >> Signed-off-by: Oliver Smith-Denny <osde@linux.microsoft.com>
> >> ---
> >>   ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 55
> +++++++++++++++++---
> >>   1 file changed, 49 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >> index 2e73719dce04..3ef0380e084f 100644
> >> --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >> +++ b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c
> >> @@ -90,6 +90,7 @@ SetGcdMemorySpaceAttributes (
> >>     UINTN                 EndIndex;
> >>     EFI_PHYSICAL_ADDRESS  RegionStart;
> >>     UINT64                RegionLength;
> >> +  UINT64                Capabilities;
> >>
> >>     DEBUG ((
> >>       DEBUG_GCD,
> >> @@ -146,14 +147,56 @@ SetGcdMemorySpaceAttributes (
> >>         RegionLength = MemorySpaceMap[Index].BaseAddress +
> MemorySpaceMap[Index].Length - RegionStart;
> >>       }
> >>
> >> +    // Always add RO, RP, and XP as all memory is capable of supporting
> these types (they are software
> >> +    // constructs, not hardware features) and they are critical to
> maintaining a security boundary
> >> +    Capabilities = MemorySpaceMap[Index].Capabilities |
> EFI_MEMORY_RO | EFI_MEMORY_RP | EFI_MEMORY_XP;
> >> +
> >>       //
> >> -    // Set memory attributes according to MTRR attribute and the original
> attribute of descriptor
> >> +    // Update GCD capabilities as these may have changed in the page
> table since the GCD was created
> >> +    // this follows the same pattern as x86 GCD and Page Table syncing
> >>       //
> >> -    gDS->SetMemorySpaceAttributes (
> >> -           RegionStart,
> >> -           RegionLength,
> >> -           (MemorySpaceMap[Index].Attributes &
> ~EFI_MEMORY_CACHETYPE_MASK) |
> (MemorySpaceMap[Index].Capabilities & Attributes)
> >> -           );
> >> +    Status = gDS->SetMemorySpaceCapabilities (
> >> +                    RegionStart,
> >> +                    RegionLength,
> >> +                    Capabilities
> >> +                    );
> >> +
> >> +    if (EFI_ERROR (Status)) {
> >> +      DEBUG ((
> >> +        DEBUG_ERROR,
> >> +        "%a - failed to update GCD capabilities: 0x%llx on memory region:
> 0x%llx length: 0x%llx Status: %r\n",
> >> +        __func__,
> >> +        Capabilities,
> >> +        RegionStart,
> >> +        RegionLength,
> >> +        Status
> >> +        ));
> >> +      ASSERT_EFI_ERROR (Status);
> >> +      continue;
> >> +    }
> >> +
> >> +    //
> >> +    // Set memory attributes according to the page table attribute and the
> original attribute of descriptor
> >> +    //
> >> +    Status = gDS->SetMemorySpaceAttributes (
> >> +                    RegionStart,
> >> +                    RegionLength,
> >> +                    (MemorySpaceMap[Index].Attributes &
> ~EFI_MEMORY_CACHETYPE_MASK) | (Attributes & Capabilities)
> >> +                    );
> >> +
> >> +    if (EFI_ERROR (Status)) {
> >> +      DEBUG ((
> >> +        DEBUG_ERROR,
> >> +        "%a - failed to update GCD attributes: 0x%llx on memory region:
> 0x%llx length: 0x%llx Status: %r\n",
> >> +        __func__,
> >> +        Attributes,
> >> +        RegionStart,
> >> +        RegionLength,
> >> +        Status
> >> +        ));
> >> +      ASSERT_EFI_ERROR (Status);
> >> +      continue;
> >> +    }
> >>     }
> >>
> >>     return EFI_SUCCESS;
> >> --
> >> 2.40.0
> >>
> 
> 
> 
> 

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ard Biesheuvel]

On Mon, 1 May 2023 at 19:49, Michael D Kinney
<michael.d.kinney@intel.com> wrote:
>
> Hi,
>
> These UEFI Memory Map, GCD, and Page Table interactions can be complex and I
> agree there are some UEFI/PI spec clarifications that may help.
>
> Ray hosts a TianoCore design meeting when needed.  Do you think a meeting with
> an open discussion on these topics would help, or do we prefer to continue with
> email discussions?
>

I'll gladly join a call to discuss this if we can find a timeslot that
works for everyone in terms of time zone. (I'm on Paris time)

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
> On Mon, 1 May 2023 at 19:49, Michael D Kinney
> <michael.d.kinney@intel.com> wrote:
>>
>> Hi,
>>
>> These UEFI Memory Map, GCD, and Page Table interactions can be complex and I
>> agree there are some UEFI/PI spec clarifications that may help.
>>
>> Ray hosts a TianoCore design meeting when needed.  Do you think a meeting with
>> an open discussion on these topics would help, or do we prefer to continue with
>> email discussions?
>>
> 
> I'll gladly join a call to discuss this if we can find a timeslot that
> works for everyone in terms of time zone. (I'm on Paris time)

I also think a call would be great, I certainly would benefit from
learning more here :). I'm sure various members of my team would
be interested in joining, happy to be flexible on timeslot (we are
generally in PST).

Thanks,
Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael D Kinney]

Thanks for the quick feedback.  Ray is out this week.  I will work with Ray to arrange a time slot, hopefully next week that works for everyone.

Mike

> -----Original Message-----
> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> Sent: Monday, May 1, 2023 10:53 AM
> To: Ard Biesheuvel <ardb@kernel.org>; devel@edk2.groups.io; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>;
> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> <sami.mujawar@arm.com>; Michael Kubacki
> <mikuback@linux.microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities With Page Table Attributes
> 
> On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
> > On Mon, 1 May 2023 at 19:49, Michael D Kinney
> > <michael.d.kinney@intel.com> wrote:
> >>
> >> Hi,
> >>
> >> These UEFI Memory Map, GCD, and Page Table interactions can be
> complex and I
> >> agree there are some UEFI/PI spec clarifications that may help.
> >>
> >> Ray hosts a TianoCore design meeting when needed.  Do you think a
> meeting with
> >> an open discussion on these topics would help, or do we prefer to
> continue with
> >> email discussions?
> >>
> >
> > I'll gladly join a call to discuss this if we can find a timeslot that
> > works for everyone in terms of time zone. (I'm on Paris time)
> 
> I also think a call would be great, I certainly would benefit from
> learning more here :). I'm sure various members of my team would
> be interested in joining, happy to be flexible on timeslot (we are
> generally in PST).
> 
> Thanks,
> Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ni, Ray]

[-- Attachment #1: Type: text/plain, Size: 2632 bytes --]

All,
Can you check if the meeting time is ok for you?

It will be in this week:
* PDT Thursday 07:00
* Paris Thursday 16:00
* Shanghai Thursday 22:00

Thanks,
Ray


> -----Original Message-----
> From: Kinney, Michael D <michael.d.kinney@intel.com>
> Sent: Tuesday, May 2, 2023 1:59 AM
> To: Oliver Smith-Denny <osde@linux.microsoft.com>; Ard Biesheuvel
> <ardb@kernel.org>; devel@edk2.groups.io
> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>;
> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> <sami.mujawar@arm.com>; Michael Kubacki
> <mikuback@linux.microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>
> Subject: RE: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities With Page Table Attributes
> 
> Thanks for the quick feedback.  Ray is out this week.  I will work with Ray to
> arrange a time slot, hopefully next week that works for everyone.
> 
> Mike
> 
> > -----Original Message-----
> > From: Oliver Smith-Denny <osde@linux.microsoft.com>
> > Sent: Monday, May 1, 2023 10:53 AM
> > To: Ard Biesheuvel <ardb@kernel.org>; devel@edk2.groups.io; Kinney,
> > Michael D <michael.d.kinney@intel.com>
> > Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>;
> > Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> > <sami.mujawar@arm.com>; Michael Kubacki
> > <mikuback@linux.microsoft.com>; Sean Brogan
> > <sean.brogan@microsoft.com>
> > Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> > Capabilities With Page Table Attributes
> >
> > On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
> > > On Mon, 1 May 2023 at 19:49, Michael D Kinney
> > > <michael.d.kinney@intel.com> wrote:
> > >>
> > >> Hi,
> > >>
> > >> These UEFI Memory Map, GCD, and Page Table interactions can be
> > complex and I
> > >> agree there are some UEFI/PI spec clarifications that may help.
> > >>
> > >> Ray hosts a TianoCore design meeting when needed.  Do you think a
> > meeting with
> > >> an open discussion on these topics would help, or do we prefer to
> > continue with
> > >> email discussions?
> > >>
> > >
> > > I'll gladly join a call to discuss this if we can find a timeslot that
> > > works for everyone in terms of time zone. (I'm on Paris time)
> >
> > I also think a call would be great, I certainly would benefit from
> > learning more here :). I'm sure various members of my team would
> > be interested in joining, happy to be flexible on timeslot (we are
> > generally in PST).
> >
> > Thanks,
> > Oliver

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SUMMARY;LANGUAGE=en-us:UEFI Memory Map\, GCD\, Page Table discussion - ARM/
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Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

Hi Ray,

Thanks for setting up a meeting on this! We have some
conflicts on our side for this week, does it work
for everyone to have it the following Thursday
(May 18th)?

The time works for us.

Thanks,
Oliver

On 5/8/2023 6:35 PM, Ni, Ray wrote:
> All,
> Can you check if the meeting time is ok for you?
> 
> It will be in this week:
> * PDT Thursday 07:00
> * Paris Thursday 16:00
> * Shanghai Thursday 22:00
> 
> Thanks,
> Ray
> 
> 
>> -----Original Message-----
>> From: Kinney, Michael D <michael.d.kinney@intel.com>
>> Sent: Tuesday, May 2, 2023 1:59 AM
>> To: Oliver Smith-Denny <osde@linux.microsoft.com>; Ard Biesheuvel
>> <ardb@kernel.org>; devel@edk2.groups.io
>> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>;
>> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
>> <sami.mujawar@arm.com>; Michael Kubacki
>> <mikuback@linux.microsoft.com>; Sean Brogan
>> <sean.brogan@microsoft.com>; Kinney, Michael D
>> <michael.d.kinney@intel.com>
>> Subject: RE: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>> Capabilities With Page Table Attributes
>>
>> Thanks for the quick feedback.  Ray is out this week.  I will work with Ray to
>> arrange a time slot, hopefully next week that works for everyone.
>>
>> Mike
>>
>>> -----Original Message-----
>>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
>>> Sent: Monday, May 1, 2023 10:53 AM
>>> To: Ard Biesheuvel <ardb@kernel.org>; devel@edk2.groups.io; Kinney,
>>> Michael D <michael.d.kinney@intel.com>
>>> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>;
>>> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
>>> <sami.mujawar@arm.com>; Michael Kubacki
>>> <mikuback@linux.microsoft.com>; Sean Brogan
>>> <sean.brogan@microsoft.com>
>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>>> Capabilities With Page Table Attributes
>>>
>>> On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
>>>> On Mon, 1 May 2023 at 19:49, Michael D Kinney
>>>> <michael.d.kinney@intel.com> wrote:
>>>>>
>>>>> Hi,
>>>>>
>>>>> These UEFI Memory Map, GCD, and Page Table interactions can be
>>> complex and I
>>>>> agree there are some UEFI/PI spec clarifications that may help.
>>>>>
>>>>> Ray hosts a TianoCore design meeting when needed.  Do you think a
>>> meeting with
>>>>> an open discussion on these topics would help, or do we prefer to
>>> continue with
>>>>> email discussions?
>>>>>
>>>>
>>>> I'll gladly join a call to discuss this if we can find a timeslot that
>>>> works for everyone in terms of time zone. (I'm on Paris time)
>>>
>>> I also think a call would be great, I certainly would benefit from
>>> learning more here :). I'm sure various members of my team would
>>> be interested in joining, happy to be flexible on timeslot (we are
>>> generally in PST).
>>>
>>> Thanks,
>>> Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael D Kinney]

I would prefer next week as well.

Mike

> -----Original Message-----
> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> Sent: Monday, May 8, 2023 7:03 PM
> To: Ni, Ray <ray.ni@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; Ard Biesheuvel <ardb@kernel.org>;
> devel@edk2.groups.io
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities With Page Table Attributes
> 
> Hi Ray,
> 
> Thanks for setting up a meeting on this! We have some
> conflicts on our side for this week, does it work
> for everyone to have it the following Thursday
> (May 18th)?
> 
> The time works for us.
> 
> Thanks,
> Oliver
> 
> On 5/8/2023 6:35 PM, Ni, Ray wrote:
> > All,
> > Can you check if the meeting time is ok for you?
> >
> > It will be in this week:
> > * PDT Thursday 07:00
> > * Paris Thursday 16:00
> > * Shanghai Thursday 22:00
> >
> > Thanks,
> > Ray
> >
> >
> >> -----Original Message-----
> >> From: Kinney, Michael D <michael.d.kinney@intel.com>
> >> Sent: Tuesday, May 2, 2023 1:59 AM
> >> To: Oliver Smith-Denny <osde@linux.microsoft.com>; Ard Biesheuvel
> >> <ardb@kernel.org>; devel@edk2.groups.io
> >> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> <quic_llindhol@quicinc.com>;
> >> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> >> <sami.mujawar@arm.com>; Michael Kubacki
> >> <mikuback@linux.microsoft.com>; Sean Brogan
> >> <sean.brogan@microsoft.com>; Kinney, Michael D
> >> <michael.d.kinney@intel.com>
> >> Subject: RE: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >> Capabilities With Page Table Attributes
> >>
> >> Thanks for the quick feedback.  Ray is out this week.  I will work with Ray to
> >> arrange a time slot, hopefully next week that works for everyone.
> >>
> >> Mike
> >>
> >>> -----Original Message-----
> >>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> >>> Sent: Monday, May 1, 2023 10:53 AM
> >>> To: Ard Biesheuvel <ardb@kernel.org>; devel@edk2.groups.io; Kinney,
> >>> Michael D <michael.d.kinney@intel.com>
> >>> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> <quic_llindhol@quicinc.com>;
> >>> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> >>> <sami.mujawar@arm.com>; Michael Kubacki
> >>> <mikuback@linux.microsoft.com>; Sean Brogan
> >>> <sean.brogan@microsoft.com>
> >>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >>> Capabilities With Page Table Attributes
> >>>
> >>> On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
> >>>> On Mon, 1 May 2023 at 19:49, Michael D Kinney
> >>>> <michael.d.kinney@intel.com> wrote:
> >>>>>
> >>>>> Hi,
> >>>>>
> >>>>> These UEFI Memory Map, GCD, and Page Table interactions can be
> >>> complex and I
> >>>>> agree there are some UEFI/PI spec clarifications that may help.
> >>>>>
> >>>>> Ray hosts a TianoCore design meeting when needed.  Do you think a
> >>> meeting with
> >>>>> an open discussion on these topics would help, or do we prefer to
> >>> continue with
> >>>>> email discussions?
> >>>>>
> >>>>
> >>>> I'll gladly join a call to discuss this if we can find a timeslot that
> >>>> works for everyone in terms of time zone. (I'm on Paris time)
> >>>
> >>> I also think a call would be great, I certainly would benefit from
> >>> learning more here :). I'm sure various members of my team would
> >>> be interested in joining, happy to be flexible on timeslot (we are
> >>> generally in PST).
> >>>
> >>> Thanks,
> >>> Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ard Biesheuvel]

On Tue, 9 May 2023 at 04:04, Kinney, Michael D
<michael.d.kinney@intel.com> wrote:
>
> I would prefer next week as well.
>
> Mike
>

Next week, i can only do Wednesday. The week after (22-26), the time
slot works for me on any day of the week.

-- 
Ard.


> > -----Original Message-----
> > From: Oliver Smith-Denny <osde@linux.microsoft.com>
> > Sent: Monday, May 8, 2023 7:03 PM
> > To: Ni, Ray <ray.ni@intel.com>; Kinney, Michael D
> > <michael.d.kinney@intel.com>; Ard Biesheuvel <ardb@kernel.org>;
> > devel@edk2.groups.io
> > Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> > <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> > Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
> > <sean.brogan@microsoft.com>
> > Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> > Capabilities With Page Table Attributes
> >
> > Hi Ray,
> >
> > Thanks for setting up a meeting on this! We have some
> > conflicts on our side for this week, does it work
> > for everyone to have it the following Thursday
> > (May 18th)?
> >
> > The time works for us.
> >
> > Thanks,
> > Oliver
> >
> > On 5/8/2023 6:35 PM, Ni, Ray wrote:
> > > All,
> > > Can you check if the meeting time is ok for you?
> > >
> > > It will be in this week:
> > > * PDT Thursday 07:00
> > > * Paris Thursday 16:00
> > > * Shanghai Thursday 22:00
> > >
> > > Thanks,
> > > Ray
> > >
> > >
> > >> -----Original Message-----
> > >> From: Kinney, Michael D <michael.d.kinney@intel.com>
> > >> Sent: Tuesday, May 2, 2023 1:59 AM
> > >> To: Oliver Smith-Denny <osde@linux.microsoft.com>; Ard Biesheuvel
> > >> <ardb@kernel.org>; devel@edk2.groups.io
> > >> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> > <quic_llindhol@quicinc.com>;
> > >> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> > >> <sami.mujawar@arm.com>; Michael Kubacki
> > >> <mikuback@linux.microsoft.com>; Sean Brogan
> > >> <sean.brogan@microsoft.com>; Kinney, Michael D
> > >> <michael.d.kinney@intel.com>
> > >> Subject: RE: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> > >> Capabilities With Page Table Attributes
> > >>
> > >> Thanks for the quick feedback.  Ray is out this week.  I will work with Ray to
> > >> arrange a time slot, hopefully next week that works for everyone.
> > >>
> > >> Mike
> > >>
> > >>> -----Original Message-----
> > >>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> > >>> Sent: Monday, May 1, 2023 10:53 AM
> > >>> To: Ard Biesheuvel <ardb@kernel.org>; devel@edk2.groups.io; Kinney,
> > >>> Michael D <michael.d.kinney@intel.com>
> > >>> Cc: Ni, Ray <ray.ni@intel.com>; Leif Lindholm
> > <quic_llindhol@quicinc.com>;
> > >>> Ard Biesheuvel <ardb+tianocore@kernel.org>; Sami Mujawar
> > >>> <sami.mujawar@arm.com>; Michael Kubacki
> > >>> <mikuback@linux.microsoft.com>; Sean Brogan
> > >>> <sean.brogan@microsoft.com>
> > >>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> > >>> Capabilities With Page Table Attributes
> > >>>
> > >>> On 5/1/2023 10:50 AM, Ard Biesheuvel wrote:
> > >>>> On Mon, 1 May 2023 at 19:49, Michael D Kinney
> > >>>> <michael.d.kinney@intel.com> wrote:
> > >>>>>
> > >>>>> Hi,
> > >>>>>
> > >>>>> These UEFI Memory Map, GCD, and Page Table interactions can be
> > >>> complex and I
> > >>>>> agree there are some UEFI/PI spec clarifications that may help.
> > >>>>>
> > >>>>> Ray hosts a TianoCore design meeting when needed.  Do you think a
> > >>> meeting with
> > >>>>> an open discussion on these topics would help, or do we prefer to
> > >>> continue with
> > >>>>> email discussions?
> > >>>>>
> > >>>>
> > >>>> I'll gladly join a call to discuss this if we can find a timeslot that
> > >>>> works for everyone in terms of time zone. (I'm on Paris time)
> > >>>
> > >>> I also think a call would be great, I certainly would benefit from
> > >>> learning more here :). I'm sure various members of my team would
> > >>> be interested in joining, happy to be flexible on timeslot (we are
> > >>> generally in PST).
> > >>>
> > >>> Thanks,
> > >>> Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
> <michael.d.kinney@intel.com> wrote:
>>
>> I would prefer next week as well.
>>
>> Mike
>>
> 
> Next week, i can only do Wednesday. The week after (22-26), the time
> slot works for me on any day of the week.
> 

Weds works from our side, the week after also works perfectly well
any day. Thanks for the flexibility and willingness to meet.

For reference for this specific patch, this bz may help cache in
some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
mail links are largely dead, of course, but can be found on other
mailing list retention sites (maybe in the future we will have PRs
and discussions to reference :).

Thanks,
Oliver

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Taylor Beebe]

Can we schedule the meeting for Wednesday 5/17? I will be out the 
following week and would like to attend.

Thanks :)

On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>> <michael.d.kinney@intel.com> wrote:
>>>
>>> I would prefer next week as well.
>>>
>>> Mike
>>>
>>
>> Next week, i can only do Wednesday. The week after (22-26), the time
>> slot works for me on any day of the week.
>>
> 
> Weds works from our side, the week after also works perfectly well
> any day. Thanks for the flexibility and willingness to meet.
> 
> For reference for this specific patch, this bz may help cache in
> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
> mail links are largely dead, of course, but can be found on other
> mailing list retention sites (maybe in the future we will have PRs
> and discussions to reference :).
> 
> Thanks,
> Oliver
> 
> 
> 
> 
> 

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ni, Ray]

All,
Can you check if the meeting time is ok for you?

It will be in this week:
* PDT Wednesday 07:00
* Paris Wednesday 16:00
* Shanghai Wednesday 22:00

________________________________________
From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor Beebe <t@taylorbeebe.com>
Sent: Thursday, May 11, 2023 0:10
To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel; Kinney, Michael D
Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki; Sean Brogan
Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

Can we schedule the meeting for Wednesday 5/17? I will be out the
following week and would like to attend.

Thanks :)

On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>> <michael.d.kinney@intel.com> wrote:
>>>
>>> I would prefer next week as well.
>>>
>>> Mike
>>>
>>
>> Next week, i can only do Wednesday. The week after (22-26), the time
>> slot works for me on any day of the week.
>>
>
> Weds works from our side, the week after also works perfectly well
> any day. Thanks for the flexibility and willingness to meet.
>
> For reference for this specific patch, this bz may help cache in
> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
> mail links are largely dead, of course, but can be found on other
> mailing list retention sites (maybe in the future we will have PRs
> and discussions to reference :).
>
> Thanks,
> Oliver
>
>
>
>
>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Oliver Smith-Denny]

Hi Ray,

That works from our side, thanks for setting up the meeting!

Oliver

On 5/15/2023 7:53 PM, Ni, Ray wrote:
> All,
> Can you check if the meeting time is ok for you?
> 
> It will be in this week:
> * PDT Wednesday 07:00
> * Paris Wednesday 16:00
> * Shanghai Wednesday 22:00
> 
> ________________________________________
> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor Beebe <t@taylorbeebe.com>
> Sent: Thursday, May 11, 2023 0:10
> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel; Kinney, Michael D
> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki; Sean Brogan
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes
> 
> Can we schedule the meeting for Wednesday 5/17? I will be out the
> following week and would like to attend.
> 
> Thanks :)
> 
> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>>> <michael.d.kinney@intel.com> wrote:
>>>>
>>>> I would prefer next week as well.
>>>>
>>>> Mike
>>>>
>>>
>>> Next week, i can only do Wednesday. The week after (22-26), the time
>>> slot works for me on any day of the week.
>>>
>>
>> Weds works from our side, the week after also works perfectly well
>> any day. Thanks for the flexibility and willingness to meet.
>>
>> For reference for this specific patch, this bz may help cache in
>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
>> mail links are largely dead, of course, but can be found on other
>> mailing list retention sites (maybe in the future we will have PRs
>> and discussions to reference :).
>>
>> Thanks,
>> Oliver
>>
>>
>>
>>
>>
> 
> 
> 
> 
> 
> 

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ni, Ray]

[-- Attachment #1: Type: text/plain, Size: 2972 bytes --]

I created one event in https://edk2.groups.io/g/devel/calendar.

Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-3d06c576cc19%22%7d

The ICS file is also attached.


> -----Original Message-----
> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> Sent: Wednesday, May 17, 2023 1:12 AM
> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
> t@taylorbeebe.com
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
> <sean.brogan@microsoft.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities
> With Page Table Attributes
> 
> Hi Ray,
> 
> That works from our side, thanks for setting up the meeting!
> 
> Oliver
> 
> On 5/15/2023 7:53 PM, Ni, Ray wrote:
> > All,
> > Can you check if the meeting time is ok for you?
> >
> > It will be in this week:
> > * PDT Wednesday 07:00
> > * Paris Wednesday 16:00
> > * Shanghai Wednesday 22:00
> >
> > ________________________________________
> > From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor Beebe
> <t@taylorbeebe.com>
> > Sent: Thursday, May 11, 2023 0:10
> > To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel; Kinney,
> Michael D
> > Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki;
> Sean Brogan
> > Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities With Page Table Attributes
> >
> > Can we schedule the meeting for Wednesday 5/17? I will be out the
> > following week and would like to attend.
> >
> > Thanks :)
> >
> > On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
> >> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
> >>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
> >>> <michael.d.kinney@intel.com> wrote:
> >>>>
> >>>> I would prefer next week as well.
> >>>>
> >>>> Mike
> >>>>
> >>>
> >>> Next week, i can only do Wednesday. The week after (22-26), the time
> >>> slot works for me on any day of the week.
> >>>
> >>
> >> Weds works from our side, the week after also works perfectly well
> >> any day. Thanks for the flexibility and willingness to meet.
> >>
> >> For reference for this specific patch, this bz may help cache in
> >> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
> >> mail links are largely dead, of course, but can be found on other
> >> mailing list retention sites (maybe in the future we will have PRs
> >> and discussions to reference :).
> >>
> >> Thanks,
> >> Oliver
> >>
> >>
> >>
> >>
> >>
> >
> >
> >
> > 
> >
> >

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: UEFI Memory Map GCD Page Table discussion - ARMX86.ics --]
[-- Type: text/calendar; name="UEFI Memory Map GCD Page Table discussion - ARMX86.ics", Size: 51448 bytes --]

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DESCRIPTION: \n____________________________________________________________
	____________________ \nMicrosoft Teams meeting \nJoin on your computer\, m
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LOCATION:Microsoft Teams Meeting
ORGANIZER;CN="Ni, Ray":mailto:ray.ni@intel.com
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Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael Kubacki]

Hi Ray,

We found the last meeting to be very helpful. Can you please set up an 
agenda for an upcoming meeting to discuss what's happened since and next 
steps?

If you're available, perhaps we could see if Wednesday next week at the 
same time would work?

We'd also like to share how GitHub Projects [1] can be used to track 
future work in the memory protection work stream. We've talked about 
Projects for a while in the TianoCore Tools & CI working group and this 
looks like a great opportunity to try it out. A public project has been 
created in the TianoCore org [2]. I've placed some initial high-level 
pillars in the project at the moment.

Projects can help break down larger complex items and show how the 
pieces fit together in a single place. It helps visualize who is working 
on what, when they roughly expect to complete it, and what pillars of 
memory protection work such as compatibility, testing, etc. are defined 
and how we're making progress toward them. In this meeting, we'd like to 
discuss how we can most effectively use it to collaborate in upcoming 
work areas.

It is not meant to replace the mailing list for communication or change 
code review process but to organize and visualize agreed upon memory 
protection work items. Ideally, this will help track that the areas are 
covered we expect, simplify planning to intercept the changes in 
platforms, show how work items are connected, and enable new 
contributors to quickly see how they can contribute.

[1] - 
https://docs.github.com/en/issues/planning-and-tracking-with-projects/learning-about-projects/about-projects
[2] - https://github.com/orgs/tianocore/projects/3

Thanks,
Michael

On 5/17/2023 3:14 AM, Ni, Ray wrote:
> I created one event in https://edk2.groups.io/g/devel/calendar.
> 
> Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-3d06c576cc19%22%7d
> 
> The ICS file is also attached.
> 
> 
>> -----Original Message-----
>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
>> Sent: Wednesday, May 17, 2023 1:12 AM
>> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
>> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
>> t@taylorbeebe.com
>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
>> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
>> <sean.brogan@microsoft.com>
>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities
>> With Page Table Attributes
>>
>> Hi Ray,
>>
>> That works from our side, thanks for setting up the meeting!
>>
>> Oliver
>>
>> On 5/15/2023 7:53 PM, Ni, Ray wrote:
>>> All,
>>> Can you check if the meeting time is ok for you?
>>>
>>> It will be in this week:
>>> * PDT Wednesday 07:00
>>> * Paris Wednesday 16:00
>>> * Shanghai Wednesday 22:00
>>>
>>> ________________________________________
>>> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor Beebe
>> <t@taylorbeebe.com>
>>> Sent: Thursday, May 11, 2023 0:10
>>> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel; Kinney,
>> Michael D
>>> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki;
>> Sean Brogan
>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>> Capabilities With Page Table Attributes
>>>
>>> Can we schedule the meeting for Wednesday 5/17? I will be out the
>>> following week and would like to attend.
>>>
>>> Thanks :)
>>>
>>> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
>>>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>>>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>>>>> <michael.d.kinney@intel.com> wrote:
>>>>>>
>>>>>> I would prefer next week as well.
>>>>>>
>>>>>> Mike
>>>>>>
>>>>>
>>>>> Next week, i can only do Wednesday. The week after (22-26), the time
>>>>> slot works for me on any day of the week.
>>>>>
>>>>
>>>> Weds works from our side, the week after also works perfectly well
>>>> any day. Thanks for the flexibility and willingness to meet.
>>>>
>>>> For reference for this specific patch, this bz may help cache in
>>>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
>>>> mail links are largely dead, of course, but can be found on other
>>>> mailing list retention sites (maybe in the future we will have PRs
>>>> and discussions to reference :).
>>>>
>>>> Thanks,
>>>> Oliver
>>>>
>>>>
>>>>
>>>>
>>>>
>>>
>>>
>>>
>>> 
>>>
>>>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ni, Ray]

It's a good idea to have a focus area ("project") for everyone working together on the same problem.
I see the benefit of having "project" is to align everyone's priority so the "project" can be done within a certain deadline.

Let's talk more about following items in next meeting:
1. Alignment of the problem to solve
2. Alignment of the priority

I am available at 10pm~11pm (GMT+8) next Wednesday night.

Thanks,
Ray

> -----Original Message-----
> From: Michael Kubacki <mikuback@linux.microsoft.com>
> Sent: Friday, June 2, 2023 10:24 AM
> To: Ni, Ray <ray.ni@intel.com>; Oliver Smith-Denny <osde@linux.microsoft.com>;
> devel@edk2.groups.io; Ard Biesheuvel <ardb@kernel.org>; Kinney, Michael D
> <michael.d.kinney@intel.com>; t@taylorbeebe.com
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>; Sean
> Brogan <sean.brogan@microsoft.com>
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities
> With Page Table Attributes
> 
> Hi Ray,
> 
> We found the last meeting to be very helpful. Can you please set up an
> agenda for an upcoming meeting to discuss what's happened since and next
> steps?
> 
> If you're available, perhaps we could see if Wednesday next week at the
> same time would work?
> 
> We'd also like to share how GitHub Projects [1] can be used to track
> future work in the memory protection work stream. We've talked about
> Projects for a while in the TianoCore Tools & CI working group and this
> looks like a great opportunity to try it out. A public project has been
> created in the TianoCore org [2]. I've placed some initial high-level
> pillars in the project at the moment.
> 
> Projects can help break down larger complex items and show how the
> pieces fit together in a single place. It helps visualize who is working
> on what, when they roughly expect to complete it, and what pillars of
> memory protection work such as compatibility, testing, etc. are defined
> and how we're making progress toward them. In this meeting, we'd like to
> discuss how we can most effectively use it to collaborate in upcoming
> work areas.
> 
> It is not meant to replace the mailing list for communication or change
> code review process but to organize and visualize agreed upon memory
> protection work items. Ideally, this will help track that the areas are
> covered we expect, simplify planning to intercept the changes in
> platforms, show how work items are connected, and enable new
> contributors to quickly see how they can contribute.
> 
> [1] -
> https://docs.github.com/en/issues/planning-and-tracking-with-projects/learning-
> about-projects/about-projects
> [2] - https://github.com/orgs/tianocore/projects/3
> 
> Thanks,
> Michael
> 
> On 5/17/2023 3:14 AM, Ni, Ray wrote:
> > I created one event in https://edk2.groups.io/g/devel/calendar.
> >
> > Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-
> join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZ
> h%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-
> 4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-
> 3d06c576cc19%22%7d
> >
> > The ICS file is also attached.
> >
> >
> >> -----Original Message-----
> >> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> >> Sent: Wednesday, May 17, 2023 1:12 AM
> >> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
> >> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
> >> t@taylorbeebe.com
> >> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> >> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> >> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
> >> <sean.brogan@microsoft.com>
> >> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> Capabilities
> >> With Page Table Attributes
> >>
> >> Hi Ray,
> >>
> >> That works from our side, thanks for setting up the meeting!
> >>
> >> Oliver
> >>
> >> On 5/15/2023 7:53 PM, Ni, Ray wrote:
> >>> All,
> >>> Can you check if the meeting time is ok for you?
> >>>
> >>> It will be in this week:
> >>> * PDT Wednesday 07:00
> >>> * Paris Wednesday 16:00
> >>> * Shanghai Wednesday 22:00
> >>>
> >>> ________________________________________
> >>> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor
> Beebe
> >> <t@taylorbeebe.com>
> >>> Sent: Thursday, May 11, 2023 0:10
> >>> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel;
> Kinney,
> >> Michael D
> >>> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki;
> >> Sean Brogan
> >>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >> Capabilities With Page Table Attributes
> >>>
> >>> Can we schedule the meeting for Wednesday 5/17? I will be out the
> >>> following week and would like to attend.
> >>>
> >>> Thanks :)
> >>>
> >>> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
> >>>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
> >>>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
> >>>>> <michael.d.kinney@intel.com> wrote:
> >>>>>>
> >>>>>> I would prefer next week as well.
> >>>>>>
> >>>>>> Mike
> >>>>>>
> >>>>>
> >>>>> Next week, i can only do Wednesday. The week after (22-26), the time
> >>>>> slot works for me on any day of the week.
> >>>>>
> >>>>
> >>>> Weds works from our side, the week after also works perfectly well
> >>>> any day. Thanks for the flexibility and willingness to meet.
> >>>>
> >>>> For reference for this specific patch, this bz may help cache in
> >>>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
> >>>> mail links are largely dead, of course, but can be found on other
> >>>> mailing list retention sites (maybe in the future we will have PRs
> >>>> and discussions to reference :).
> >>>>
> >>>> Thanks,
> >>>> Oliver
> >>>>
> >>>>
> >>>>
> >>>>
> >>>>
> >>>
> >>>
> >>>
> >>> 
> >>>
> >>>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael Kubacki]

Sounds good, thanks for the quick response. Can you please send a 
calendar invite when you get a chance?

On 6/1/2023 10:42 PM, Ni, Ray wrote:
> It's a good idea to have a focus area ("project") for everyone working together on the same problem.
> I see the benefit of having "project" is to align everyone's priority so the "project" can be done within a certain deadline.
> 
> Let's talk more about following items in next meeting:
> 1. Alignment of the problem to solve
> 2. Alignment of the priority
> 
> I am available at 10pm~11pm (GMT+8) next Wednesday night.
> 
> Thanks,
> Ray
> 
>> -----Original Message-----
>> From: Michael Kubacki <mikuback@linux.microsoft.com>
>> Sent: Friday, June 2, 2023 10:24 AM
>> To: Ni, Ray <ray.ni@intel.com>; Oliver Smith-Denny <osde@linux.microsoft.com>;
>> devel@edk2.groups.io; Ard Biesheuvel <ardb@kernel.org>; Kinney, Michael D
>> <michael.d.kinney@intel.com>; t@taylorbeebe.com
>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>; Sean
>> Brogan <sean.brogan@microsoft.com>
>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities
>> With Page Table Attributes
>>
>> Hi Ray,
>>
>> We found the last meeting to be very helpful. Can you please set up an
>> agenda for an upcoming meeting to discuss what's happened since and next
>> steps?
>>
>> If you're available, perhaps we could see if Wednesday next week at the
>> same time would work?
>>
>> We'd also like to share how GitHub Projects [1] can be used to track
>> future work in the memory protection work stream. We've talked about
>> Projects for a while in the TianoCore Tools & CI working group and this
>> looks like a great opportunity to try it out. A public project has been
>> created in the TianoCore org [2]. I've placed some initial high-level
>> pillars in the project at the moment.
>>
>> Projects can help break down larger complex items and show how the
>> pieces fit together in a single place. It helps visualize who is working
>> on what, when they roughly expect to complete it, and what pillars of
>> memory protection work such as compatibility, testing, etc. are defined
>> and how we're making progress toward them. In this meeting, we'd like to
>> discuss how we can most effectively use it to collaborate in upcoming
>> work areas.
>>
>> It is not meant to replace the mailing list for communication or change
>> code review process but to organize and visualize agreed upon memory
>> protection work items. Ideally, this will help track that the areas are
>> covered we expect, simplify planning to intercept the changes in
>> platforms, show how work items are connected, and enable new
>> contributors to quickly see how they can contribute.
>>
>> [1] -
>> https://docs.github.com/en/issues/planning-and-tracking-with-projects/learning-
>> about-projects/about-projects
>> [2] - https://github.com/orgs/tianocore/projects/3
>>
>> Thanks,
>> Michael
>>
>> On 5/17/2023 3:14 AM, Ni, Ray wrote:
>>> I created one event in https://edk2.groups.io/g/devel/calendar.
>>>
>>> Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-
>> join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZ
>> h%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-
>> 4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-
>> 3d06c576cc19%22%7d
>>>
>>> The ICS file is also attached.
>>>
>>>
>>>> -----Original Message-----
>>>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
>>>> Sent: Wednesday, May 17, 2023 1:12 AM
>>>> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
>>>> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
>>>> t@taylorbeebe.com
>>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
>>>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
>>>> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
>>>> <sean.brogan@microsoft.com>
>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>> Capabilities
>>>> With Page Table Attributes
>>>>
>>>> Hi Ray,
>>>>
>>>> That works from our side, thanks for setting up the meeting!
>>>>
>>>> Oliver
>>>>
>>>> On 5/15/2023 7:53 PM, Ni, Ray wrote:
>>>>> All,
>>>>> Can you check if the meeting time is ok for you?
>>>>>
>>>>> It will be in this week:
>>>>> * PDT Wednesday 07:00
>>>>> * Paris Wednesday 16:00
>>>>> * Shanghai Wednesday 22:00
>>>>>
>>>>> ________________________________________
>>>>> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor
>> Beebe
>>>> <t@taylorbeebe.com>
>>>>> Sent: Thursday, May 11, 2023 0:10
>>>>> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel;
>> Kinney,
>>>> Michael D
>>>>> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael Kubacki;
>>>> Sean Brogan
>>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>>>> Capabilities With Page Table Attributes
>>>>>
>>>>> Can we schedule the meeting for Wednesday 5/17? I will be out the
>>>>> following week and would like to attend.
>>>>>
>>>>> Thanks :)
>>>>>
>>>>> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
>>>>>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>>>>>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>>>>>>> <michael.d.kinney@intel.com> wrote:
>>>>>>>>
>>>>>>>> I would prefer next week as well.
>>>>>>>>
>>>>>>>> Mike
>>>>>>>>
>>>>>>>
>>>>>>> Next week, i can only do Wednesday. The week after (22-26), the time
>>>>>>> slot works for me on any day of the week.
>>>>>>>
>>>>>>
>>>>>> Weds works from our side, the week after also works perfectly well
>>>>>> any day. Thanks for the flexibility and willingness to meet.
>>>>>>
>>>>>> For reference for this specific patch, this bz may help cache in
>>>>>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
>>>>>> mail links are largely dead, of course, but can be found on other
>>>>>> mailing list retention sites (maybe in the future we will have PRs
>>>>>> and discussions to reference :).
>>>>>>
>>>>>> Thanks,
>>>>>> Oliver
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>
>>>>>
>>>>>
>>>>> 
>>>>>
>>>>>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ard Biesheuvel]

On Fri, 2 Jun 2023 at 05:10, Michael Kubacki
<mikuback@linux.microsoft.com> wrote:
>
> Sounds good, thanks for the quick response. Can you please send a
> calendar invite when you get a chance?
>
> On 6/1/2023 10:42 PM, Ni, Ray wrote:
> > It's a good idea to have a focus area ("project") for everyone working together on the same problem.
> > I see the benefit of having "project" is to align everyone's priority so the "project" can be done within a certain deadline.
> >
> > Let's talk more about following items in next meeting:
> > 1. Alignment of the problem to solve
> > 2. Alignment of the priority
> >
> > I am available at 10pm~11pm (GMT+8) next Wednesday night.
> >

This works for me as well.

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Michael Kubacki]

Hi Ray,

I still haven't seen a calendar invitation. Could you please send one 
for us to reserve the slot on our calendars?

Thanks,
Michael

On 6/1/2023 11:09 PM, Michael Kubacki wrote:
> Sounds good, thanks for the quick response. Can you please send a 
> calendar invite when you get a chance?
> 
> On 6/1/2023 10:42 PM, Ni, Ray wrote:
>> It's a good idea to have a focus area ("project") for everyone working 
>> together on the same problem.
>> I see the benefit of having "project" is to align everyone's priority 
>> so the "project" can be done within a certain deadline.
>>
>> Let's talk more about following items in next meeting:
>> 1. Alignment of the problem to solve
>> 2. Alignment of the priority
>>
>> I am available at 10pm~11pm (GMT+8) next Wednesday night.
>>
>> Thanks,
>> Ray
>>
>>> -----Original Message-----
>>> From: Michael Kubacki <mikuback@linux.microsoft.com>
>>> Sent: Friday, June 2, 2023 10:24 AM
>>> To: Ni, Ray <ray.ni@intel.com>; Oliver Smith-Denny 
>>> <osde@linux.microsoft.com>;
>>> devel@edk2.groups.io; Ard Biesheuvel <ardb@kernel.org>; Kinney, 
>>> Michael D
>>> <michael.d.kinney@intel.com>; t@taylorbeebe.com
>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
>>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>; Sean
>>> Brogan <sean.brogan@microsoft.com>
>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD 
>>> Capabilities
>>> With Page Table Attributes
>>>
>>> Hi Ray,
>>>
>>> We found the last meeting to be very helpful. Can you please set up an
>>> agenda for an upcoming meeting to discuss what's happened since and next
>>> steps?
>>>
>>> If you're available, perhaps we could see if Wednesday next week at the
>>> same time would work?
>>>
>>> We'd also like to share how GitHub Projects [1] can be used to track
>>> future work in the memory protection work stream. We've talked about
>>> Projects for a while in the TianoCore Tools & CI working group and this
>>> looks like a great opportunity to try it out. A public project has been
>>> created in the TianoCore org [2]. I've placed some initial high-level
>>> pillars in the project at the moment.
>>>
>>> Projects can help break down larger complex items and show how the
>>> pieces fit together in a single place. It helps visualize who is working
>>> on what, when they roughly expect to complete it, and what pillars of
>>> memory protection work such as compatibility, testing, etc. are defined
>>> and how we're making progress toward them. In this meeting, we'd like to
>>> discuss how we can most effectively use it to collaborate in upcoming
>>> work areas.
>>>
>>> It is not meant to replace the mailing list for communication or change
>>> code review process but to organize and visualize agreed upon memory
>>> protection work items. Ideally, this will help track that the areas are
>>> covered we expect, simplify planning to intercept the changes in
>>> platforms, show how work items are connected, and enable new
>>> contributors to quickly see how they can contribute.
>>>
>>> [1] -
>>> https://docs.github.com/en/issues/planning-and-tracking-with-projects/learning-
>>> about-projects/about-projects
>>> [2] - https://github.com/orgs/tianocore/projects/3
>>>
>>> Thanks,
>>> Michael
>>>
>>> On 5/17/2023 3:14 AM, Ni, Ray wrote:
>>>> I created one event in https://edk2.groups.io/g/devel/calendar.
>>>>
>>>> Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-
>>> join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZ
>>> h%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-
>>> 4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-
>>> 3d06c576cc19%22%7d
>>>>
>>>> The ICS file is also attached.
>>>>
>>>>
>>>>> -----Original Message-----
>>>>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
>>>>> Sent: Wednesday, May 17, 2023 1:12 AM
>>>>> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
>>>>> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
>>>>> t@taylorbeebe.com
>>>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
>>>>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
>>>>> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
>>>>> <sean.brogan@microsoft.com>
>>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>>> Capabilities
>>>>> With Page Table Attributes
>>>>>
>>>>> Hi Ray,
>>>>>
>>>>> That works from our side, thanks for setting up the meeting!
>>>>>
>>>>> Oliver
>>>>>
>>>>> On 5/15/2023 7:53 PM, Ni, Ray wrote:
>>>>>> All,
>>>>>> Can you check if the meeting time is ok for you?
>>>>>>
>>>>>> It will be in this week:
>>>>>> * PDT Wednesday 07:00
>>>>>> * Paris Wednesday 16:00
>>>>>> * Shanghai Wednesday 22:00
>>>>>>
>>>>>> ________________________________________
>>>>>> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor
>>> Beebe
>>>>> <t@taylorbeebe.com>
>>>>>> Sent: Thursday, May 11, 2023 0:10
>>>>>> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel;
>>> Kinney,
>>>>> Michael D
>>>>>> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael 
>>>>>> Kubacki;
>>>>> Sean Brogan
>>>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
>>>>> Capabilities With Page Table Attributes
>>>>>>
>>>>>> Can we schedule the meeting for Wednesday 5/17? I will be out the
>>>>>> following week and would like to attend.
>>>>>>
>>>>>> Thanks :)
>>>>>>
>>>>>> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
>>>>>>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
>>>>>>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
>>>>>>>> <michael.d.kinney@intel.com> wrote:
>>>>>>>>>
>>>>>>>>> I would prefer next week as well.
>>>>>>>>>
>>>>>>>>> Mike
>>>>>>>>>
>>>>>>>>
>>>>>>>> Next week, i can only do Wednesday. The week after (22-26), the 
>>>>>>>> time
>>>>>>>> slot works for me on any day of the week.
>>>>>>>>
>>>>>>>
>>>>>>> Weds works from our side, the week after also works perfectly well
>>>>>>> any day. Thanks for the flexibility and willingness to meet.
>>>>>>>
>>>>>>> For reference for this specific patch, this bz may help cache in
>>>>>>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
>>>>>>> mail links are largely dead, of course, but can be found on other
>>>>>>> mailing list retention sites (maybe in the future we will have PRs
>>>>>>> and discussions to reference :).
>>>>>>>
>>>>>>> Thanks,
>>>>>>> Oliver
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>>
>>>>>>
>>>>>>
>>>>>>
>>>>>> 
>>>>>>
>>>>>>

Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities With Page Table Attributes

[Ni, Ray]

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I just set it up.
It's in https://edk2.groups.io/g/devel/calendar, also in attachment.

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Michael
> Kubacki
> Sent: Tuesday, June 6, 2023 10:14 AM
> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>; Sean
> Brogan <sean.brogan@microsoft.com>; Oliver Smith-Denny
> <osde@linux.microsoft.com>; Ard Biesheuvel <ardb@kernel.org>; Kinney,
> Michael D <michael.d.kinney@intel.com>; t@taylorbeebe.com
> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD Capabilities
> With Page Table Attributes
> 
> Hi Ray,
> 
> I still haven't seen a calendar invitation. Could you please send one
> for us to reserve the slot on our calendars?
> 
> Thanks,
> Michael
> 
> On 6/1/2023 11:09 PM, Michael Kubacki wrote:
> > Sounds good, thanks for the quick response. Can you please send a
> > calendar invite when you get a chance?
> >
> > On 6/1/2023 10:42 PM, Ni, Ray wrote:
> >> It's a good idea to have a focus area ("project") for everyone working
> >> together on the same problem.
> >> I see the benefit of having "project" is to align everyone's priority
> >> so the "project" can be done within a certain deadline.
> >>
> >> Let's talk more about following items in next meeting:
> >> 1. Alignment of the problem to solve
> >> 2. Alignment of the priority
> >>
> >> I am available at 10pm~11pm (GMT+8) next Wednesday night.
> >>
> >> Thanks,
> >> Ray
> >>
> >>> -----Original Message-----
> >>> From: Michael Kubacki <mikuback@linux.microsoft.com>
> >>> Sent: Friday, June 2, 2023 10:24 AM
> >>> To: Ni, Ray <ray.ni@intel.com>; Oliver Smith-Denny
> >>> <osde@linux.microsoft.com>;
> >>> devel@edk2.groups.io; Ard Biesheuvel <ardb@kernel.org>; Kinney,
> >>> Michael D
> >>> <michael.d.kinney@intel.com>; t@taylorbeebe.com
> >>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> >>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> Sean
> >>> Brogan <sean.brogan@microsoft.com>
> >>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >>> Capabilities
> >>> With Page Table Attributes
> >>>
> >>> Hi Ray,
> >>>
> >>> We found the last meeting to be very helpful. Can you please set up an
> >>> agenda for an upcoming meeting to discuss what's happened since and next
> >>> steps?
> >>>
> >>> If you're available, perhaps we could see if Wednesday next week at the
> >>> same time would work?
> >>>
> >>> We'd also like to share how GitHub Projects [1] can be used to track
> >>> future work in the memory protection work stream. We've talked about
> >>> Projects for a while in the TianoCore Tools & CI working group and this
> >>> looks like a great opportunity to try it out. A public project has been
> >>> created in the TianoCore org [2]. I've placed some initial high-level
> >>> pillars in the project at the moment.
> >>>
> >>> Projects can help break down larger complex items and show how the
> >>> pieces fit together in a single place. It helps visualize who is working
> >>> on what, when they roughly expect to complete it, and what pillars of
> >>> memory protection work such as compatibility, testing, etc. are defined
> >>> and how we're making progress toward them. In this meeting, we'd like to
> >>> discuss how we can most effectively use it to collaborate in upcoming
> >>> work areas.
> >>>
> >>> It is not meant to replace the mailing list for communication or change
> >>> code review process but to organize and visualize agreed upon memory
> >>> protection work items. Ideally, this will help track that the areas are
> >>> covered we expect, simplify planning to intercept the changes in
> >>> platforms, show how work items are connected, and enable new
> >>> contributors to quickly see how they can contribute.
> >>>
> >>> [1] -
> >>> https://docs.github.com/en/issues/planning-and-tracking-with-
> projects/learning-
> >>> about-projects/about-projects
> >>> [2] - https://github.com/orgs/tianocore/projects/3
> >>>
> >>> Thanks,
> >>> Michael
> >>>
> >>> On 5/17/2023 3:14 AM, Ni, Ray wrote:
> >>>> I created one event in https://edk2.groups.io/g/devel/calendar.
> >>>>
> >>>> Microsoft Teams meeting link: https://teams.microsoft.com/l/meetup-
> >>>
> join/19%3ameeting_YTk4ZDU3YjItODkxZC00MTdmLTlkZmUtYThkNGQ0ZWYyMDZ
> >>> h%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-
> 8496-
> >>> 4ed7712e255d%22%2c%22Oid%22%3a%2255d36a50-78be-4ced-bc27-
> >>> 3d06c576cc19%22%7d
> >>>>
> >>>> The ICS file is also attached.
> >>>>
> >>>>
> >>>>> -----Original Message-----
> >>>>> From: Oliver Smith-Denny <osde@linux.microsoft.com>
> >>>>> Sent: Wednesday, May 17, 2023 1:12 AM
> >>>>> To: Ni, Ray <ray.ni@intel.com>; devel@edk2.groups.io; Ard Biesheuvel
> >>>>> <ardb@kernel.org>; Kinney, Michael D <michael.d.kinney@intel.com>;
> >>>>> t@taylorbeebe.com
> >>>>> Cc: Leif Lindholm <quic_llindhol@quicinc.com>; Ard Biesheuvel
> >>>>> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>;
> >>>>> Michael Kubacki <mikuback@linux.microsoft.com>; Sean Brogan
> >>>>> <sean.brogan@microsoft.com>
> >>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >>> Capabilities
> >>>>> With Page Table Attributes
> >>>>>
> >>>>> Hi Ray,
> >>>>>
> >>>>> That works from our side, thanks for setting up the meeting!
> >>>>>
> >>>>> Oliver
> >>>>>
> >>>>> On 5/15/2023 7:53 PM, Ni, Ray wrote:
> >>>>>> All,
> >>>>>> Can you check if the meeting time is ok for you?
> >>>>>>
> >>>>>> It will be in this week:
> >>>>>> * PDT Wednesday 07:00
> >>>>>> * Paris Wednesday 16:00
> >>>>>> * Shanghai Wednesday 22:00
> >>>>>>
> >>>>>> ________________________________________
> >>>>>> From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Taylor
> >>> Beebe
> >>>>> <t@taylorbeebe.com>
> >>>>>> Sent: Thursday, May 11, 2023 0:10
> >>>>>> To: devel@edk2.groups.io; osde@linux.microsoft.com; Ard Biesheuvel;
> >>> Kinney,
> >>>>> Michael D
> >>>>>> Cc: Ni, Ray; Leif Lindholm; Ard Biesheuvel; Sami Mujawar; Michael
> >>>>>> Kubacki;
> >>>>> Sean Brogan
> >>>>>> Subject: Re: [edk2-devel] [PATCH v1 1/1] ArmPkg: CpuDxe: Sync GCD
> >>>>> Capabilities With Page Table Attributes
> >>>>>>
> >>>>>> Can we schedule the meeting for Wednesday 5/17? I will be out the
> >>>>>> following week and would like to attend.
> >>>>>>
> >>>>>> Thanks :)
> >>>>>>
> >>>>>> On 5/9/2023 7:59 AM, Oliver Smith-Denny wrote:
> >>>>>>> On 5/8/2023 11:59 PM, Ard Biesheuvel wrote:
> >>>>>>>> On Tue, 9 May 2023 at 04:04, Kinney, Michael D
> >>>>>>>> <michael.d.kinney@intel.com> wrote:
> >>>>>>>>>
> >>>>>>>>> I would prefer next week as well.
> >>>>>>>>>
> >>>>>>>>> Mike
> >>>>>>>>>
> >>>>>>>>
> >>>>>>>> Next week, i can only do Wednesday. The week after (22-26), the
> >>>>>>>> time
> >>>>>>>> slot works for me on any day of the week.
> >>>>>>>>
> >>>>>>>
> >>>>>>> Weds works from our side, the week after also works perfectly well
> >>>>>>> any day. Thanks for the flexibility and willingness to meet.
> >>>>>>>
> >>>>>>> For reference for this specific patch, this bz may help cache in
> >>>>>>> some info: https://bugzilla.tianocore.org/show_bug.cgi?id=753. The
> >>>>>>> mail links are largely dead, of course, but can be found on other
> >>>>>>> mailing list retention sites (maybe in the future we will have PRs
> >>>>>>> and discussions to reference :).
> >>>>>>>
> >>>>>>> Thanks,
> >>>>>>> Oliver
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>>>
> >>>>>>
> >>>>>>
> >>>>>>
> >>>>>>
> >>>>>>
> >>>>>>
> 
> 
> 
> 


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[-- Type: text/calendar; name="invite (1).ics", Size: 1045 bytes --]

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