From mboxrd@z Thu Jan 1 00:00:00 1970 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ashraf.javeed@intel.com) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by groups.io with SMTP; Thu, 25 Jul 2019 08:42:02 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2019 08:42:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,307,1559545200"; d="scan'208";a="172682930" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga003.jf.intel.com with ESMTP; 25 Jul 2019 08:42:01 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 25 Jul 2019 08:42:01 -0700 Received: from bgsmsx105.gar.corp.intel.com (10.223.43.197) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 25 Jul 2019 08:42:00 -0700 Received: from bgsmsx101.gar.corp.intel.com ([169.254.1.176]) by BGSMSX105.gar.corp.intel.com ([169.254.3.139]) with mapi id 14.03.0439.000; Thu, 25 Jul 2019 21:11:58 +0530 From: "Javeed, Ashraf" To: "Gao, Liming" , "devel@edk2.groups.io" CC: "Kinney, Michael D" , "Ni, Ray" Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2] MdePkg/Protocols: New interface, EFI encodings to PCI Plat protocol Thread-Topic: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2] MdePkg/Protocols: New interface, EFI encodings to PCI Plat protocol Thread-Index: AQHVQvec0R/vMGBH8kCEg1rtPQkpTqbbdTwggAAC6zA= Date: Thu, 25 Jul 2019 15:41:57 +0000 Message-ID: <95C5C2B113DE604FB208120C742E9824578BEA95@BGSMSX101.gar.corp.intel.com> References: <20190725144518.8536-1-ashraf.javeed@intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14E4BF18D@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E4BF18D@SHSMSX104.ccr.corp.intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMDYyNmZjMzQtODc3MS00NTc5LWEzZGYtOGNlZGYxYWFmYzY0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiMmRKOUx3UmhuejNIUmc3bXptV0g1aklrUXczejQ3NWVqUFB3MWgxSXJKVVNjd3NxMjZHMmNWQndIaDdoT2FtYiJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Return-Path: ashraf.javeed@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Liming, I meant to create only second patch, I just appended the commit message wi= th the actual changes details from the previous patch. > New interface added to PCI Platform Protocol / PCI Override Protocol=20 > to retrieve device-specific platform policy for the following PCI=20 > standard features, like Maximum Payload Size (MPS), Maximum Read=20 > Request Size (MRRS),Extended Tags, Relax Order, No-Snoop, Active State= =20 > Power Management (ASPM),Latency Time Reporting (LTR), AtomicOp,=20 > Reference Clock Configuration, Extended SYNCH, PTM support, and Completi= on Timeout (CTO). > New source files added with enhanced definitions are in: > MdePkg/Include/Protocol/PciPlatform2.h, > MdePkg/Include/Protocol/PciOverride2.h Thanks Ashraf > -----Original Message----- > From: Gao, Liming > Sent: Thursday, July 25, 2019 9:01 PM > To: devel@edk2.groups.io; Javeed, Ashraf > Cc: Kinney, Michael D ; Ni, Ray > > Subject: RE: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2] > MdePkg/Protocols: New interface, EFI encodings to PCI Plat protocol >=20 > Ashraf: > V2 is the updated full patch, not patch 2. I think you mean to create = single > patch to include all changes instead of create two patches. Right? >=20 > Thanks > Liming > > -----Original Message----- > > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > > Javeed, Ashraf > > Sent: Thursday, July 25, 2019 10:45 PM > > To: devel@edk2.groups.io > > Cc: Kinney, Michael D ; Gao, Liming > > ; Ni, Ray > > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2] > > MdePkg/Protocols: New interface, EFI encodings to PCI Plat protocol > > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1954 > > > > In V2: Correction made to header sections of source files > > > > New interface added to PCI Platform Protocol / PCI Override Protocol > > to retrieve device-specific platform policy for the following PCI > > standard features, like Maximum Payload Size (MPS), Maximum Read > > Request Size (MRRS),Extended Tags, Relax Order, No-Snoop, Active State > > Power Management (ASPM),Latency Time Reporting (LTR), AtomicOp, > > Reference Clock Configuration, Extended SYNCH, PTM support, and > Completion Timeout (CTO). > > New source files added with enhanced definitions are in: > > MdePkg/Include/Protocol/PciPlatform2.h, > > MdePkg/Include/Protocol/PciOverride2.h > > > > Signed-off-by: Ashraf Javeed > > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Ray Ni > > --- > > MdePkg/Include/Protocol/PciOverride2.h | 3 --- > > MdePkg/Include/Protocol/PciPlatform2.h | 5 +---- > > 2 files changed, 1 insertion(+), 7 deletions(-) > > > > diff --git a/MdePkg/Include/Protocol/PciOverride2.h > > b/MdePkg/Include/Protocol/PciOverride2.h > > index cf452d9f8f..a7f541b4c3 100644 > > --- a/MdePkg/Include/Protocol/PciOverride2.h > > +++ b/MdePkg/Include/Protocol/PciOverride2.h > > @@ -13,9 +13,6 @@ > > THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > > > - @par Revision Reference: > > - This Protocol is defined in UEFI Platform Initialization > > Specification 1.2 > > - Volume 5: Standards > > > > **/ > > > > diff --git a/MdePkg/Include/Protocol/PciPlatform2.h > > b/MdePkg/Include/Protocol/PciPlatform2.h > > index 3ff41b7754..717938e68d 100644 > > --- a/MdePkg/Include/Protocol/PciPlatform2.h > > +++ b/MdePkg/Include/Protocol/PciPlatform2.h > > @@ -4,7 +4,7 @@ > > driver to describe the unique features of a platform. > > This protocol is optional. > > > > -Copyright (c) 2007 - 2019, Intel Corporation. All rights > > reserved.
> > +Copyright (c) 2019, Intel Corporation. All rights reserved.
> > This program and the accompanying materials are licensed and made > > available under the terms and conditions of the BSD License that acco= mpanies > this distribution. > > The full text of the license may be found at @@ -13,9 +13,6 @@ > > http://opensource.org/licenses/bsd-license.php. > > THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > > WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER > EXPRESS OR IMPLIED. > > > > - @par Revision Reference: > > - This Protocol is defined in UEFI Platform Initialization > > Specification 1.2 > > - Volume 5: Standards > > > > **/ > > > > -- > > 2.21.0.windows.1 > > > > > >=20