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From: "Javeed, Ashraf" <ashraf.javeed@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"Javeed, Ashraf" <ashraf.javeed@intel.com>
Cc: "Wang, Jian J" <jian.j.wang@intel.com>,
	"Wu, Hao A" <hao.a.wu@intel.com>, "Ni, Ray" <ray.ni@intel.com>
Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2 00/12] New PCI features - MPS, MRRS, RO, NS, CTO
Date: Fri, 8 Nov 2019 04:10:22 +0000	[thread overview]
Message-ID: <95C5C2B113DE604FB208120C742E982457909893@BGSMSX101.gar.corp.intel.com> (raw)
In-Reply-To: <15D34310CBE1F8C3.20918@groups.io>

Hi Jian, Hao, and Ray;
Kindly review my patch set from 1 to 12 to enhance the PCI Bus driver to support the new PCI features..

Thanks
Ashraf

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Javeed,
> Ashraf
> Sent: Saturday, November 2, 2019 11:30 AM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J <jian.j.wang@intel.com>; Wu, Hao A <hao.a.wu@intel.com>;
> Ni, Ray <ray.ni@intel.com>
> Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2 00/12]
> New PCI features - MPS, MRRS, RO, NS, CTO
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2194
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2313
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1954
> 
> The EDK2 Kernel PciBusDxe driver is enhanced to enable the configuration of PCI
> features like
> (1) Max_Payload_Size
> (2) Max_Read_Req_Size
> (3) Relax Ordering
> (4) No-Snoop
> (5) Completion Timeout
> 
> Max_Payload_Size:- The PCI Device Control register provides this feature
> register field which controls the maximum data packet (TLP) size that a PCI
> device should maintain as a requester. The PCI Bus driver is required to maintain
> a highest common value supported by all the PCI devices in a PCIe hierarchy,
> especially in case of isochronous applications.
> 
> Max_Read_Req_Size:- The PCI Device Control register provides this feature
> register field which controls the maximum memory read request size that a PCI
> device should maintain as a requester. The PCI Bus driver is required to maintain
> a common value, same as Max_Payload_Size, in case of isochronous
> applications only; or else, it should maintain the user requested value uniformly
> in a PCIe hierarchy (PCI root port and its downstream devices).
> 
> Relax Ordering:- The PCI Device Control register has the enabling of Relax
> Ordering functionality register field (bit 4). If this bit is Set, the PCI Function is
> permitted to set the Relaxed Ordering bit in the Attributes field of transactions it
> initiates that do not require strong write ordering (see PCI Base Specification 4,
> Section 2.2.6.4 and Sect- ion 2.4). Any supporting PCI function is expected have
> this bit enabled as per its hardware default; the code enhancement is to enable /
> disable as per the PCI device policy provided by the platform firmware. If no
> device policy override is provided than it shall be ignored by the PCI Bus driver
> for that PCI function.
> 
> No-Snoop:- The PCI Device Control register has the enabling of No-Snoop
> functionality register field (bit 11). If this bit is Set, the PCI Function is permitted
> to Set the No Snoop bit in the Requester Attributes of transactions it initiates
> that do not require hardware enforced cache coherency (see PCI Base
> Specification 4, Section 2.2.6.5). Any supporting PCI function is expected have
> this bit enabled as per its hardware default; the code enhancement is to enable /
> disable as per the PCI device policy provided by the platform firmware. If no
> device policy override is provided than it shall be ignored by the PCI Bus driver
> for that PCI function.
> 
> Completion Timeout:- The PCI Device Control 2 register provides two register
> fields based on its Device Capability 2 register; the CTO Ranges (bits [3:0]) and
> the disabling of CTO detection mechanism (bit 4). The software is permitted to
> change the CTO ranges and enable/disable the CTO detection mechanism any
> time. The code enhancement here is to override these register fields as per the
> platform device policy. If no device policy override is provided than it shall be
> ignored by the PCI Bus driver for that PCI function.
> 
> The PCI Base Specification 4 Revision 1 contains detailed information about
> these features. The EDK2 PCI Bus driver needs to enable the configuration of
> these features as per the PCI Base specification.
> 
> The EDK2 PCI Bus driver also needs to take the PCI device-specific platform
> policy into the consideration while programming these features; thus the code
> changes to support these, is explicitly dependent on the new PCI Platform
> Protocol interface definition defined in the below
> record:-
> https://bugzilla.tianocore.org/show_bug.cgi?id=1954
> 
> 
> Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> ---
> 
> V2: Fixed message format and added feature change reference links
> ---
> 
> Ashraf Javeed (12):
>   MdeModulePkg/PciBusDxe:New PCI features separation with PCD
>   PciBusDxe: Reorganize the PCI Platform Protocol usage code
>   PciBusDxe: Separation of the PCI device registration and start
>   PciBusDxe: Inclusion of new PCI Platform Protocol 2
>   PciBusDxe: Setup sub-phases for PCI feature enumeration
>   PciBusDxe: Integration of setup for PCI feature enumeration
>   PciBusDxe: Record the PCI-Express Capability Structure
>   PciBusDxe: New PCI feature Max_Payload_Size
>   PciBusDxe: New PCI feature Max_Read_Req_Size
>   PciBusDxe: New PCI feature Relax Ordering
>   PciBusDxe: New PCI feature No-Snoop
>   PciBusDxe: New PCI feature Completion Timeout
> 
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c               |   23 +----------
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h               |   20 ++++++++--
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf          |    9 ++++-
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c     |  233
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++--------------------------------------
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c        |  139
> ++++++++++++++++-------------------------------------------------
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |   34
> ++++++++++------
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c    | 2030
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h    |  223
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++++++++++++++++++++++++++++++++++++
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c   |  749
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h   |  191
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> ++++++++++++++++++++++++
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c   |   15 +------
>  MdeModulePkg/MdeModulePkg.dec                         |   22 +++++++++++
>  12 files changed, 3450 insertions(+), 238 deletions(-)  create mode 100644
> MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
>  create mode 100644 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h
>  create mode 100644 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
>  create mode 100644 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h
> 
> --
> 2.21.0.windows.1
> 
> 
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       reply	other threads:[~2019-11-08  4:10 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <15D34310CBE1F8C3.20918@groups.io>
2019-11-08  4:10 ` Javeed, Ashraf [this message]
2019-11-08  6:11   ` [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2 00/12] New PCI features - MPS, MRRS, RO, NS, CTO Ni, Ray
2019-11-08 10:17     ` Javeed, Ashraf

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