From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web10.2330.1573615335515669033 for ; Tue, 12 Nov 2019 19:22:15 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: ashraf.javeed@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Nov 2019 19:22:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,299,1569308400"; d="scan'208";a="207677652" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga006.jf.intel.com with ESMTP; 12 Nov 2019 19:22:14 -0800 Received: from fmsmsx163.amr.corp.intel.com (10.18.125.72) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:22:14 -0800 Received: from bgsmsx154.gar.corp.intel.com (10.224.48.47) by fmsmsx163.amr.corp.intel.com (10.18.125.72) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:22:13 -0800 Received: from bgsmsx101.gar.corp.intel.com ([169.254.1.49]) by BGSMSX154.gar.corp.intel.com ([169.254.7.122]) with mapi id 14.03.0439.000; Wed, 13 Nov 2019 08:52:10 +0530 From: "Javeed, Ashraf" To: "devel@edk2.groups.io" , "Javeed, Ashraf" CC: "Wang, Jian J" , "Wu, Hao A" , "Ni, Ray" Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Thread-Topic: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD Thread-Index: AQHVkMaK4BiZ61RLok2N8sueD/FTEaeIgICg Date: Wed, 13 Nov 2019 03:22:10 +0000 Message-ID: <95C5C2B113DE604FB208120C742E982457917168@BGSMSX101.gar.corp.intel.com> References: <20191101150952.3340-1-ashraf.javeed@intel.com> <15D3127A726D26A6.7420@groups.io> In-Reply-To: <15D3127A726D26A6.7420@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiY2EwNmVlOGUtZmRkMy00YzM5LWI4MGItOGQ0MjI0MGY0YWQ0IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiN2plOVpsdlQ1d1VEeVhDVGluU1hqdVZZWXhPdzRhRGVyYlI5dlpCdnBGMVh4aGd3VXFtSG9PWkV6YTNwZ0ZcL1AifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Return-Path: ashraf.javeed@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable This patch is also uploaded in the following Repo:- https://github.com/ashrafj/edk2-staging/commit/0cc1a9555e1546ad94dd368160e= ce526d10d96a6 Please review. Thanks Ashraf > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Javeed, > Ashraf > Sent: Friday, November 1, 2019 8:40 PM > To: devel@edk2.groups.io > Cc: Wang, Jian J ; Wu, Hao A = ; > Ni, Ray > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] > MdeModulePkg/PciBusDxe:New PCI features separation with PCD >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2194 >=20 > Definition of bit masks for the new PCD for the following new PCI featur= e > set:- > 1. Maximum Payload Size (MPS) > 2. Maximum Read Request Size (MRRS) > 3. Completion Timeout (CTO) > 4. Relax Order (RO) Enable > 5. No Snoop (NS) Enable > 6. Extended Tag > 7. ASPM support > 8. Common Clock Configuration > 9. Extended SYNC > 10. Atomic Op > 11. LTR Enable > 12. PTM support >=20 > Code changes made to the PCI Bus driver to adopt to these new PCD defini= - tion, > helper routines defined for features that needs to be supported in. > future. >=20 > Signed-off-by: Ashraf Javeed > Cc: Jian J Wang > Cc: Hao A Wu > Cc: Ray Ni > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 5 ++++- > MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c | 177 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++ > MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h | 26 > ++++++++++++++++++++++++++ > MdeModulePkg/MdeModulePkg.dec | 22 > ++++++++++++++++++++++ > 4 files changed, 229 insertions(+), 1 deletion(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > index 05c2202..6dab970 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf > @@ -2,7 +2,7 @@ > # The PCI bus driver will probe all PCI devices and allocate MMIO and = IO space > for these devices. > # Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable = hot > plug supporting. > # > -# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > +# Copyright (c) 2006 - 2019, Intel Corporation. All rights > +reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -57,6 +57,8 @@ > PciCommand.h > PciIo.h > PciBus.h > + PciFeatureSupport.c > + PciFeatureSupport.h >=20 > [Packages] > MdePkg/MdePkg.dec > @@ -104,6 +106,7 @@ > gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport ## CONS= UMES > gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport ## CONS= UMES > gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## > SOMETIMES_CONSUMES > + gEfiMdeModulePkgTokenSpaceGuid.PcdOtherPciFeatures ## > CONSUMES >=20 > [UserExtensions.TianoCore."ExtraFiles"] > PciBusDxeExtra.uni > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > new file mode 100644 > index 0000000..8be227a > --- /dev/null > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > @@ -0,0 +1,177 @@ > +/** @file > + PCI standard feature support functions implementation for PCI Bus mod= ule.. > + > +Copyright (c) 2019, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#include "PciBus.h" > +#include "PciFeatureSupport.h" > + > +/** > + Main routine to indicate whether the platform has selected the > +Max_Payload_Size > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Max_Payload_Size to be conf= igured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupMaxPayloadSize ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_MPS) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the > +Max_Read_Req_Size > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Max_Read_Req_Size to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupMaxReadReqSize ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_MRRS) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the Relax > +Ordering > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Relax Ordering to be config= ured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupRelaxOrder ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_RO) > +? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the > +No-Snoop > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the No-Snoop to be configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupNoSnoop ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_NS) > +? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the > +Completion Timeout > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupCompletionTimeout ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_CTO) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the > +Extended Tag > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupExtendedTag ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_ETAG) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the Atomic > +Op > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupAtomicOp ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_AOP) ? TRUE : FALSE; } > +/** > + Main routine to indicate whether the platform has selected the LTR > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupLtr ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_LTR) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the ASPM > +state > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupAspm ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_ASPM) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the Common > +Clock Configuration > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupCommonClkCfg ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_CCC) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the > +Extended Synch > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupExtendedSynch ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_ESYN) ? TRUE : FALSE; } > + > +/** > + Main routine to indicate whether the platform has selected the PIM > +Control > + PCI feature to be configured by this driver > + > + @retval TRUE platform has selected the Completion Timeout to be > configured > + FALSE platform has not selected this feature > +**/ > +BOOLEAN > +SetupPtm ( > + ) > +{ > + return (PcdGet32 (PcdOtherPciFeatures) & > +PCI_FEATURE_SUPPORT_FLAG_PTM) ? TRUE : FALSE; } > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > new file mode 100644 > index 0000000..d06a5e8 > --- /dev/null > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > @@ -0,0 +1,26 @@ > +/** @file > + PCI standard feature support functions implementation for PCI Bus mod= ule.. > + > +Copyright (c) 2019, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent > + > +**/ > + > +#ifndef _EFI_PCI_FEATURES_SUPPORT_H_ > +#define _EFI_PCI_FEATURES_SUPPORT_H_ > +// > +// Macro definitions for the PCI Features support PCD // #define > +PCI_FEATURE_SUPPORT_FLAG_MPS BIT0 #define > +PCI_FEATURE_SUPPORT_FLAG_MRRS BIT1 > +#define PCI_FEATURE_SUPPORT_FLAG_RO BIT2 > +#define PCI_FEATURE_SUPPORT_FLAG_NS BIT3 > +#define PCI_FEATURE_SUPPORT_FLAG_CTO BIT4 #define > +PCI_FEATURE_SUPPORT_FLAG_ETAG BIT5 #define > PCI_FEATURE_SUPPORT_FLAG_AOP > +BIT6 #define PCI_FEATURE_SUPPORT_FLAG_LTR BIT7 #define > +PCI_FEATURE_SUPPORT_FLAG_ASPM BIT12 #define > +PCI_FEATURE_SUPPORT_FLAG_CCC BIT13 #define > +PCI_FEATURE_SUPPORT_FLAG_ESYN BIT14 #define > +PCI_FEATURE_SUPPORT_FLAG_PTM BIT20 #endif > diff --git a/MdeModulePkg/MdeModulePkg.dec > b/MdeModulePkg/MdeModulePkg.dec index 12e0bbf..ed82e85 100644 > --- a/MdeModulePkg/MdeModulePkg.dec > +++ b/MdeModulePkg/MdeModulePkg.dec > @@ -1036,6 +1036,28 @@ > # @Prompt Enable UEFI Stack Guard. >=20 > gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard|FALSE|BOOLEAN|0x30 > 001055 >=20 > + ## This PCD is to indicate the PCI Bus driver to setup other new PCI = features. > + # Each PCI feature is represented by its mask bit position and it > + configures # if that bit is set. > + # > + # Bit 0 - if set, the PCI Bus driver programs the device's > Max_Payload_Size.
> + # Bit 1 - if set, the PCI Bus driver programs the device's > Max_Read_Req_Size.
> + # Bit 2 - if set, the PCI Bus driver programs the device's Relax Or= dering > state.
> + # Bit 3 - if set, the PCI Bus driver programs the device's No-Snoop= state.
> + # Bit 4 - if set, the PCI Bus driver programs the device's Completi= on Timeout > range.
> + # Bit 5 - if set, the PCI Bus driver programs the device's Extended= Tag > range.
> + # Bit 6 - if set, the PCI Bus driver programs the device's AtomicOp > feature.
> + # Bit 7 - if set, the PCI Bus driver programs the device's LTR feat= ure.
> + # Bit 8 to 11 - Reserved for future use by the PCI Bus driver.
> + # Bit 12 - if set, the PCI Bus driver programs the PCIe link ASPM s= tate.
> + # Bit 13 - if set, the PCI Bus driver programs the PCIe link Common= Clock > Configuration.
> + # Bit 14 - if set, the PCI Bus driver programs the PCIe link Extend= ed Synch > state.
> + # Bit 15 to 19 - Reserved for future use by the PCI Bus driver.
> + # Bit 20 - if set, the PCI Bus driver programs the device's PTM fea= ture.
> + # Bit 21 to 31 - Reserved for future use by the PCI Bus driver.
> + # @Prompt The UEFI PCI Bus driver enables the new set of other PCI Fe= atures. > + > + > gEfiMdeModulePkgTokenSpaceGuid.PcdOtherPciFeatures|0x001070FF|UINT32| > 0 > + x30001056 > + > [PcdsFixedAtBuild, PcdsPatchableInModule] > ## Dynamic type PCD can be registered callback function for Pcd setti= ng > action. > # PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number > of callback function > -- > 2.21.0.windows.1 >=20 >=20 >=20