From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web09.2414.1573615509025886284 for ; Tue, 12 Nov 2019 19:25:09 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: ashraf.javeed@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Nov 2019 19:25:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,299,1569308400"; d="scan'208";a="287753667" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga001.jf.intel.com with ESMTP; 12 Nov 2019 19:25:08 -0800 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:25:08 -0800 Received: from bgsmsx104.gar.corp.intel.com (10.223.4.190) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:25:07 -0800 Received: from bgsmsx101.gar.corp.intel.com ([169.254.1.49]) by BGSMSX104.gar.corp.intel.com ([169.254.5.80]) with mapi id 14.03.0439.000; Wed, 13 Nov 2019 08:55:04 +0530 From: "Javeed, Ashraf" To: "devel@edk2.groups.io" , "Javeed, Ashraf" CC: "Wang, Jian J" , "Wu, Hao A" , "Ni, Ray" Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start Thread-Topic: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start Thread-Index: AQHVkMZ7F0DOg8c0FUGhxv9UALvPWqeIghqA Date: Wed, 13 Nov 2019 03:25:04 +0000 Message-ID: <95C5C2B113DE604FB208120C742E982457917197@BGSMSX101.gar.corp.intel.com> References: <20191101150952.3340-1-ashraf.javeed@intel.com> <15D3127A98E21087.7420@groups.io> In-Reply-To: <15D3127A98E21087.7420@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiOTk1MmIwNGEtYzQ4YS00MGJkLWE0ZDgtZWI5NmQwZjMxNzdjIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiclF3VHNxTkhmT1R6OGE1TVlVNk4xOHVNYnkwNUNQcXIrd3g3Uktvb0FsNWE1UUdnZWE0U2VlN1ZBYUw2RVlFeCJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Return-Path: ashraf.javeed@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable This patch is also uploaded in following Repo, for review:- https://github.com/ashrafj/edk2-staging/commit/421511cd582975c65983d75dad0= e2a58956bfafd Thanks Ashraf > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Javeed, > Ashraf > Sent: Friday, November 1, 2019 8:40 PM > To: devel@edk2.groups.io > Cc: Wang, Jian J ; Wu, Hao A = ; > Ni, Ray > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] > PciBusDxe: Separation of the PCI device registration and start >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2194 >=20 > The separation of the PCI device registration phase includes only the in= stallation > of the PCI IO Protocol on the PCI node to acquire the EFI handles, and l= oading of > its applicable PCI Option ROM. >=20 > The separation of the PCI device start phase only includes the code that= enables > the PCI Bridge device as a Bus Master. >=20 > This code change is made in order to introduce the enabling of the other= PCI > features in the PCI Bus driver. >=20 > Signed-off-by: Ashraf Javeed > Cc: Jian J Wang > Cc: Hao A Wu > Cc: Ray Ni > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 164 > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ > ---------------------------------- > 1 file changed, 130 insertions(+), 34 deletions(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > index 149a120..33a0e94 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > @@ -561,7 +561,7 @@ DeRegisterPciDevice ( } >=20 > /** > - Start to manage the PCI device on the specified root bridge or PCI-PC= I Bridge. > + Start the PCI root Ports or PCI-PCI Bridge only. >=20 > @param Controller The root bridge handle. > @param RootBridge A pointer to the PCI_IO_DEVICE. > @@ -576,7 +576,82 @@ DeRegisterPciDevice ( >=20 > **/ > EFI_STATUS > -StartPciDevicesOnBridge ( > +StartPciRootPortsOnBridge ( > + IN EFI_HANDLE Controller, > + IN PCI_IO_DEVICE *RootBridge > + ) > + > +{ > + PCI_IO_DEVICE *PciIoDevice; > + EFI_STATUS Status; > + LIST_ENTRY *CurrentLink; > + UINT64 Supports; > + > + PciIoDevice =3D NULL; > + CurrentLink =3D RootBridge->ChildList.ForwardLink; > + > + while (CurrentLink !=3D NULL && CurrentLink !=3D &RootBridge->ChildLi= st) > + { > + > + PciIoDevice =3D PCI_IO_DEVICE_FROM_LINK (CurrentLink); > + > + // > + // check if the device has been assigned with required resource > + // and registered > + // > + if (!PciIoDevice->Registered && !PciIoDevice->Allocated) { > + return EFI_NOT_READY; > + } > + > + if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { > + Status =3D StartPciRootPortsOnBridge ( > + Controller, > + PciIoDevice > + ); > + > + PciIoDevice->PciIo.Attributes ( > + &(PciIoDevice->PciIo), > + EfiPciIoAttributeOperationSupported, > + 0, > + &Supports > + ); > + Supports &=3D (UINT64)EFI_PCI_DEVICE_ENABLE; > + PciIoDevice->PciIo.Attributes ( > + &(PciIoDevice->PciIo), > + EfiPciIoAttributeOperationEnable, > + Supports, > + NULL > + ); > + > + } > + > + CurrentLink =3D CurrentLink->ForwardLink; } > + > + if (PciIoDevice =3D=3D NULL) { > + return EFI_NOT_FOUND; > + } else { > + return EFI_SUCCESS; > + } > +} > + > + > +/** > + Register to manage the PCI device on the specified root bridge or PCI= -PCI > Bridge. > + > + @param Controller The root bridge handle. > + @param RootBridge A pointer to the PCI_IO_DEVICE. > + @param RemainingDevicePath A pointer to the > EFI_DEVICE_PATH_PROTOCOL. > + @param NumberOfChildren Children number. > + @param ChildHandleBuffer A pointer to the child handle buffer. > + > + @retval EFI_NOT_READY Device is not allocated. > + @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge. > + @retval EFI_NOT_FOUND Can not find the specific device. > + @retval EFI_SUCCESS Success to start Pci devices on bridge. > + > +**/ > +EFI_STATUS > +RegisterPciDevicesOnBridge ( > IN EFI_HANDLE Controller, > IN PCI_IO_DEVICE *RootBridge, > IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, > @@ -590,7 +665,6 @@ StartPciDevicesOnBridge ( > EFI_DEVICE_PATH_PROTOCOL *CurrentDevicePath; > EFI_STATUS Status; > LIST_ENTRY *CurrentLink; > - UINT64 Supports; >=20 > PciIoDevice =3D NULL; > CurrentLink =3D RootBridge->ChildList.ForwardLink; > @@ -645,7 +719,7 @@ StartPciDevicesOnBridge ( > // If it is a PPB > // > if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { > - Status =3D StartPciDevicesOnBridge ( > + Status =3D RegisterPciDevicesOnBridge ( > Controller, > PciIoDevice, > CurrentDevicePath, > @@ -653,20 +727,6 @@ StartPciDevicesOnBridge ( > ChildHandleBuffer > ); >=20 > - PciIoDevice->PciIo.Attributes ( > - &(PciIoDevice->PciIo), > - EfiPciIoAttributeOperationSupported, > - 0, > - &Supports > - ); > - Supports &=3D (UINT64)EFI_PCI_DEVICE_ENABLE; > - PciIoDevice->PciIo.Attributes ( > - &(PciIoDevice->PciIo), > - EfiPciIoAttributeOperationEnable, > - Supports, > - NULL > - ); > - > return Status; > } else { >=20 > @@ -697,28 +757,13 @@ StartPciDevicesOnBridge ( > } >=20 > if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) { > - Status =3D StartPciDevicesOnBridge ( > + Status =3D RegisterPciDevicesOnBridge ( > Controller, > PciIoDevice, > RemainingDevicePath, > NumberOfChildren, > ChildHandleBuffer > ); > - > - PciIoDevice->PciIo.Attributes ( > - &(PciIoDevice->PciIo), > - EfiPciIoAttributeOperationSupported, > - 0, > - &Supports > - ); > - Supports &=3D (UINT64)EFI_PCI_DEVICE_ENABLE; > - PciIoDevice->PciIo.Attributes ( > - &(PciIoDevice->PciIo), > - EfiPciIoAttributeOperationEnable, > - Supports, > - NULL > - ); > - > } >=20 > CurrentLink =3D CurrentLink->ForwardLink; @@ -732,6 +777,57 @@ > StartPciDevicesOnBridge ( > } > } >=20 > +/** > + Start to manage the PCI device on the specified root bridge or PCI-PC= I Bridge. > + > + @param Controller The root bridge handle. > + @param RootBridge A pointer to the PCI_IO_DEVICE. > + @param RemainingDevicePath A pointer to the > EFI_DEVICE_PATH_PROTOCOL. > + @param NumberOfChildren Children number. > + @param ChildHandleBuffer A pointer to the child handle buffer. > + > + @retval EFI_NOT_READY Device is not allocated. > + @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge. > + @retval EFI_NOT_FOUND Can not find the specific device. > + @retval EFI_SUCCESS Success to start Pci devices on bridge. > + > +**/ > +EFI_STATUS > +StartPciDevicesOnBridge ( > + IN EFI_HANDLE Controller, > + IN PCI_IO_DEVICE *RootBridge, > + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, > + IN OUT UINT8 *NumberOfChildren, > + IN OUT EFI_HANDLE *ChildHandleBuffer > + ) > + > +{ > + EFI_STATUS Status; > + > + // > + // first register all the PCI devices // Status =3D > + RegisterPciDevicesOnBridge ( > + Controller, > + RootBridge, > + RemainingDevicePath, > + NumberOfChildren, > + ChildHandleBuffer > + ); > + > + if (EFI_ERROR (Status) =3D=3D EFI_NOT_FOUND) { > + return Status; > + } else { > + // > + // finally start those PCI bridge port devices only > + // > + return StartPciRootPortsOnBridge ( > + Controller, > + RootBridge > + ); > + } > +} > + > /** > Start to manage all the PCI devices it found previously under > the entire host bridge. > -- > 2.21.0.windows.1 >=20 >=20 >=20