From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web09.2443.1573615711828428696 for ; Tue, 12 Nov 2019 19:28:31 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.24, mailfrom: ashraf.javeed@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 12 Nov 2019 19:28:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,299,1569308400"; d="scan'208";a="287754264" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by orsmga001.jf.intel.com with ESMTP; 12 Nov 2019 19:28:31 -0800 Received: from fmsmsx163.amr.corp.intel.com (10.18.125.72) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:28:31 -0800 Received: from bgsmsx110.gar.corp.intel.com (10.223.4.212) by fmsmsx163.amr.corp.intel.com (10.18.125.72) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 12 Nov 2019 19:28:30 -0800 Received: from bgsmsx101.gar.corp.intel.com ([169.254.1.49]) by BGSMSX110.gar.corp.intel.com ([169.254.11.34]) with mapi id 14.03.0439.000; Wed, 13 Nov 2019 08:58:27 +0530 From: "Javeed, Ashraf" To: "devel@edk2.groups.io" , "Javeed, Ashraf" CC: "Wang, Jian J" , "Wu, Hao A" , "Ni, Ray" Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup for PCI feature enumeration Thread-Topic: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup for PCI feature enumeration Thread-Index: AQHVkMaA7bFsK8p14UCWfQM2gPxaGaeIgxwA Date: Wed, 13 Nov 2019 03:28:27 +0000 Message-ID: <95C5C2B113DE604FB208120C742E9824579171DB@BGSMSX101.gar.corp.intel.com> References: <20191101150952.3340-1-ashraf.javeed@intel.com> <15D3127BE430E7DA.31784@groups.io> In-Reply-To: <15D3127BE430E7DA.31784@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiZDEzOTQ0NzgtOGQ1OC00Nzc3LThiYjgtZDEyMjE2YTgxMGVhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoib2lyRWIwN2lWbE4xRWYxWHB0dHBRdzlnR3kyVkEwWnZycFlMNmk1RHlJTjFPKzRaWG8wUStKSEVIMWlzb2t3ciJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Return-Path: ashraf.javeed@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable This patch is also uploaded in the following Repo, for review:- https://github.com/ashrafj/edk2-staging/commit/9e42cc3c6e100c46a65f6e59266= 86d5f4d9fa58a thanks Ashraf > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Javeed, > Ashraf > Sent: Friday, November 1, 2019 8:40 PM > To: devel@edk2.groups.io > Cc: Wang, Jian J ; Wu, Hao A = ; > Ni, Ray > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] > PciBusDxe: Integration of setup for PCI feature enumeration >=20 > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2194 >=20 > The code changes are made to integrate the setup infrastructure for the = PCI > feature enumeration, in the last phase of the PCI Bus driver, after its = registration > and its option ROM loading phase is complete. >=20 > Signed-off-by: Ashraf Javeed > Cc: Jian J Wang > Cc: Hao A Wu > Cc: Ray Ni > --- > MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 11 +++++++++++ > MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c | 15 ++++++++++++++- > MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h | 11 +++++++++++ > 3 files changed, 36 insertions(+), 1 deletion(-) >=20 > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > index 33a0e94..b839102 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c > @@ -8,6 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent **/ >=20 > #include "PciBus.h" > +#include "PciFeatureSupport.h" >=20 > // > // This device structure is serviced as a header. > @@ -170,6 +171,8 @@ DestroyRootBridgeByHandle ( >=20 > if (Temp->Handle =3D=3D Controller) { >=20 > + DestroyRootBridgePciFeaturesConfigCompletionList (Temp); > + > RemoveEntryList (CurrentLink); >=20 > DestroyPciDeviceTree (Temp); > @@ -818,6 +821,14 @@ StartPciDevicesOnBridge ( > if (EFI_ERROR (Status) =3D=3D EFI_NOT_FOUND) { > return Status; > } else { > + if (CheckOtherPciFeaturesPcd ()) { > + // > + // the late configuration of PCI features > + // > + Status =3D EnumerateOtherPciFeatures ( > + RootBridge > + ); > + } > // > // finally start those PCI bridge port devices only > // > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > index ab0e096..9e6671d 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c > @@ -25,6 +25,19 @@ PRIMARY_ROOT_PORT_NODE > *mPrimaryRootPortList; > **/ > PCI_FEATURE_CONFIGURATION_COMPLETION_LIST > *mPciFeaturesConfigurationCompletionList =3D NULL; >=20 > +/** > + Main routine to indicate platform selection of any of the other PCI > +features > + to be configured by this driver > + > + @retval TRUE platform has selected the other PCI features to be co= nfigured > + FALSE platform has not selected any of the other PCI featur= es > +**/ > +BOOLEAN > +CheckOtherPciFeaturesPcd ( > + ) > +{ > + return PcdGet32 (PcdOtherPciFeatures) ? TRUE : FALSE; } >=20 > /** > Main routine to indicate whether the platform has selected the > Max_Payload_Size @@ -699,7 +712,7 @@ ProgramDevicePciFeatures ( > IN PCI_IO_DEVICE *PciDevice > ) > { > - EFI_STATUS Status; > + EFI_STATUS Status =3D EFI_SUCCESS; >=20 > return Status; > } > diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > index b06c140..f92d008 100644 > --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h > @@ -138,6 +138,17 @@ typedef enum { > }PCI_FEATURE_CONFIGURATION_PHASE; >=20 >=20 > +/** > + Main routine to indicate platform selection of any of the other PCI > +features > + to be configured by this driver > + > + @retval TRUE platform has selected the other PCI features to be co= nfigured > + FALSE platform has not selected any of the other PCI featur= es > +**/ > +BOOLEAN > +CheckOtherPciFeaturesPcd ( > + ); > + > /** > Enumerate all the nodes of the specified root bridge or PCI-PCI Bridg= e, to > configure the other PCI features. > -- > 2.21.0.windows.1 >=20 >=20 >=20