From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web09.10653.1580986363679469158 for ; Thu, 06 Feb 2020 02:52:43 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: ashraf.javeed@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Feb 2020 02:52:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,409,1574150400"; d="scan'208";a="224969595" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga008.jf.intel.com with ESMTP; 06 Feb 2020 02:52:42 -0800 Received: from bgsmsx105.gar.corp.intel.com (10.223.43.197) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 6 Feb 2020 02:52:42 -0800 Received: from bgsmsx101.gar.corp.intel.com ([169.254.1.155]) by BGSMSX105.gar.corp.intel.com ([169.254.3.119]) with mapi id 14.03.0439.000; Thu, 6 Feb 2020 16:22:29 +0530 From: "Javeed, Ashraf" To: "devel@edk2.groups.io" , "Javeed, Ashraf" CC: "Kinney, Michael D" , "Gao, Liming" , "Ni, Ray" Subject: Re: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH] MdePkg/Protocols: Code correction - removal of reserved member Thread-Topic: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH] MdePkg/Protocols: Code correction - removal of reserved member Thread-Index: AQHV3NmG802+HMaRuEijvJUQi89iNKgN/JJg Date: Thu, 6 Feb 2020 10:52:28 +0000 Message-ID: <95C5C2B113DE604FB208120C742E9824579A97B9@BGSMSX101.gar.corp.intel.com> References: <15F0C9E98C1D9334.3049@groups.io> In-Reply-To: <15F0C9E98C1D9334.3049@groups.io> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGU3NjM1OGItM2VhZS00ODE3LTgxMDYtMzUwMmFmN2IwOGEzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiQ3dZbGlON0JuWVFValZCazhMYm04NUxWUXpoZ2JCa3pUXC9nYTRScFdnbXdsSVZYQWZSSjB4K1JaeEREVkMxUGcifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.223.10.10] MIME-Version: 1.0 Return-Path: ashraf.javeed@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable This patch is also in the following repo for your review:- https://github.com/ashrafj/edk2-staging/commit/cdcc078659a82536233c328c771= 507584235bcd0 Thanks Ashraf > -----Original Message----- > From: devel@edk2.groups.io On Behalf Of Javeed, > Ashraf > Sent: Thursday, February 6, 2020 4:08 PM > To: devel@edk2.groups.io > Cc: Kinney, Michael D ; Gao, Liming > ; Ni, Ray > Subject: [edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH] > MdePkg/Protocols: Code correction - removal of reserved member >=20 > Signed-off-by: Ashraf Javeed > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Ray Ni > --- > MdePkg/Include/Protocol/PciExpressPlatform.h | 13 ++++--------- > 1 file changed, 4 insertions(+), 9 deletions(-) >=20 > diff --git a/MdePkg/Include/Protocol/PciExpressPlatform.h > b/MdePkg/Include/Protocol/PciExpressPlatform.h > index dc58268..bb2c8c8 100644 > --- a/MdePkg/Include/Protocol/PciExpressPlatform.h > +++ b/MdePkg/Include/Protocol/PciExpressPlatform.h > @@ -360,14 +360,10 @@ struct _EFI_PCI_EXPRESS_L1PM_SUBSTATES { }; >=20 > /// > -/// Reserves for future use > -/// > -typedef UINT8 EFI_PCI_EXPRESS_RESERVES; > - > -/// > -/// The EFI_PCI_EXPRESS_DEVICE_POLICY is altogether 128-byte size, with > each -/// byte field representing one PCI standerd feature defined in th= e PCI > Express Base -/// Specification 4.0, version 1.0. > +/// The EFI_PCI_EXPRESS_DEVICE_POLICY size is fixed as per its > +definition corresponding /// to its version, with each byte field > +represents one PCI Express feature and /// its bitmask define the legal > +combinations to represent all the valid combinations /// of its attribu= tes, > defined in the PCI Express Base Specification. > /// > typedef struct { > EFI_PCI_EXPRESS_MAX_PAYLOAD_SIZE DeviceCtlMPS; @@ -384,7 +380,6 > @@ typedef struct { > EFI_PCI_EXPRESS_CTO_SUPPORT CTOsupport; > EFI_PCI_EXPRESS_CPM LinkCtlCPM; > EFI_PCI_EXPRESS_L1PM_SUBSTATES L1PMSubstates; > - EFI_PCI_EXPRESS_RESERVES Reserves[114]; > } EFI_PCI_EXPRESS_DEVICE_POLICY; >=20 > /// > -- > 2.21.0.windows.1 >=20 >=20 >=20