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From: "Javeed, Ashraf" <ashraf.javeed@intel.com>
To: "devel@edk2.groups.io" <devel@edk2.groups.io>,
	"Javeed, Ashraf" <ashraf.javeed@intel.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>,
	"Gao, Liming" <liming.gao@intel.com>,
	"Liu, Zhiguang" <zhiguang.liu@intel.com>
Subject: Re: [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: DVSEC definition missing
Date: Tue, 17 Mar 2020 07:56:20 +0000	[thread overview]
Message-ID: <95C5C2B113DE604FB208120C742E9824579C7F52@BGSMSX101.gar.corp.intel.com> (raw)
In-Reply-To: <15FD081950A8E1F5.25941@groups.io>

Kindly ignore this as I have sent only the delta portion of previous patch.
I shall send the whole patch again.
Thanks
Ashraf

> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Javeed,
> Ashraf
> Sent: Tuesday, March 17, 2020 1:22 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> <liming.gao@intel.com>; Liu, Zhiguang <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: DVSEC definition
> missing
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598
> 
> All registers definition of DVSEC are defined as per the PCI Express Base
> Specification 4.0 chapter 7.9.6.
> 
> Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> 
> V2: fixed the comment section description for DVSEC definitions
> ---
>  MdePkg/Include/IndustryStandard/PciExpress40.h | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/MdePkg/Include/IndustryStandard/PciExpress40.h
> b/MdePkg/Include/IndustryStandard/PciExpress40.h
> index 02c30a7757..0564d72861 100644
> --- a/MdePkg/Include/IndustryStandard/PciExpress40.h
> +++ b/MdePkg/Include/IndustryStandard/PciExpress40.h
> @@ -77,7 +77,11 @@ typedef struct {
>    UINT32                                                        Reserved;
> 
> PCI_EXPRESS_REG_PHYSICAL_LAYER_16_0_LANE_EQUALIZATION_CONTRO
> L LaneEqualizationControl[1];  }
> PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0;
> +///@}
> 
> +/// The Designated Vendor Specific Capability definitions /// Based on
> +section 7.9.6 of PCI Express Base Specification 4.0.
> +///@{
>  typedef union {
>    struct {
>      UINT32 DvsecVendorId                                        : 16; //bit 0..15
> --
> 2.21.0.windows.1
> 
> 
> 


       reply	other threads:[~2020-03-17  7:56 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <15FD081950A8E1F5.25941@groups.io>
2020-03-17  7:56 ` Javeed, Ashraf [this message]
2020-03-17  8:04 [PATCH V2] MdePkg-PciExpress40.h: DVSEC definition missing Javeed, Ashraf
2020-03-17  8:08 ` Zhiguang Liu
2020-03-18  2:40   ` Liming Gao
2020-03-18  4:51     ` Javeed, Ashraf
     [not found]       ` <15FD70D8928FA969.21252@groups.io>
2020-03-19  2:02         ` [edk2-devel] " Liming Gao
2020-03-19  6:57           ` Javeed, Ashraf
2020-03-19  8:59 ` Ni, Ray
2020-03-19 10:00   ` Javeed, Ashraf
2020-03-19 15:07     ` Ni, Ray

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