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From: "Javeed, Ashraf" <ashraf.javeed@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
	"Gao, Liming" <liming.gao@intel.com>,
	"Liu, Zhiguang" <zhiguang.liu@intel.com>,
	"Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "devel@edk2.groups.io" <devel@edk2.groups.io>
Subject: Re: [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: DVSEC definition missing
Date: Thu, 19 Mar 2020 10:00:24 +0000	[thread overview]
Message-ID: <95C5C2B113DE604FB208120C742E9824579C978C@BGSMSX101.gar.corp.intel.com> (raw)
In-Reply-To: <734D49CCEBEEF84792F5B80ED585239D5C4A0548@SHSMSX104.ccr.corp.intel.com>

All the PCIe capability structures with the PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER; that has variable length features have been implemented in this way. I am counting around 12 structures which have been defined in the same way.

> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Thursday, March 19, 2020 2:30 PM
> To: Javeed, Ashraf <ashraf.javeed@intel.com>; Gao, Liming
> <liming.gao@intel.com>; Liu, Zhiguang <zhiguang.liu@intel.com>; Kinney,
> Michael D <michael.d.kinney@intel.com>
> Cc: devel@edk2.groups.io
> Subject: RE: [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: DVSEC
> definition missing
> 
> I am sorry I just noticed this patch.
> Is it better to have "DesignatedVendorSpecific[0]"?
> This will make the sizeof (structure) more accurate.
> 
> > -----Original Message-----
> > From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> Javeed,
> > Ashraf
> > Sent: Tuesday, March 17, 2020 4:04 PM
> > To: devel@edk2.groups.io
> > Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> > <liming.gao@intel.com>; Liu, Zhiguang <zhiguang.liu@intel.com>
> > Subject: [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: DVSEC
> > definition missing
> >
> > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598
> >
> > All registers definition of DVSEC are defined as per the PCI Express
> > Base Specification 4.0 chapter 7.9.6.
> >
> > Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <liming.gao@intel.com>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> >
> > V2: fixed the comment section description for DVSEC definitions
> > ---
> >  MdePkg/Include/IndustryStandard/PciExpress40.h | 28
> > ++++++++++++++++++++++++++++
> >  1 file changed, 28 insertions(+)
> >
> > diff --git a/MdePkg/Include/IndustryStandard/PciExpress40.h
> > b/MdePkg/Include/IndustryStandard/PciExpress40.h
> > index 9d9b272546..0564d72861 100644
> > --- a/MdePkg/Include/IndustryStandard/PciExpress40.h
> > +++ b/MdePkg/Include/IndustryStandard/PciExpress40.h
> > @@ -4,6 +4,7 @@ Support for the PCI Express 4.0 standard.
> >  This header file may not define all structures.  Please extend as required.
> >
> >  Copyright (c) 2018, American Megatrends, Inc. All rights
> > reserved.<BR>
> > +Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
> >  SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >  **/
> > @@ -78,6 +79,33 @@ typedef struct {
> >  } PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0;
> >  ///@}
> >
> > +/// The Designated Vendor Specific Capability definitions /// Based
> > +on section 7.9.6 of PCI Express Base Specification 4.0.
> > +///@{
> > +typedef union {
> > +  struct {
> > +    UINT32 DvsecVendorId                                        : 16; //bit 0..15
> > +    UINT32 DvsecRevision                                        : 4;  //bit 16..19
> > +    UINT32 DvsecLength                                          : 12; //bit 20..31
> > +  }Bits;
> > +  UINT32                                                        Uint32;
> > +}PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1;
> > +
> > +typedef union {
> > +  struct {
> > +    UINT16 DvsecId                                              : 16; //bit 0..15
> > +  }Bits;
> > +  UINT16                                                        Uint16;
> > +}PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2;
> > +
> > +typedef struct {
> > +  PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                      Header;
> > +  PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1
> > DesignatedVendorSpecificHeader1;
> > +  PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2
> > DesignatedVendorSpecificHeader2;
> > +  UINT8                                                         DesignatedVendorSpecific[1];
> >
> +}PCI_EXPRESS_EXTENDED_CAPABILITIES_DESIGNATED_VENDOR_SPECIFIC;
> > +///@}
> > +
> >  #pragma pack()
> >
> >  #endif
> > --
> > 2.21.0.windows.1
> >
> >
> > 


  reply	other threads:[~2020-03-19 10:00 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-17  8:04 [PATCH V2] MdePkg-PciExpress40.h: DVSEC definition missing Javeed, Ashraf
2020-03-17  8:08 ` Zhiguang Liu
2020-03-18  2:40   ` Liming Gao
2020-03-18  4:51     ` Javeed, Ashraf
2020-03-18 15:51       ` Liming Gao
     [not found]       ` <15FD70D8928FA969.21252@groups.io>
2020-03-19  2:02         ` [edk2-devel] " Liming Gao
2020-03-19  6:57           ` Javeed, Ashraf
2020-03-19  8:59 ` Ni, Ray
2020-03-19 10:00   ` Javeed, Ashraf [this message]
2020-03-19 15:07     ` Ni, Ray
     [not found] <15FD081950A8E1F5.25941@groups.io>
2020-03-17  7:56 ` [edk2-devel] [PATCH V2] MdePkg-PciExpress40.h: " Javeed, Ashraf

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