From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mx.groups.io with SMTP id smtpd.web10.4694.1622108340971258421 for ; Thu, 27 May 2021 02:39:01 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Re2Ocsit; spf=pass (domain: redhat.com, ip: 170.10.133.124, mailfrom: philmd@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1622108340; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qp2IZBTYj7B9nfXz5toOwDXnQXBNTdxAmUgqKo6g8xw=; b=Re2OcsitoyKB0brnzynYMugpk9CN9hU2tDn8HKNIUdxskAK6crtq9UviofqZTESFhAYg6y xQsPsQuMamN/ZaC9LDWj+CGv86pkW6g306vuxOMuxzhxWX1oaZ2RiuBauwW7GvIHqtBCsJ v3Dlxu7ExsOxyNXFTlDpQgoTPcv/x40= Received: from mail-wr1-f71.google.com (mail-wr1-f71.google.com [209.85.221.71]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-540-SnWlrwV_PzCa554VYEBqfg-1; Thu, 27 May 2021 05:38:56 -0400 X-MC-Unique: SnWlrwV_PzCa554VYEBqfg-1 Received: by mail-wr1-f71.google.com with SMTP id i102-20020adf90ef0000b029010dfcfc46c0so1535297wri.1 for ; Thu, 27 May 2021 02:38:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=qp2IZBTYj7B9nfXz5toOwDXnQXBNTdxAmUgqKo6g8xw=; b=H/ffMZQaDXsF6/GLUESSPrtzbxRrGftKxde34viMHIXbiTx7ovcdbSZJj70lmtTfOf NFPSFfF7EOgf3rIolrjj6B1GYhTsXREtz38oD/RooLFBDsix2c+K1+SSzJkzILTVGw8L /SmpE7IVdQFmi+1JVNrIYT9lbn65aYKDXVLHtkKwd2GYsbtGfkvpu0eck1dQu95H7/p5 TlybB3gZrCE1mcRlLYKpsvWFTtmzXxRJS10hLpiFJMl/n1Ki9SmcGSvdlpfreIZgh33H 1U5CaHZbePKt5YeHkWaqw4fhzkRxCi+b3AGNPmST8rPhDl00OLTZiW4VLuL//PS/Ywhy YHHg== X-Gm-Message-State: AOAM531bc0DRPvmAGE4NWdP1s0bq4ZCTBP8ROqKvoEal96RGHvY15hGm qvSzu5wpT2HeScNMMs4B35+pA5oxfEmo3qH0taNlrrtWOs3w92v64M3znZNFpYzCmue86WFD+2R TSF6QBjO/NYlmPQ== X-Received: by 2002:adf:fa52:: with SMTP id y18mr2286583wrr.355.1622108335428; Thu, 27 May 2021 02:38:55 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxGNIZy0MFTHtPKVRu34ZyIp5+wHTpXH8zh9Ofqr9jW/G7kcxmAG07RcQHQiJf6bwwOYC8DbA== X-Received: by 2002:adf:fa52:: with SMTP id y18mr2286561wrr.355.1622108335271; Thu, 27 May 2021 02:38:55 -0700 (PDT) Return-Path: Received: from [192.168.1.36] (235.red-83-57-168.dynamicip.rima-tde.net. [83.57.168.235]) by smtp.gmail.com with ESMTPSA id g10sm2653904wrq.12.2021.05.27.02.38.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 May 2021 02:38:54 -0700 (PDT) Subject: Re: [edk2-devel] [edk2-devel202105 PATCH v2 1/1] ArmPkg/ArmGic: Fix maximum number of interrupts in GICv3 To: devel@edk2.groups.io, sami.mujawar@arm.com Cc: ardb@kernel.org, leif@nuviainc.com, Matteo.Carlini@arm.com, lersek@redhat.com, Andreas.Sandberg@arm.com, joey.gouly@arm.com, nd@arm.com References: <20210524130130.22280-1-sami.mujawar@arm.com> From: =?UTF-8?B?UGhpbGlwcGUgTWF0aGlldS1EYXVkw6k=?= Message-ID: <960ba960-a54d-3c60-d1ac-fbc31af7a81a@redhat.com> Date: Thu, 27 May 2021 11:38:53 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210524130130.22280-1-sami.mujawar@arm.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit On 5/24/21 3:01 PM, Sami Mujawar wrote: > From: Andreas Sandberg > > Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415) > > The GICv3 architecture supports up to 1020 ordinary interrupt > lines. The actual number of interrupts supported is described by the > ITLinesNumber field in the GICD_TYPER register. The total number of > implemented registers is normally calculated as > 32*(ITLinesNumber+1). However, maximum value (0x1f) is a special case > since that would indicate that 1024 interrupts are implemented. > > Add handling for this special case in ArmGicGetMaxNumInterrupts. > > Signed-off-by: Andreas Sandberg > Signed-off-by: Joey Gouly > Signed-off-by: Sami Mujawar > Reviewed-by: Ard Biesheuvel > --- > The changes can be seen at: > https://github.com/samimujawar/edk2/tree/1396_gic_max_num_intr_v2 > > Notes: > v2: > - Fix comment style. [Laszlo] > - Updated comment style. [Sami] > > ArmPkg/Drivers/ArmGic/ArmGicLib.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) Reviewed-by: Philippe Mathieu-Daude