Re: [edk2-devel] [PATCH v1 04/13] UefiCpuPkg/SmmRelocationLib: Add library instance for AMD

["Abdul Lateef Attar via groups.io" <AbdulLateef.Attar=amd.com@groups.io>]

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Reviewed-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>

On 10-04-2024 19:27, Jiaxin Wu wrote:
> Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding.
>
>
> Due to the definition difference of SMRAM Save State,
> SmmBase config in SMRAM Save State for AMD is also different.
>
> This patch provides the AmdSmmRelocationLib library instance
> to handle the SMRAM Save State difference.
>
> Cc: Abdul Lateef Attar<AbdulLateef.Attar@amd.com>
> Cc: Abner Chang<abner.chang@amd.com>
> Cc: Ray Ni<ray.ni@intel.com>
> Cc: Zeng Star<star.zeng@intel.com>
> Cc: Gerd Hoffmann<kraxel@redhat.com>
> Cc: Rahul Kumar<rahul1.kumar@intel.com>
> Signed-off-by: Jiaxin Wu<jiaxin.wu@intel.com>
> ---
>   .../SmmRelocationLib/AmdSmmRelocationLib.inf       |  61 ++++++++++++
>   .../SmmRelocationLib/AmdSmramSaveStateConfig.c     | 109 +++++++++++++++++++++
>   2 files changed, 170 insertions(+)
>   create mode 100644 UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
>   create mode 100644 UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
>
> diff --git a/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
> new file mode 100644
> index 0000000000..710cd1948b
> --- /dev/null
> +++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
> @@ -0,0 +1,61 @@
> +## @file
> +# SMM Relocation Lib for each processor.
> +#
> +# This Lib produces the SMM_BASE_HOB in HOB database which tells
> +# the PiSmmCpuDxeSmm driver (runs at a later phase) about the new
> +# SMBASE for each processor. PiSmmCpuDxeSmm driver installs the
> +# SMI handler at the SMM_BASE_HOB.SmBase[Index]+0x8000 for processor
> +# Index.
> +#
> +# Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> +  INF_VERSION                    = 0x00010005
> +  BASE_NAME                      = SmmRelocationLib
> +  FILE_GUID                      = 65C74DCD-0D09-494A-8BFF-A64226EB8054
> +  MODULE_TYPE                    = PEIM
> +  VERSION_STRING                 = 1.0
> +  LIBRARY_CLASS                  = SmmRelocationLib
> +
> +[Sources]
> +  InternalSmmRelocationLib.h
> +  AmdSmramSaveStateConfig.c
> +  SmmRelocationLib.c
> +
> +[Sources.Ia32]
> +  Ia32/Semaphore.c
> +  Ia32/SmmInit.nasm
> +
> +[Sources.X64]
> +  X64/Semaphore.c
> +  X64/SmmInit.nasm
> +
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  MdeModulePkg/MdeModulePkg.dec
> +  UefiCpuPkg/UefiCpuPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  BaseMemoryLib
> +  CpuExceptionHandlerLib
> +  DebugLib
> +  HobLib
> +  LocalApicLib
> +  MemoryAllocationLib
> +  PcdLib
> +  PeiServicesLib
> +
> +[Guids]
> +  gSmmBaseHobGuid                               ## HOB ALWAYS_PRODUCED
> +  gEfiSmmSmramMemoryGuid                        ## CONSUMES
> +
> +[Pcd]
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize                     ## CONSUMES
> +
> +[FeaturePcd]
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport                        ## CONSUMES
> diff --git a/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
> new file mode 100644
> index 0000000000..fbcf347f9b
> --- /dev/null
> +++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
> @@ -0,0 +1,109 @@
> +/** @file
> +  Config SMRAM Save State for SmmBases Relocation.
> +
> +  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.<BR>
> +  Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +#include "InternalSmmRelocationLib.h"
> +#include <Register/Amd/SmramSaveStateMap.h>
> +
> +/**
> +  This function configures the SmBase on the currently executing CPU.
> +
> +  @param[in]     CpuIndex             The index of the CPU.
> +  @param[in,out] CpuState             Pointer to SMRAM Save State Map for the
> +                                      currently executing CPU. On out, SmBase is
> +                                      updated to the new value.
> +
> +**/
> +VOID
> +EFIAPI
> +ConfigureSmBase (
> +  IN     UINTN                 CpuIndex,
> +  IN OUT SMRAM_SAVE_STATE_MAP  *CpuState
> +  )
> +{
> +  AMD_SMRAM_SAVE_STATE_MAP  *AmdCpuState;
> +
> +  AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
> +
> +  if (mSmmSaveStateRegisterLma == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {
> +    AmdCpuState->x86.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex];
> +  } else {
> +    AmdCpuState->x64.SMBASE = (UINT32)mSmBaseForAllCpus[CpuIndex];
> +  }
> +}
> +
> +/**
> +  This function updates the SMRAM save state on the currently executing CPU
> +  to resume execution at a specific address after an RSM instruction.  This
> +  function must evaluate the SMRAM save state to determine the execution mode
> +  the RSM instruction resumes and update the resume execution address with
> +  either NewInstructionPointer32 or NewInstructionPoint.  The auto HALT restart
> +  flag in the SMRAM save state must always be cleared.  This function returns
> +  the value of the instruction pointer from the SMRAM save state that was
> +  replaced.  If this function returns 0, then the SMRAM save state was not
> +  modified.
> +
> +  This function is called during the very first SMI on each CPU after
> +  SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode
> +  to signal that the SMBASE of each CPU has been updated before the default
> +  SMBASE address is used for the first SMI to the next CPU.
> +
> +  @param[in]     CpuIndex                 The processor index for the currently
> +                                          executing CPU.
> +  @param[in,out] CpuState                 Pointer to SMRAM Save State Map for the
> +                                          currently executing CPU.
> +  @param[in]     NewInstructionPointer32  Instruction pointer to use if resuming to
> +                                          32-bit mode from 64-bit SMM.
> +  @param[in]     NewInstructionPointer    Instruction pointer to use if resuming to
> +                                          same mode as SMM.
> +
> +  @retval The value of the original instruction pointer before it was hooked.
> +
> +**/
> +UINT64
> +EFIAPI
> +HookReturnFromSmm (
> +  IN     UINTN                 CpuIndex,
> +  IN OUT SMRAM_SAVE_STATE_MAP  *CpuState,
> +  IN     UINT64                NewInstructionPointer32,
> +  IN     UINT64                NewInstructionPointer
> +  )
> +{
> +  UINT64                    OriginalInstructionPointer;
> +  AMD_SMRAM_SAVE_STATE_MAP  *AmdCpuState;
> +
> +  AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)CpuState;
> +
> +  if (mSmmSaveStateRegisterLma == EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT) {
> +    OriginalInstructionPointer = (UINT64)AmdCpuState->x86._EIP;
> +    AmdCpuState->x86._EIP      = (UINT32)NewInstructionPointer;
> +    //
> +    // Clear the auto HALT restart flag so the RSM instruction returns
> +    // program control to the instruction following the HLT instruction.
> +    //
> +    if ((AmdCpuState->x86.AutoHALTRestart & BIT0) != 0) {
> +      AmdCpuState->x86.AutoHALTRestart &= ~BIT0;
> +    }
> +  } else {
> +    OriginalInstructionPointer = AmdCpuState->x64._RIP;
> +    if ((AmdCpuState->x64.EFER & LMA) == 0) {
> +      AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer32;
> +    } else {
> +      AmdCpuState->x64._RIP = (UINT32)NewInstructionPointer;
> +    }
> +
> +    //
> +    // Clear the auto HALT restart flag so the RSM instruction returns
> +    // program control to the instruction following the HLT instruction.
> +    //
> +    if ((AmdCpuState->x64.AutoHALTRestart & BIT0) != 0) {
> +      AmdCpuState->x64.AutoHALTRestart &= ~BIT0;
> +    }
> +  }
> +
> +  return OriginalInstructionPointer;
> +}
> --
> 2.16.2.windows.1
>


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