From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 27B81211546FC for ; Mon, 24 Sep 2018 19:28:21 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2018 19:28:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,300,1534834800"; d="scan'208";a="91602986" Received: from shzintpr02.sh.intel.com (HELO [10.253.24.48]) ([10.239.4.160]) by fmsmga004.fm.intel.com with ESMTP; 24 Sep 2018 19:16:28 -0700 To: Ruiyu Ni , edk2-devel@lists.01.org Cc: Garrett , Kirkendall@ml01.01.org, star.zeng@intel.com References: <20180921072539.268068-1-ruiyu.ni@intel.com> <20180921072539.268068-3-ruiyu.ni@intel.com> From: "Zeng, Star" Message-ID: <981b8730-ccea-3551-286f-a7d715d58277@intel.com> Date: Tue, 25 Sep 2018 10:15:57 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 MIME-Version: 1.0 In-Reply-To: <20180921072539.268068-3-ruiyu.ni@intel.com> Subject: Re: [PATCH 2/3] MdeModulePkg/PciHostBridge: Fix a bug that prevents PMEM access X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 25 Sep 2018 02:28:21 -0000 Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit On 2018/9/21 15:25, Ruiyu Ni wrote: > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1196 > > RootBridgeIoCheckParameter() verifies that the requested MMIO access > can fit in any of the MEM/PMEM 32/64 ranges. But today's logic > somehow only checks the requested access against MEM 32/64 ranges. > > It should also check the requested access against PMEM 32/64 ranges. > > The patch fixes this issue. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ruiyu Ni > Cc: Star Zeng > Cc: Kirkendall, Garrett Reviewed-by: Star Zeng Thanks, Star > --- > MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c > index 0b6b56f846..f6234b5d11 100644 > --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c > +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciRootBridgeIo.c > @@ -411,12 +411,18 @@ RootBridgeIoCheckParameter ( > // By comparing the Address against Limit we know which range to be used > // for checking > // > - if (Address + Length <= RootBridge->Mem.Limit + 1) { > - Base = RootBridge->Mem.Base; > + if ((Address >= RootBridge->Mem.Base) && (Address + Length <= RootBridge->Mem.Limit + 1)) { > + Base = RootBridge->Mem.Base; > Limit = RootBridge->Mem.Limit; > - } else { > - Base = RootBridge->MemAbove4G.Base; > + } else if ((Address >= RootBridge->PMem.Base) && (Address + Length <= RootBridge->PMem.Limit + 1)) { > + Base = RootBridge->PMem.Base; > + Limit = RootBridge->PMem.Limit; > + } else if ((Address >= RootBridge->MemAbove4G.Base) && (Address + Length <= RootBridge->MemAbove4G.Limit + 1)) { > + Base = RootBridge->MemAbove4G.Base; > Limit = RootBridge->MemAbove4G.Limit; > + } else { > + Base = RootBridge->PMemAbove4G.Base; > + Limit = RootBridge->PMemAbove4G.Limit; > } > } else { > PciRbAddr = (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS*) &Address; >