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([2607:f2c0:e98c:e:da1:4180:8030:1a92]) by smtp.gmail.com with ESMTPSA id bp6-20020a05620a458600b006bbda80595asm6846218qkb.5.2022.08.29.13.37.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 29 Aug 2022 13:37:05 -0700 (PDT) From: "Benjamin Doron" To: devel@edk2.groups.io Cc: Nate DeSimone , Ankit Sinha , Chasel Chiu , Jeremy Soller , Sai Chaganty , Isaac Oram Subject: [edk2-devel][edk2-platforms][PATCH v1 5/5] KabylakeOpenBoardPkg: Example of board S3 Date: Mon, 29 Aug 2022 16:36:20 -0400 Message-Id: <9825213b3cbe2814c9b4418570cdeca3fe49bc90.1661799519.git.benjamin.doron00@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Use silicon code to detect S3 resume state. Apply some relevant policy modifications. PcdPeiMemSize must be in common scope, for a DXE module to allocate required memory. Libraries that produce required PPIs are defined. BootScriptExecutorDxe should only be linked against a functionally compatible debug stack. Cc: Nate DeSimone Cc: Ankit Sinha Cc: Chasel Chiu Cc: Jeremy Soller Cc: Sai Chaganty Cc: Isaac Oram Signed-off-by: Benjamin Doron --- .../PeiFspMiscUpdUpdateLib.c | 12 +++- .../PeiSaPolicyUpdate.c | 12 +++- .../PeiAspireVn7Dash572GInitPreMemLib.c | 61 ++++++++++++++----- .../BoardInitLib/PeiBoardInitPreMemLib.inf | 3 + .../AspireVn7Dash572G/OpenBoardPkg.dsc | 18 ++++++ .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc | 7 +-- .../PeiSiliconPolicyUpdateLib.c | 11 +++- .../PeiSiliconPolicyUpdateLib.inf | 1 + .../PeiFspMiscUpdUpdateLib.c | 11 +++- .../PeiSaPolicyUpdate.c | 12 +++- .../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 + .../BoardInitLib/PeiGalagoPro3InitPreMemLib.c | 27 +++++++- .../PeiMultiBoardInitPreMemLib.inf | 1 + .../GalagoPro3/OpenBoardPkg.dsc | 16 +++++ .../GalagoPro3/OpenBoardPkgPcd.dsc | 2 +- .../PeiFspMiscUpdUpdateLib.c | 12 +++- .../PeiSaPolicyUpdate.c | 12 +++- .../BoardInitLib/PeiBoardInitPreMemLib.inf | 1 + .../PeiKabylakeRvp3InitPreMemLib.c | 27 +++++++- .../PeiMultiBoardInitPreMemLib.inf | 1 + .../KabylakeRvp3/OpenBoardPkg.dsc | 13 ++++ .../KabylakeRvp3/OpenBoardPkgPcd.dsc | 2 +- .../PeiSiliconPolicyUpdateLib.c | 11 +++- .../PeiSiliconPolicyUpdateLib.inf | 1 + 24 files changed, 242 insertions(+), 33 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp= er/Library/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform= /Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSilicon= PolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c index a9b7e446c8d6..7e4194bf4fe6 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -11,6 +11,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D +=0D #include =0D #include =0D #include =0D @@ -32,11 +34,15 @@ PeiFspMiscUpdUpdatePreMem ( )=0D {=0D EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D UINTN VariableSize;=0D VOID *FspNvsBufferPtr;=0D UINT8 MorControl;=0D VOID *MorControlPtr;=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D //=0D // Initialize S3 Data variable (S3DataPtr). It may be used for warm and = fast boot paths.=0D //=0D @@ -70,7 +76,11 @@ PeiFspMiscUpdUpdatePreMem ( &VariableSize=0D );=0D DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));=0D - if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {=0D + //=0D + // Do not set CleanMemory on S3 resume=0D + // TODO: Handle advanced features later - capsule update is in-memory li= st=0D + //=0D + if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode !=3D BOOT_ON_S3_RESU= ME) {=0D FspmUpd->FspmConfig.CleanMemory =3D (BOOLEAN)(MorControl & MOR_CLEAR_M= EMORY_BIT_MASK);=0D }=0D =0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapp= er/Library/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Inte= l/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Library/PeiSiliconPolic= yUpdateLibFsp/PeiSaPolicyUpdate.c index 4621cbd3ca3a..1299bf504fbd 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c @@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D /**=0D Performs FSP SA PEI Policy initialization.=0D @@ -27,12 +28,17 @@ PeiFspSaPolicyUpdate ( IN OUT FSPS_UPD *FspsUpd=0D )=0D {=0D + EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D VOID *Buffer;=0D VOID *MemBuffer;=0D UINT32 Size;=0D =0D DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D FspsUpd->FspsConfig.PeiGraphicsPeimInit =3D 1;=0D =0D Size =3D 0;=0D @@ -40,7 +46,11 @@ PeiFspSaPolicyUpdate ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size);=0D if (Buffer =3D=3D NULL) {=0D DEBUG((DEBUG_WARN, "Could not locate VBT\n"));=0D - } else {=0D + //=0D + // Graphics initialisation is unnecessary,=0D + // OS has present framebuffer.=0D + //=0D + } else if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= );=0D if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) {=0D CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardInitLib/PeiAspireVn7Dash572GInitPreMemLib.c b/Platform/Intel/KabylakeO= penBoardPkg/AspireVn7Dash572G/Library/BoardInitLib/PeiAspireVn7Dash572GInit= PreMemLib.c index 1c9a65399b54..1b4c6b484b43 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GInitPreMemLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiAspireVn7Dash572GInitPreMemLib.c @@ -11,7 +11,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -248,6 +250,8 @@ AspireVn7Dash572GBoardDebugInit ( VOID=0D )=0D {=0D + UINT16 ABase;=0D +=0D ///=0D /// Do Early PCH init=0D ///=0D @@ -258,6 +262,16 @@ AspireVn7Dash572GBoardDebugInit ( // - Alternatively, move the preceding calls to BoardDetect()=0D AspireVn7Dash572GBoardDetect ();=0D =0D + // Dump relevant registers=0D + // - TODO: Remove after debugging=0D + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_A=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_A))));=0D + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_B=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_B))));=0D +=0D + PchAcpiBaseGet (&ABase);=0D + DEBUG ((DEBUG_INFO, "ABase PM1_STS=3D 0x%x\n", IoRead16 (ABase)));=0D + DEBUG ((DEBUG_INFO, "ABase PM1_EN=3D 0x%x\n", IoRead16 (ABase + R_PCH_AC= PI_PM1_EN)));=0D + DEBUG ((DEBUG_INFO, "ABase PM1_CNT=3D 0x%x\n", IoRead32 (ABase + R_PCH_A= CPI_PM1_CNT)));=0D +=0D return EFI_SUCCESS;=0D }=0D =0D @@ -267,25 +281,42 @@ AspireVn7Dash572GBoardBootModeDetect ( VOID=0D )=0D {=0D - UINT16 ABase;=0D + EFI_BOOT_MODE BootMode;=0D UINT32 SleepType;=0D + UINT16 ABase;=0D =0D DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));=0D =0D - // TODO: Perform advanced detection (recovery/capsule)=0D - // FIXME: This violates PI specification? But BOOT_WITH* would always ta= ke precedence=0D - // over BOOT_ON_S{4,5}...=0D - PchAcpiBaseGet (&ABase);=0D - SleepType =3D IoRead32 (ABase + R_PCH_ACPI_PM1_CNT) & B_PCH_ACPI_PM1_CNT= _SLP_TYP;=0D + // Known sane defaults; TODO: Consider "default"?=0D + BootMode =3D BOOT_WITH_FULL_CONFIGURATION;=0D =0D - switch (SleepType) {=0D - case V_PCH_ACPI_PM1_CNT_S3:=0D - return BOOT_ON_S3_RESUME;=0D - case V_PCH_ACPI_PM1_CNT_S4:=0D - return BOOT_ON_S4_RESUME;=0D -// case V_PCH_ACPI_PM1_CNT_S5:=0D -// return BOOT_ON_S5_RESUME;=0D - default:=0D - return BOOT_WITH_FULL_CONFIGURATION;=0D + // TODO: Perform advanced detection (capsule/recovery)=0D + // TODO: Perform "IsFirstBoot" test with VariablePpi for "minimal"/"assu= me"=0D + if (GetSleepTypeAfterWakeup (&SleepType)) {=0D + switch (SleepType) {=0D + case V_PCH_ACPI_PM1_CNT_S3:=0D + BootMode =3D BOOT_ON_S3_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S4:=0D + BootMode =3D BOOT_ON_S4_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S5:=0D + BootMode =3D BOOT_ON_S5_RESUME;=0D + break;=0D + }=0D }=0D +=0D + DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));=0D +=0D + // Dump relevant registers=0D + // - TODO: Remove after debugging=0D + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_A=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_A))));=0D + DEBUG ((DEBUG_INFO, "PMC GEN_PMCON_B=3D 0x%x\n", PciRead32 ((UINTN)PCI_L= IB_ADDRESS (0, PCI_DEVICE_NUMBER_PCH_PMC, PCI_FUNCTION_NUMBER_PCH_PMC, R_PC= H_PMC_GEN_PMCON_B))));=0D +=0D + PchAcpiBaseGet (&ABase);=0D + DEBUG ((DEBUG_INFO, "ABase PM1_STS=3D 0x%x\n", IoRead16 (ABase)));=0D + DEBUG ((DEBUG_INFO, "ABase PM1_EN=3D 0x%x\n", IoRead16 (ABase + R_PCH_AC= PI_PM1_EN)));=0D + DEBUG ((DEBUG_INFO, "ABase PM1_CNT=3D 0x%x\n", IoRead32 (ABase + R_PCH_A= CPI_PM1_CNT)));=0D +=0D + return BootMode;=0D }=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/= BoardInitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPk= g/AspireVn7Dash572G/Library/BoardInitLib/PeiBoardInitPreMemLib.inf index cd9f979d313c..c53114e15450 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Library/BoardIn= itLib/PeiBoardInitPreMemLib.inf @@ -25,11 +25,14 @@ TimerLib=0D PchCycleDecodingLib=0D PchResetLib=0D + PciLib=0D IoLib=0D EcLib=0D BoardEcLib=0D GpioLib=0D PeiLib=0D + PeiServicesLib=0D + PchPmcLib=0D =0D [Packages]=0D MinPlatformPkg/MinPlatformPkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoar= dPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardP= kg.dsc index 261f141056f5..f4664985f947 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg.dsc @@ -150,6 +150,7 @@ #######################################=0D ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf=0D SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf=0D + IntelCompatShimLib|$(PLATFORM_SI_PACKAGE)/Library/BaseIntelCompatShimLib= Kbl/BaseIntelCompatShimLibKbl.inf=0D =0D !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1=0D #=0D @@ -238,6 +239,7 @@ # Silicon Package=0D #######################################=0D ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.= inf=0D + SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSm= ramc/PeiSmmAccessLib.inf=0D =0D #######################################=0D # Platform Package=0D @@ -662,6 +664,22 @@ !endif=0D }=0D =0D +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable =3D=3D TRUE=0D + MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.= inf {=0D + =0D + # On S3 resume, RSC is in end-of-BS state=0D + # - Moreover: Library cannot effectively use some end-of-BS events=0D + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPor= t.inf=0D + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLib= Null.inf=0D + # Reverse-ranked priority list=0D +# TODO: Requires testing=0D +# - Strongly suspect DebugLibSerialPort constructor presents PeiDxeSerialP= ortLibMem dependency on services as a bug=0D +!if FALSE # $(USE_MEMORY_LOGGING) =3D=3D TRUE=0D + SerialPortLib|MdeModulePkg/Library/PeiDxeSerialPortLibMem/DxeSerialP= ortLibMem.inf=0D +!endif=0D + }=0D +!endif=0D +=0D !endif=0D =0D #######################################=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoar= dPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoa= rdPkgPcd.dsc index 822040c06f32..df2cc81ae801 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd= .dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd= .dsc @@ -127,10 +127,7 @@ # PcdIpmiFeatureEnable will not be enabled (no BMC)=0D # TODO: Can be build-time (user) choice=0D gNetworkFeaturePkgTokenSpaceGuid.PcdNetworkFeatureEnable = |FALSE=0D - # TODO: Continue developing support. Broken at present.=0D - # - PeiSmmAccessLib in IntelSiliconPkg seems like a stub=0D - # - May require a PeiSmmControlLib to SMM communicate=0D - gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable = |FALSE=0D + gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable = |TRUE=0D # TODO: Definitions (now added SmbiosDxe)=0D gSmbiosFeaturePkgTokenSpaceGuid.PcdSmbiosFeatureEnable = |TRUE=0D # Requires actual hook-up=0D @@ -360,6 +357,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|4=0D gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2=0D gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D #=0D # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags=0D @@ -442,7 +440,6 @@ # Edk2 Configuration=0D ######################################=0D gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148=0D - gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D ######################################=0D # Platform Configuration=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L= ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Int= el/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicyUp= dateLib/PeiSiliconPolicyUpdateLib.c index 3764f7c3ac09..ab8abac6be1c 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c @@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -549,6 +550,7 @@ SiliconPolicyUpdatePostMem ( )=0D {=0D EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D VOID *Buffer;=0D VOID *MemBuffer;=0D UINT32 Size;=0D @@ -557,6 +559,9 @@ SiliconPolicyUpdatePostMem ( =0D DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n"));=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D GtConfig =3D NULL;=0D Status =3D GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VO= ID *)&GtConfig);=0D ASSERT_EFI_ERROR (Status);=0D @@ -571,7 +576,11 @@ SiliconPolicyUpdatePostMem ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size);=0D if (Buffer =3D=3D NULL) {=0D DEBUG((DEBUG_WARN, "Could not locate VBT\n"));=0D - } else {=0D + //=0D + // Graphics initialisation is unnecessary,=0D + // OS has present framebuffer.=0D + //=0D + } else if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= );=0D if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) {=0D CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/L= ibrary/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/I= ntel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/PeiSiliconPolicy= UpdateLib/PeiSiliconPolicyUpdateLib.inf index 1ce26fc3dcec..31a45292209d 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/Policy/Library/= PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf @@ -23,6 +23,7 @@ BaseMemoryLib=0D MemoryAllocationLib=0D PeiLib=0D + PeiServicesLib=0D CpuPlatformLib=0D PchPcieRpLib=0D PchInfoLib=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Intel/= KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLi= bFsp/PeiFspMiscUpdUpdateLib.c index dbc84631acaa..ce309bd378d2 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/Pei= SiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/Pei= SiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -11,6 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D #include =0D #include =0D @@ -36,11 +37,15 @@ PeiFspMiscUpdUpdatePreMem ( )=0D {=0D EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D UINTN VariableSize;=0D VOID *FspNvsBufferPtr;=0D UINT8 MorControl;=0D VOID *MorControlPtr;=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D //=0D // Initialize S3 Data variable (S3DataPtr). It may be used for warm and = fast boot paths.=0D //=0D @@ -75,7 +80,11 @@ PeiFspMiscUpdUpdatePreMem ( &VariableSize=0D );=0D DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));=0D - if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {=0D + //=0D + // Do not set CleanMemory on S3 resume=0D + // TODO: Handle advanced features later - capsule update is in-memory li= st=0D + //=0D + if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode !=3D BOOT_ON_S3_RESU= ME) {=0D FspmUpd->FspmConfig.CleanMemory =3D (BOOLEAN)(MorControl & MOR_CLEAR_M= EMORY_BIT_MASK);=0D }=0D =0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Libr= ary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Intel/Kabyl= akeOpenBoardPkg/GalagoPro3/FspWrapper/Library/PeiSiliconPolicyUpdateLibFsp/= PeiSaPolicyUpdate.c index 133b8c963f65..48899aa63b4f 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/Pei= SiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/FspWrapper/Library/Pei= SiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D /**=0D Performs FSP SA PEI Policy initialization.=0D @@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate ( IN OUT FSPS_UPD *FspsUpd=0D )=0D {=0D + EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D VOID *Buffer;=0D VOID *MemBuffer;=0D UINT32 Size;=0D =0D DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D FspsUpd->FspsConfig.PeiGraphicsPeimInit =3D 1;=0D =0D Size =3D 0;=0D @@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size);=0D if (Buffer =3D=3D NULL) {=0D DEBUG((DEBUG_WARN, "Could not locate VBT\n"));=0D - } else {=0D + //=0D + // Graphics initialisation is unnecessary,=0D + // OS has present framebuffer.=0D + //=0D + } else if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= );=0D if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) {=0D CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardIn= itLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/Galag= oPro3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf index d6c91cd2b94b..5b3a6921d0ee 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiBoardInitPreMemLib.inf @@ -23,6 +23,7 @@ PcdLib=0D SiliconInitLib=0D PchResetLib=0D + PchPmcLib=0D =0D [Packages]=0D MinPlatformPkg/MinPlatformPkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardIn= itLib/PeiGalagoPro3InitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPkg/Ga= lagoPro3/Library/BoardInitLib/PeiGalagoPro3InitPreMemLib.c index 051dac0b204d..1cd2baf4a4dd 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiGalagoPro3InitPreMemLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiGalagoPro3InitPreMemLib.c @@ -14,6 +14,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -236,5 +237,29 @@ GalagoPro3BoardBootModeDetect ( VOID=0D )=0D {=0D - return BOOT_WITH_FULL_CONFIGURATION;=0D + EFI_BOOT_MODE BootMode;=0D + UINT32 SleepType;=0D +=0D + DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));=0D +=0D + // Known sane defaults=0D + BootMode =3D BOOT_WITH_FULL_CONFIGURATION;=0D +=0D + if (GetSleepTypeAfterWakeup (&SleepType)) {=0D + switch (SleepType) {=0D + case V_PCH_ACPI_PM1_CNT_S3:=0D + BootMode =3D BOOT_ON_S3_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S4:=0D + BootMode =3D BOOT_ON_S4_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S5:=0D + BootMode =3D BOOT_ON_S5_RESUME;=0D + break;=0D + }=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));=0D +=0D + return BootMode;=0D }=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardIn= itLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/= GalagoPro3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf index fe31f421356e..20ddac1d994d 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiMultiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardInitLib/P= eiMultiBoardInitPreMemLib.inf @@ -25,6 +25,7 @@ SiliconInitLib=0D MultiBoardInitSupportLib=0D PchResetLib=0D + PchPmcLib=0D =0D [Packages]=0D MinPlatformPkg/MinPlatformPkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.ds= c b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc index 2e3c6d3ca506..097d20f34b4e 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc @@ -108,6 +108,7 @@ ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf=0D SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf=0D SiliconPolicyInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconPolicyInit= LibFsp/PeiSiliconPolicyInitLibFsp.inf=0D + IntelCompatShimLib|$(PLATFORM_SI_PACKAGE)/Library/BaseIntelCompatShimLib= Kbl/BaseIntelCompatShimLibKbl.inf=0D =0D #####################################=0D # Platform Package=0D @@ -177,6 +178,7 @@ # Silicon Package=0D #######################################=0D ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.= inf=0D + SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSm= ramc/PeiSmmAccessLib.inf=0D =0D #######################################=0D # Platform Package=0D @@ -488,6 +490,20 @@ NULL|$(PROJECT)/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.i= nf=0D !endif=0D }=0D +=0D +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable =3D=3D TRUE=0D + MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.= inf {=0D + =0D + # On S3 resume, RSC is in end-of-BS state=0D + # - Moreover: Libraries cannot effectively use some end-of-BS events= =0D + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPor= t.inf=0D + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLib= Null.inf=0D + # Reverse-ranked priority list=0D +!if gKabylakeOpenBoardPkgTokenSpaceGuid.PcdI2cHdmiDebugPortEnable =3D=3D T= RUE=0D + SerialPortLib|$(PLATFORM_BOARD_PACKAGE)/Library/I2cHdmiDebugSerialPo= rtLib/BootScriptExecutorDxeI2cHdmiDebugSerialPortLib.inf=0D +!endif=0D + }=0D +!endif=0D MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouter= Smm.inf {=0D =0D DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd= .dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc index 4a37d6157b95..618a70910536 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc @@ -305,6 +305,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8=0D gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2=0D gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D #=0D # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags=0D @@ -405,7 +406,6 @@ ######################################=0D gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0=0D gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148=0D - gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D ######################################=0D # Platform Configuration=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Li= brary/PeiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c b/Platform/Inte= l/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpda= teLibFsp/PeiFspMiscUpdUpdateLib.c index 699f4297fad6..71b03f2da464 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiFspMiscUpdUpdateLib.c @@ -11,11 +11,11 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D #include =0D #include =0D #include =0D -=0D #include =0D #include =0D #include =0D @@ -36,11 +36,15 @@ PeiFspMiscUpdUpdatePreMem ( )=0D {=0D EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D UINTN VariableSize;=0D VOID *FspNvsBufferPtr;=0D UINT8 MorControl;=0D VOID *MorControlPtr;=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D //=0D // Initialize S3 Data variable (S3DataPtr). It may be used for warm and = fast boot paths.=0D //=0D @@ -73,7 +77,11 @@ PeiFspMiscUpdUpdatePreMem ( &VariableSize=0D );=0D DEBUG ((DEBUG_INFO, "MorControl - 0x%x (%r)\n", MorControl, Status));=0D - if (MOR_CLEAR_MEMORY_VALUE (MorControl)) {=0D + //=0D + // Do not set CleanMemory on S3 resume=0D + // TODO: Handle advanced features later - capsule update is in-memory li= st=0D + //=0D + if (MOR_CLEAR_MEMORY_VALUE (MorControl) && BootMode !=3D BOOT_ON_S3_RESU= ME) {=0D FspmUpd->FspmConfig.CleanMemory =3D (BOOLEAN)(MorControl & MOR_CLEAR_M= EMORY_BIT_MASK);=0D }=0D =0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Li= brary/PeiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c b/Platform/Intel/Kab= ylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/PeiSiliconPolicyUpdateLib= Fsp/PeiSaPolicyUpdate.c index d6ec3e38dd7e..b69abd11cbce 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/FspWrapper/Library/P= eiSiliconPolicyUpdateLibFsp/PeiSaPolicyUpdate.c @@ -17,6 +17,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D /**=0D Performs FSP SA PEI Policy initialization.=0D @@ -33,12 +34,17 @@ PeiFspSaPolicyUpdate ( IN OUT FSPS_UPD *FspsUpd=0D )=0D {=0D + EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D VOID *Buffer;=0D VOID *MemBuffer;=0D UINT32 Size;=0D =0D DEBUG((DEBUG_INFO, "\nUpdating SA Policy in Post Mem\n"));=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D FspsUpd->FspsConfig.PeiGraphicsPeimInit =3D 1;=0D =0D Size =3D 0;=0D @@ -46,7 +52,11 @@ PeiFspSaPolicyUpdate ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size);=0D if (Buffer =3D=3D NULL) {=0D DEBUG((DEBUG_WARN, "Could not locate VBT\n"));=0D - } else {=0D + //=0D + // Graphics initialisation is unnecessary,=0D + // OS has present framebuffer.=0D + //=0D + } else if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= );=0D if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) {=0D CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/Board= InitLib/PeiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPkg/Kab= ylakeRvp3/Library/BoardInitLib/PeiBoardInitPreMemLib.inf index 850fc514188b..e0022e8d6118 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiBoardInitPreMemLib.inf @@ -24,6 +24,7 @@ SiliconInitLib=0D EcLib=0D PchResetLib=0D + PchPmcLib=0D =0D [Packages]=0D MinPlatformPkg/MinPlatformPkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/Board= InitLib/PeiKabylakeRvp3InitPreMemLib.c b/Platform/Intel/KabylakeOpenBoardPk= g/KabylakeRvp3/Library/BoardInitLib/PeiKabylakeRvp3InitPreMemLib.c index 87ae3b531ed6..02cd37227e50 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiKabylakeRvp3InitPreMemLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiKabylakeRvp3InitPreMemLib.c @@ -13,6 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -330,5 +331,29 @@ KabylakeRvp3BoardBootModeDetect ( VOID=0D )=0D {=0D - return BOOT_WITH_FULL_CONFIGURATION;=0D + EFI_BOOT_MODE BootMode;=0D + UINT32 SleepType;=0D +=0D + DEBUG ((DEBUG_INFO, "Performing boot mode detection\n"));=0D +=0D + // Known sane defaults=0D + BootMode =3D BOOT_WITH_FULL_CONFIGURATION;=0D +=0D + if (GetSleepTypeAfterWakeup (&SleepType)) {=0D + switch (SleepType) {=0D + case V_PCH_ACPI_PM1_CNT_S3:=0D + BootMode =3D BOOT_ON_S3_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S4:=0D + BootMode =3D BOOT_ON_S4_RESUME;=0D + break;=0D + case V_PCH_ACPI_PM1_CNT_S5:=0D + BootMode =3D BOOT_ON_S5_RESUME;=0D + break;=0D + }=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "BootMode is 0x%x\n", BootMode));=0D +=0D + return BootMode;=0D }=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/Board= InitLib/PeiMultiBoardInitPreMemLib.inf b/Platform/Intel/KabylakeOpenBoardPk= g/KabylakeRvp3/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf index 23fe6b6f03c5..0112bf84a193 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiMultiBoardInitPreMemLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Library/BoardInitLib= /PeiMultiBoardInitPreMemLib.inf @@ -26,6 +26,7 @@ MultiBoardInitSupportLib=0D EcLib=0D PchResetLib=0D + PchPmcLib=0D =0D [Packages]=0D MinPlatformPkg/MinPlatformPkg.dec=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.= dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc index 26a54b0dc7cc..dbffa2918df7 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc @@ -138,6 +138,7 @@ #######################################=0D ConfigBlockLib|IntelSiliconPkg/Library/BaseConfigBlockLib/BaseConfigBloc= kLib.inf=0D SiliconInitLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiliconInitLib/PeiSilic= onInitLib.inf=0D + IntelCompatShimLib|$(PLATFORM_SI_PACKAGE)/Library/BaseIntelCompatShimLib= Kbl/BaseIntelCompatShimLibKbl.inf=0D =0D !if gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection =3D=3D 1=0D #=0D @@ -201,6 +202,7 @@ # Silicon Package=0D #######################################=0D ReportCpuHobLib|IntelSiliconPkg/Library/ReportCpuHobLib/ReportCpuHobLib.= inf=0D + SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSm= ramc/PeiSmmAccessLib.inf=0D =0D #######################################=0D # Platform Package=0D @@ -505,6 +507,17 @@ !endif=0D }=0D =0D +!if gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable =3D=3D TRUE=0D + MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.= inf {=0D + =0D + # On S3 resume, RSC is in end-of-BS state=0D + # - Moreover: Libraries cannot effectively use some end-of-BS events= =0D + DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPor= t.inf=0D + SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLib= Null.inf=0D + # TODO: Insert a reverse-ranked priority list of compatible librarie= s here=0D + }=0D +!endif=0D +=0D !endif=0D =0D #######################################=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgP= cd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.d= sc index bdd5bc412795..82bf55f4cce1 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc @@ -305,6 +305,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8=0D gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2=0D gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D #=0D # The PCDs are used to control the Windows SMM Security Mitigations Tabl= e - Protection Flags=0D @@ -375,7 +376,6 @@ ######################################=0D gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0=0D gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148=0D - gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000=0D =0D ######################################=0D # Platform Configuration=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Librar= y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c b/Platform/Intel/Ka= bylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/Pe= iSiliconPolicyUpdateLib.c index 22aadc0221df..2061efb2445c 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.c @@ -20,6 +20,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -513,6 +514,7 @@ SiliconPolicyUpdatePostMem ( )=0D {=0D EFI_STATUS Status;=0D + EFI_BOOT_MODE BootMode;=0D VOID *Buffer;=0D VOID *MemBuffer;=0D UINT32 Size;=0D @@ -521,6 +523,9 @@ SiliconPolicyUpdatePostMem ( =0D DEBUG((DEBUG_INFO, "\nUpdating Policy in Post Mem\n"));=0D =0D + Status =3D PeiServicesGetBootMode (&BootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D GtConfig =3D NULL;=0D Status =3D GetConfigBlock ((VOID *) Policy, &gGraphicsPeiConfigGuid, (VO= ID *)&GtConfig);=0D ASSERT_EFI_ERROR (Status);=0D @@ -535,7 +540,11 @@ SiliconPolicyUpdatePostMem ( PeiGetSectionFromAnyFv (PcdGetPtr (PcdGraphicsVbtGuid), EFI_SECTION_RA= W, 0, &Buffer, &Size);=0D if (Buffer =3D=3D NULL) {=0D DEBUG((DEBUG_WARN, "Could not locate VBT\n"));=0D - } else {=0D + //=0D + // Graphics initialisation is unnecessary,=0D + // OS has present framebuffer.=0D + //=0D + } else if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D MemBuffer =3D (VOID *)AllocatePages (EFI_SIZE_TO_PAGES ((UINTN)Size)= );=0D if ((MemBuffer !=3D NULL) && (Buffer !=3D NULL)) {=0D CopyMem (MemBuffer, (VOID *)Buffer, (UINTN)Size);=0D diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Librar= y/PeiSiliconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf b/Platform/Intel/= KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSiliconPolicyUpdateLib/= PeiSiliconPolicyUpdateLib.inf index 25eae88f5989..e9a23593e133 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/Policy/Library/PeiSi= liconPolicyUpdateLib/PeiSiliconPolicyUpdateLib.inf @@ -23,6 +23,7 @@ BaseMemoryLib=0D MemoryAllocationLib=0D PeiLib=0D + PeiServicesLib=0D CpuPlatformLib=0D PchPcieRpLib=0D PchInfoLib=0D --=20 2.37.2