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From: "Michael Kubacki" <mikuback@linux.microsoft.com>
To: devel@edk2.groups.io, nathaniel.l.desimone@intel.com
Cc: Chasel Chiu <chasel.chiu@intel.com>,
	Michael Kubacki <michael.kubacki@microsoft.com>,
	Benjamin Doron <benjamin.doron00@gmail.com>,
	Jeremy Soller <jeremy@system76.com>
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH V2 1/4] KabylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT
Date: Mon, 6 Jun 2022 19:37:30 -0400	[thread overview]
Message-ID: <995a7d3c-7ec5-b003-37a7-e717bfac2f99@linux.microsoft.com> (raw)
In-Reply-To: <20220606231645.3813-2-nathaniel.l.desimone@intel.com>

Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>

On 6/6/2022 7:16 PM, Nate DeSimone wrote:
> Set the location of the DUTY_CYCLE field in the P_CNT register
> and indicate the width of the clock duty cycle to OS power management
> 
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <michael.kubacki@microsoft.com>
> Cc: Benjamin Doron <benjamin.doron00@gmail.com>
> Cc: Jeremy Soller <jeremy@system76.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
>   .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc             |  9 ++++++++-
>   .../GalagoPro3/OpenBoardPkgPcd.dsc                    |  8 +++++++-
>   .../KabylakeRvp3/OpenBoardPkgPcd.dsc                  | 11 +++++++++--
>   3 files changed, 24 insertions(+), 4 deletions(-)
> 
> diff --git a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
> index 21ee86403d..02080aa864 100644
> --- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the Aspire VN7-572G board.
>   #
> -# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -346,6 +346,13 @@
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2  # FIXME: Boot Guard and BIOS Guard not present, measured boot enforcement checking code not present
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################
> diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
> index 44dacdf082..dce4db17c2 100644
> --- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the GalagoPro3 board.
>   #
> -# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -251,6 +251,12 @@
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
>     gSiPkgTokenSpaceGuid.PcdSiPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
>     gSiPkgTokenSpaceGuid.PcdSiPciExpressRegionLength|gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength
>   
> diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
> index 725596cbf7..ccf757e202 100644
> --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
> +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
> @@ -1,7 +1,7 @@
>   ## @file
>   #  PCD configuration build description file for the KabylakeRvp3 board.
>   #
> -# Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
>   #
>   # SPDX-License-Identifier: BSD-2-Clause-Patent
>   #
> @@ -78,6 +78,7 @@
>     # so FSP needs more temporary memory for FSP heap + stack size.
>     #
>     gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x26000
> +
>     #
>     # FSP API mode does not need to enlarge the boot loader stack size
>     # since the stacks are separate.
> @@ -290,6 +291,13 @@
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature1|0xF2
>     gSiPkgTokenSpaceGuid.PcdHstiIhvFeature2|0x07
>   
> +  #
> +  # Set the location of the DUTY_CYCLE field in the P_CNT register
> +  # and indicate the width of the clock duty cycle to OS power management
> +  #
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyOffset|0x1
> +  gMinPlatformPkgTokenSpaceGuid.PcdFadtDutyWidth|0x3
> +
>     ######################################
>     # Platform Configuration
>     ######################################
> @@ -346,7 +354,6 @@
>     gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
>   !endif
>   
> -
>     ######################################
>     # Board Configuration
>     ######################################

  reply	other threads:[~2022-06-06 23:37 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 23:16 [edk2-platforms] [PATCH V2 0/4] Enable CPU pwr mgmt in FADT for Intel client boards Nate DeSimone
2022-06-06 23:16 ` [edk2-platforms] [PATCH V2 1/4] KabylakeOpenBoardPkg: Indicate width of CLK duty cycle in FADT Nate DeSimone
2022-06-06 23:37   ` Michael Kubacki [this message]
2022-06-08  1:11   ` Chiu, Chasel
2022-06-06 23:16 ` [edk2-platforms] [PATCH V2 2/4] WhiskeylakeOpenBoardPkg: " Nate DeSimone
2022-06-08  1:12   ` Chiu, Chasel
2022-06-06 23:16 ` [edk2-platforms] [PATCH V2 3/4] CometlakeOpenBoardPkg: " Nate DeSimone
2022-06-08  1:12   ` Chiu, Chasel
2022-06-06 23:16 ` [edk2-platforms] [PATCH V2 4/4] TigerlakeOpenBoardPkg: " Nate DeSimone

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