From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-1.mimecast.com (us-smtp-1.mimecast.com [207.211.31.120]) by mx.groups.io with SMTP id smtpd.web11.22663.1574177460560701296 for ; Tue, 19 Nov 2019 07:31:00 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=Wgx0bzJ3; spf=pass (domain: redhat.com, ip: 207.211.31.120, mailfrom: msalter@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1574177459; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dic5YEd7p7EoGdra5OMejVNzt4SBCoud4TB5vt1leKM=; b=Wgx0bzJ3ivT7UBYz5ynC3AKZOh/6ZkR2BzMH2h6gaSSjkwzRnOCOs852mMNTr7ye/KUBEd /rKEH5U1H18nUX+vIS6LLGU40PUpWyV8q0KnqP6OpQ20LbvRHB0UoBVMTmnyi3aGux2v2o LXlfInnOw5O8WZ2ZerI1HRgjNCrOnQQ= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-23-29ltFBrjNAaOCcI1jA8WpQ-1; Tue, 19 Nov 2019 10:30:54 -0500 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6BCC3801FCB; Tue, 19 Nov 2019 15:30:46 +0000 (UTC) Received: from ovpn-124-164.rdu2.redhat.com (ovpn-124-164.rdu2.redhat.com [10.10.124.164]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9C12C58; Tue, 19 Nov 2019 15:30:45 +0000 (UTC) Message-ID: <997cc33b1e6fa9b70dfdae1024eaf51924fb4f5d.camel@redhat.com> Subject: Re: [edk2-devel] [platform/devel-riscv-v2 PATCHv5 11/18] FreedomU540HiFiveUnleashedBoard/OpensbiPlatformLib:OpenSBI platform lib From: "Mark Salter" To: devel@edk2.groups.io, abner.chang@hpe.com Cc: Michael D Kinney , Ard Biesheuvel , Leif Lindholm , Gilbert Chen , Palmer Dabbelt Date: Tue, 19 Nov 2019 10:30:45 -0500 In-Reply-To: <1572236433-15404-12-git-send-email-abner.chang@hpe.com> References: <1572236433-15404-1-git-send-email-abner.chang@hpe.com> <1572236433-15404-12-git-send-email-abner.chang@hpe.com> Organization: Red Hat, Inc User-Agent: Evolution 3.34.1 (3.34.1-1.fc31) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-MC-Unique: 29ltFBrjNAaOCcI1jA8WpQ-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Mon, 2019-10-28 at 12:20 +0800, Abner Chang wrote: > This is OpenSBI platform code implementation of U540 platform. >=20 > Signed-off-by: Abner Chang >=20 > Cc: Michael D Kinney > Cc: Ard Biesheuvel > Cc: Leif Lindholm > Cc: Gilbert Chen > Cc: Palmer Dabbelt > Signed-off-by: Abner Chang > --- > .../OpensbiPlatformLib/OpensbiPlatformLib.inf | 52 +++++ > .../Library/OpensbiPlatformLib/Platform.c | 213 +++++++++++++++= ++++++ > 2 files changed, 265 insertions(+) > create mode 100644 Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashe= dBoard/Library/OpensbiPlatformLib/OpensbiPlatformLib.inf > create mode 100644 Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashe= dBoard/Library/OpensbiPlatformLib/Platform.c >=20 > diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/= Library/OpensbiPlatformLib/OpensbiPlatformLib.inf > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Ope= nsbiPlatformLib/OpensbiPlatformLib.inf > new file mode 100644 > index 0000000..21710d4 > --- /dev/null > +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library= /OpensbiPlatformLib/OpensbiPlatformLib.inf > @@ -0,0 +1,52 @@ > +## @file > +# RISC-V OpenSBI Platform Library > +# This is the the library which provides platform > +# level opensbi functions follow RISC-V OpenSBI implementation. > +# > +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> +# > +# SPDX-License-Identifier: BSD-2-Clause-Patent > +# > +## > + > +[Defines] > + INF_VERSION =3D 0x0001001b > + BASE_NAME =3D RiscVOpensbiPlatformLib > + FILE_GUID =3D 80C09428-44DD-437F-8252-F7AB64711AA= 5 > + MODULE_TYPE =3D SEC > + VERSION_STRING =3D 1.0 > + LIBRARY_CLASS =3D RiscVOpensbiPlatformLib > + > +# > +# The following information is for reference only and not required by th= e build tools. > +# > +# VALID_ARCHITECTURES =3D RISCV64 > +# > + > +[Sources] > + Platform.c > + > +[Packages] > + EmbeddedPkg/EmbeddedPkg.dec > + MdeModulePkg/MdeModulePkg.dec > + MdePkg/MdePkg.dec > + Platform/SiFive/U5SeriesPkg/U5SeriesPkg.dec > + RiscVPlatformPkg/RiscVPlatformPkg.dec > + RiscVPkg/RiscVPkg.dec > + > +[LibraryClasses] > + BaseLib > + BaseMemoryLib > + DebugLib > + DebugAgentLib > + FdtLib > + PcdLib > + PrintLib > + RiscVCpuLib > + > +[FixedPcd] > + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId > + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount > + gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize > + > + gSiFiveU5SeriesPlatformsPkgTokenSpaceGuid.PcdU5UartBase > diff --git a/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/= Library/OpensbiPlatformLib/Platform.c > b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library/Ope= nsbiPlatformLib/Platform.c > new file mode 100644 > index 0000000..b9deec6 > --- /dev/null > +++ b/Platform/SiFive/U5SeriesPkg/FreedomU540HiFiveUnleashedBoard/Library= /OpensbiPlatformLib/Platform.c > @@ -0,0 +1,213 @@ > +/* > + * > + * Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> + * > + * SPDX-License-Identifier: BSD-2-Clause > + * > + * Copyright (c) 2019 Western Digital Corporation or its affiliates. > + * > + * Authors: > + * Atish Patra > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define U540_HART_COUNT FixedPcdGet32(PcdHartCount) > +#define U540_HART_STACK_SIZE FixedPcdGet32(PcdOpenSbiStackSize) > +#define U540_BOOT_HART_ID FixedPcdGet32(PcdBootHartId) > + > +#define U540_SYS_CLK 100000000 ^^^^^^^^^^ This should be 1000000000 1GHz, not 100MHz > + > +#define U540_PLIC_ADDR 0xc000000 > +#define U540_PLIC_NUM_SOURCES 0x35 > +#define U540_PLIC_NUM_PRIORITIES 7 > + > +#define U540_UART_ADDR FixedPcdGet32(PcdU5UartBase) > + > +#define U540_UART_BAUDRATE 115200 > + > +/** > + * The U540 SoC has 5 HARTs but HART ID 0 has only SMode. > + * HARTs 1 is selected as boot HART > + */ > +#ifndef U540_ENABLED_HART_MASK > +#define U540_ENABLED_HART_MASK (1 << U540_BOOT_HART_ID) > +#endif > + > +#define U540_HARTID_DISABLED ~(U540_ENABLED_HART_MASK) > + > +/* PRCI clock related macros */ > +//TODO: Do we need a separate driver for this ? > +#define U540_PRCI_BASE_ADDR 0x10000000 > +#define U540_PRCI_CLKMUXSTATUSREG 0x002C > +#define U540_PRCI_CLKMUX_STATUS_TLCLKSEL (0x1 << 1) > + > +static void U540_modify_dt(void *fdt) > +{ > + u32 i, size; > + int chosen_offset, err; > + int cpu_offset; > + char cpu_node[32] =3D ""; > + const char *mmu_type; > + > + for (i =3D 0; i < U540_HART_COUNT; i++) { > + sbi_sprintf(cpu_node, "/cpus/cpu@%d", i); > + cpu_offset =3D fdt_path_offset(fdt, cpu_node); > + mmu_type =3D fdt_getprop(fdt, cpu_offset, "mmu-type", NULL); > + if (mmu_type && (!AsciiStrCmp(mmu_type, "riscv,sv39") || > + !AsciiStrCmp(mmu_type,"riscv,sv48"))) > + continue; > + else > + fdt_setprop_string(fdt, cpu_offset, "status", "masked"); > + memset(cpu_node, 0, sizeof(cpu_node)); > + } > + size =3D fdt_totalsize(fdt); > + err =3D fdt_open_into(fdt, fdt, size + 256); > + if (err < 0) > + sbi_printf("Device Tree can't be expanded to accmodate new node"= ); > + > + chosen_offset =3D fdt_path_offset(fdt, "/chosen"); > + fdt_setprop_string(fdt, chosen_offset, "stdout-path", > + "/soc/serial@10010000:115200"); > + > + plic_fdt_fixup(fdt, "riscv,plic0"); > +} > + > +static int U540_final_init(bool cold_boot) > +{ > + void *fdt; > + > + if (!cold_boot) > + return 0; > + > + fdt =3D sbi_scratch_thishart_arg1_ptr(); > + U540_modify_dt(fdt); > + > + return 0; > +} > + > +static u32 U540_pmp_region_count(u32 hartid) > +{ > + return 1; > +} > + > +static int U540_pmp_region_info(u32 hartid, u32 index, > + ulong *prot, ulong *addr, ulong *log2size) > +{ > + int ret =3D 0; > + > + switch (index) { > + case 0: > + *prot =3D PMP_R | PMP_W | PMP_X; > + *addr =3D 0; > + *log2size =3D __riscv_xlen; > + break; > + default: > + ret =3D -1; > + break; > + }; > + > + return ret; > +} > + > +static int U540_console_init(void) > +{ > + unsigned long peri_in_freq; > + > + peri_in_freq =3D U540_SYS_CLK/2; > + return sifive_uart_init(U540_UART_ADDR, peri_in_freq, U540_UART_BAUD= RATE); > +} > + > +static int U540_irqchip_init(bool cold_boot) > +{ > + int rc; > + u32 hartid =3D sbi_current_hartid(); > + > + if (cold_boot) { > + rc =3D plic_cold_irqchip_init(U540_PLIC_ADDR, > + U540_PLIC_NUM_SOURCES, > + U540_HART_COUNT); > + if (rc) > + return rc; > + } > + > + return plic_warm_irqchip_init(hartid, > + (hartid) ? (2 * hartid - 1) : 0, > + (hartid) ? (2 * hartid) : -1); > +} > + > +static int U540_ipi_init(bool cold_boot) > +{ > + int rc; > + > + if (cold_boot) { > + rc =3D clint_cold_ipi_init(CLINT_REG_BASE_ADDR, > + U540_HART_COUNT); > + if (rc) > + return rc; > + > + } > + > + return clint_warm_ipi_init(); > +} > + > +static int U540_timer_init(bool cold_boot) > +{ > + int rc; > + > + if (cold_boot) { > + rc =3D clint_cold_timer_init(CLINT_REG_BASE_ADDR, > + U540_HART_COUNT); > + if (rc) > + return rc; > + } > + > + return clint_warm_timer_init(); > +} > + > +static int U540_system_down(u32 type) > +{ > + /* For now nothing to do. */ > + return 0; > +} > + > +const struct sbi_platform_operations platform_ops =3D { > + .pmp_region_count =3D U540_pmp_region_count, > + .pmp_region_info =3D U540_pmp_region_info, > + .final_init =3D U540_final_init, > + .console_putc =3D sifive_uart_putc, > + .console_getc =3D sifive_uart_getc, > + .console_init =3D U540_console_init, > + .irqchip_init =3D U540_irqchip_init, > + .ipi_send =3D clint_ipi_send, > + .ipi_clear =3D clint_ipi_clear, > + .ipi_init =3D U540_ipi_init, > + .timer_value =3D clint_timer_value, > + .timer_event_stop =3D clint_timer_event_stop, > + .timer_event_start =3D clint_timer_event_start, > + .timer_init =3D U540_timer_init, > + .system_reboot =3D U540_system_down, > + .system_shutdown =3D U540_system_down > +}; > + > +const struct sbi_platform platform =3D { > + .opensbi_version =3D OPENSBI_VERSION, // The= OpenSBI version this platform table is built bassed on. > + .platform_version =3D SBI_PLATFORM_VERSION(0x0001, 0x0000), // SBI= Platform version 1.0 > + .name =3D "SiFive Freedom U540", > + .features =3D SBI_PLATFORM_DEFAULT_FEATURES, > + .hart_count =3D U540_HART_COUNT, > + .hart_stack_size =3D U540_HART_STACK_SIZE, > + .disabled_hart_mask =3D U540_HARTID_DISABLED, > + .platform_ops_addr =3D (unsigned long)&platform_ops > +};