From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.56033.1674676412710265258 for ; Wed, 25 Jan 2023 11:53:32 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: thomas.abraham@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4AB2D4B3; Wed, 25 Jan 2023 11:54:13 -0800 (PST) Received: from [10.57.75.31] (unknown [10.57.75.31]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B87AA3F64C; Wed, 25 Jan 2023 11:53:30 -0800 (PST) Message-ID: <9b511d96-6c9d-ab61-56dd-a4826961acc2@arm.com> Date: Wed, 25 Jan 2023 19:53:29 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [edk2-devel] [edk2-platforms][PATCH V1 1/1] Platform/ARM/N1Sdp: Modify IRQ ID of Debug UART and routing to IOFPGA UART1 To: devel@edk2.groups.io, sahil@arm.com Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar References: <20230106060915.3050046-1-sahil@arm.com> From: "Thomas Abraham" In-Reply-To: <20230106060915.3050046-1-sahil@arm.com> Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Sahil, On 06/01/2023 06:09, sahil via groups.io wrote: > From: Himanshu Sharma > > In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the > IPI0 trigger method to "level", which prevented SGI0 to be enabled > again after a CPU offline/online cycle. > > This patch fixes the above issue by assigning a reserved IRQ ID > for the Debug UART, other than 0 and also routing it to use IOFPGA > UART1 by unsharing it from currently using serial terminal. > > Signed-off-by: Himanshu Sharma > --- > Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 8 ++++---- > Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 2 +- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > index d04b22d3ef51..676ab677257a 100644 > --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc > @@ -4,7 +4,7 @@ > # This provides platform specific component descriptions and libraries that > > # conform to EFI/Framework standards. > > # > > -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> > +# Copyright (c) 2018 - 2023, ARM Limited. All rights reserved.
> > # > > # SPDX-License-Identifier: BSD-2-Clause-Patent > > # > > @@ -136,9 +136,9 @@ [PcdsFixedAtBuild.common] > gArmPlatformTokenSpaceGuid.PL011UartInterrupt|95 > > > > # PL011 Serial Debug UART (DBG2) > > - gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase > > - gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate > > - gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|50000000 > > + gArmPlatformTokenSpaceGuid.PcdSerialDbgRegisterBase|0x1C0A0000 > > + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartBaudRate|115200 > > + gArmPlatformTokenSpaceGuid.PcdSerialDbgUartClkInHz|24000000 > > > > # SBSA Watchdog > > gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93 > > diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > index b11c0425fe25..44046a0026bb 100644 > --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c > @@ -320,7 +320,7 @@ EDKII_PLATFORM_REPOSITORY_INFO N1sdpRepositoryInfo = { > // Debug Serial Port > > { > > FixedPcdGet64 (PcdSerialDbgRegisterBase), // BaseAddress > > - 0, // Interrupt -unused > > + 250, // Interrupt (reserved) I have not looked into ConfigurationManager but why would IRQ number be mandatory for debug UART? Isn't there a way to just avoid specifying a interrupt number? Thanks, Thomas. > > FixedPcdGet64 (PcdSerialDbgUartBaudRate), // BaudRate > > FixedPcdGet32 (PcdSerialDbgUartClkInHz), // Clock > > EFI_ACPI_DBG2_PORT_SUBTYPE_SERIAL_ARM_PL011_UART // Port subtype >