From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from hqemgate14.nvidia.com (hqemgate14.nvidia.com [216.228.121.143]) by mx.groups.io with SMTP id smtpd.web12.7021.1570640523240876128 for ; Wed, 09 Oct 2019 10:02:03 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@nvidia.com header.s=n1 header.b=h8IP2p4+; spf=pass (domain: nvidia.com, ip: 216.228.121.143, mailfrom: ashishsingha@nvidia.com) Received: from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 09 Oct 2019 10:02:06 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate102.nvidia.com (PGP Universal service); Wed, 09 Oct 2019 10:02:02 -0700 X-PGP-Universal: processed; by hqpgpgate102.nvidia.com on Wed, 09 Oct 2019 10:02:02 -0700 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 9 Oct 2019 17:02:02 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL111.nvidia.com (172.20.187.18) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 9 Oct 2019 17:02:02 +0000 Received: from ashishsingha-lnx.nvidia.com (Not Verified[10.28.48.147]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 09 Oct 2019 10:02:01 -0700 From: "Ashish Singhal" To: , , CC: Ashish Singhal Subject: [PATCH] MdeModulePkg/XhciDxe: Fix Aligned Page Allocation Date: Wed, 9 Oct 2019 11:01:57 -0600 Message-ID: <9ce268553db91fbe7fb13e2205d0e1611e1d0212.1570640221.git.ashishsingha@nvidia.com> X-Mailer: git-send-email 2.7.4 X-NVConfidentiality: public Return-Path: ashishsingha@nvidia.com MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1570640526; bh=+5WXL4U3+ADEctBsQAUVRMfIyZ7wQbk1HxSYWfeCP4A=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=h8IP2p4+7pgacHqw5W1If/8iL8fXlJiLWAko7Bl5fPj9zrhoIq6WCSRimwvgH3B9h fVxq7pte5517T1NxNvbs96SP8l8fQoCgnibFHXWdNktiUdBOTPc9TXChDof6b+TvH0 kOFMixM1JaHZd/TbIuq0A5Z2Fu/FuuPCbasIg3pXUBxjvKWtth35FpQXbLfWqpQzFN AkBuIxOM3bdhbEapTJ7a2DSoblrBsCjU7MsN1VXD5aXAlhG5xUr3Nx9QWsAp5DAcLQ tmh/D0NBVhO5jHSlF8lNF7dcLsk5Iqd0MJSUm2I378cL7xt9++EeZYj5STZnOBXYFm F91j0LjsIbfRw== Content-Type: text/plain While allocating pages aligned at an alignment higher than 4K, allocate memory taking into consideration the padding required for that alignment. The calls to free pages takes care of this already. Signed-off-by: Ashish Singhal --- MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c index fd79988..aa69c47 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/UsbHcMem.c @@ -656,7 +656,7 @@ UsbHcAllocateAlignedPages ( PciIo, AllocateAnyPages, EfiBootServicesData, - Pages, + RealPages, &Memory, 0 ); -- 2.7.4