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From: Laszlo Ersek <lersek@redhat.com>
To: "Marc-André Lureau" <marcandre.lureau@gmail.com>,
	edk2-devel@lists.01.org
Cc: Chao Zhang <chao.b.zhang@intel.com>,
	michael.d.kinney@intel.com, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: TCG MOR and processor caches
Date: Thu, 27 Sep 2018 13:45:17 +0200	[thread overview]
Message-ID: <9d023afc-13c9-d0a2-5bb4-dd889349f8ed@redhat.com> (raw)
In-Reply-To: <CAJ+F1C+83xPvG=uOq07JyiRz5+u_i-Ar0CTLxf2mJxo9yRYfrQ@mail.gmail.com>

On 09/27/18 12:59, Marc-André Lureau wrote:
> Hi,
> 
> According to "TCG Platform Reset Attack Mitigation Specification", if
> MOR bit is set, "it must initiate a vendor-specific method that
> overwrites all of system memory and the processor caches"
> 
> In QuarkPlatformPkg/Platform/Pei/PlatformInit/MemoryCallback.c and
> QuarkPlatformPkg/Platform/Pei/PlatformInit/MrcWrapper.c, there is some
> code to clear RAM, however I don't see code that would clear the
> processor caches.
> 
> For edk2/qemu, Paolo suggested it may be simpler to clear the cache
> unconditionally. How would you implement that? Using
> EFI_CPU_ARCH_PROTOCOL.FlushDataCache? (or direct AsmWbinvd call)

I would call the appropriate low-level BaseLib.h function somewhere in
OvmfPkg/PlatformPei (unconditionally, yes). I haven't looked into
AsmWbinvd(), but if that's the right function, call that. (Checking the
Intel SDM re: WBINVD, I agree it could be the right one.)

Laszlo


  reply	other threads:[~2018-09-27 11:45 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-09-27 10:59 TCG MOR and processor caches Marc-André Lureau
2018-09-27 11:45 ` Laszlo Ersek [this message]
2018-09-27 15:21   ` Laszlo Ersek

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