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Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib To: Gerd Hoffmann , "Ni, Ray" Cc: "Wu, Jiaxin" , "devel@edk2.groups.io" , "Zeng, Star" , "Kumar, Rahul R" , "Dong, Guo" , "Rhodes, Sean" , "Lu, James" , "Guo, Gua" , Ard Biesheuvel , "Yao, Jiewen" , Abdul Lateef Attar , Abner Chang References: <17C74D78B0B952AD.15491@groups.io> <3v4gqem2libtqyxyw6gzuqrifjxurj7lahdbrfn4474fvgkit2@kojgaroebe3o> <4p5no7tieltk7n2p4mzkuy2ypd2kkxdwxs6lsfnwlrlucosmba@zs5cfcjhfz5y> <4fngcjpmyqnzyp6bh3ycylan2a3k4s4sy2tktankxor4eqnjth@txcoonsfhsmt> From: "Lendacky, Thomas via groups.io" In-Reply-To: <4fngcjpmyqnzyp6bh3ycylan2a3k4s4sy2tktankxor4eqnjth@txcoonsfhsmt> X-ClientProxiedBy: SA0PR11CA0075.namprd11.prod.outlook.com (2603:10b6:806:d2::20) To BL1PR12MB5732.namprd12.prod.outlook.com (2603:10b6:208:387::17) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL1PR12MB5732:EE_|LV3PR12MB9402:EE_ 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devel+owner@edk2.groups.io Resent-Date: Fri, 26 Apr 2024 06:18:40 -0700 Resent-From: thomas.lendacky@amd.com Reply-To: devel@edk2.groups.io,thomas.lendacky@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: ceyQWjXW1wOo2W1AjGNzEqUcx7686176AA= Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=AFZZraB9; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=pass (policy=none) header.from=groups.io On 4/25/24 01:58, Gerd Hoffmann wrote: > Hi, >=20 >> That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not >> sure what the value is for AMD32 processor. Maybe 0 according to the >> OVMF logic. >=20 > The smm emulation in the linux kernel uses 0 and 0x64. >=20 >> But, I am very suspicious about the logic in AMD's version as below: >> --- AMD's version >> SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32B= IT; >> >> LMAValue =3D (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA; >> if (LMAValue) { >> SmmSaveStateRegisterLma =3D (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_6= 4BIT; >> } >> --- >> The above logic detects the current CPU mode and 64bit save state area l= ayout is used if it's running in 64bit. >=20 >> But if a AMD64 CPU runs in 32bit mode, the above logic causes the >> 32bit save state area layout is used. It's not right! The save state >> area layout does not depend on the CPU running mode, but whether it's >> a legacy CPU or a 64-capable CPU. >=20 > Well, that is not entirely clear to me. Could it be 64-bit processors > support both 32-bit and 64-bit format, for backward compatibility > reasons? >=20 > So OvmfPkgIa32 builds could use the 32-bit format, OvmfPkgX64 builds use > the 64-bit format, everything works fine? >=20 > The tricky corner case is OvmfPkgIa32X64, where (after applying this > series) 32-bit PEI should setup things for 64-bit SMM/DXE, and checking > the current processor mode will not give use the result we need. >=20 >> Jiaxin, I agree that the confusion should be cleaned up by AMD >> experts. Let's not change any existing behavior. >=20 > Agree. Tom? I don't have a lot of experience with SMM. I believe Paolo first ported=20 over the support into OVMF and might have more insight? I'll try to take a look at it when I can, but maybe @Abner or @Abdul might= =20 have more understanding of SMM with which they can comment. Thanks, Tom >=20 > take care, > Gerd >=20 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118340): https://edk2.groups.io/g/devel/message/118340 Mute This Topic: https://groups.io/mt/105593568/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-