* [PATCH edk2-platforms 0/3] synquacer multi-uart support
@ 2018-12-26 13:25 Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Ard Biesheuvel
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Ard Biesheuvel @ 2018-12-26 13:25 UTC (permalink / raw)
To: edk2-devel
Expose the secondary UART also via the ACPI tables (not just via the DT),
and add conditional support for using it for DEBUG output in UEFI.
Ard Biesheuvel (3):
Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base
Silicon/SynQuacer/AcpiTables: expose second UART to the OS
Silicon/SynQuacer: add support for DEBUG output on second UART
.../Socionext/DeveloperBox/DeveloperBox.dsc | 42 ++++++++++++++++---
.../SynQuacer/AcpiTables/AcpiTables.inf | 1 -
.../SynQuacer/Include/Platform/MemoryMap.h | 8 ++++
.../SynQuacerMemoryInitPeiLib.c | 3 ++
.../Socionext/SynQuacer/AcpiTables/Dsdt.asl | 21 +++++++++-
.../Socionext/SynQuacer/AcpiTables/Spcr.aslc | 3 +-
6 files changed, 70 insertions(+), 8 deletions(-)
--
2.19.2
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base
2018-12-26 13:25 [PATCH edk2-platforms 0/3] synquacer multi-uart support Ard Biesheuvel
@ 2018-12-26 13:25 ` Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 2/3] Silicon/SynQuacer/AcpiTables: expose second UART to the OS Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART Ard Biesheuvel
2 siblings, 0 replies; 7+ messages in thread
From: Ard Biesheuvel @ 2018-12-26 13:25 UTC (permalink / raw)
To: edk2-devel
Instead of using the generic PcdSerialRegisterBase PCD for generating
the DSDT object for the PL011 UART, add PL011 base and size #defines
to the memory map header file, and use those instead. This will allow
us to switch to a different UART for DEBUG and/or serial console output
in a future patch.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf | 1 -
Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++++
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 2 +-
Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc | 3 ++-
4 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
index afee50df5c63..6fbdf4d67a88 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/AcpiTables.inf
@@ -59,7 +59,6 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultCreatorRevision
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
gSynQuacerTokenSpaceGuid.PcdNetsecEepromBase
gSynQuacerTokenSpaceGuid.PcdNetsecPhyAddress
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index fff760477488..28d4afabd2c8 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -72,4 +72,8 @@
#define SYNQUACER_MMIO_TIMER_CTL_BASE 0x2A810000
#define SYNQUACER_MMIO_TIMER_CNT_BASE0 0x2A830000
+// PL011 UART
+#define SYNQUACER_UART0_BASE 0x2A400000
+#define SYNQUACER_UART0_SIZE SIZE_4KB
+
#endif
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index 7c7677f1fea0..ddb456d1dc70 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -137,7 +137,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
Name (_HID, "ARMH0011")
Name (_UID, Zero)
Name (_CRS, ResourceTemplate () {
- Memory32Fixed (ReadWrite, FixedPcdGet32 (PcdSerialRegisterBase), 0x1000)
+ Memory32Fixed (ReadWrite, SYNQUACER_UART0_BASE, SYNQUACER_UART0_SIZE)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 95 }
})
}
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc b/Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc
index 699e79e1bf59..c549a9781c8c 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Spcr.aslc
@@ -19,6 +19,7 @@
#include <IndustryStandard/Acpi61.h>
#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
+#include <Platform/MemoryMap.h>
#include "AcpiTables.h"
@@ -47,7 +48,7 @@ STATIC EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE Spcr = {
32,
0,
EFI_ACPI_5_1_DWORD,
- FixedPcdGet32 (PcdSerialRegisterBase)
+ SYNQUACER_UART0_BASE
},
//
// InterruptType
--
2.19.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH edk2-platforms 2/3] Silicon/SynQuacer/AcpiTables: expose second UART to the OS
2018-12-26 13:25 [PATCH edk2-platforms 0/3] synquacer multi-uart support Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Ard Biesheuvel
@ 2018-12-26 13:25 ` Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART Ard Biesheuvel
2 siblings, 0 replies; 7+ messages in thread
From: Ard Biesheuvel @ 2018-12-26 13:25 UTC (permalink / raw)
To: edk2-devel
Align the DSDT with the device tree, which already exposes the second
UART to the OS. Since existing OSes will not support the SCX0006 HID
(which has only been allocated very recently), expose the DesignWare
FUART with a compatible ID (CID) of 'HISI0031', which is associated
with the same driver in Linux since at least release v4.9.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h | 4 ++++
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 19 +++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
index 28d4afabd2c8..b0fcc306c1ae 100644
--- a/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
+++ b/Silicon/Socionext/SynQuacer/Include/Platform/MemoryMap.h
@@ -76,4 +76,8 @@
#define SYNQUACER_UART0_BASE 0x2A400000
#define SYNQUACER_UART0_SIZE SIZE_4KB
+// DesignWare FUART
+#define SYNQUACER_UART1_BASE 0x51040000
+#define SYNQUACER_UART1_SIZE SIZE_4KB
+
#endif
diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index ddb456d1dc70..aab4fbf0e6b4 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -142,6 +142,25 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
})
}
+ // DesignWare FUART
+ Device (COM1) {
+ Name (_HID, "SCX0006")
+ Name (_CID, "HISI0031")
+ Name (_UID, Zero)
+ Name (_CRS, ResourceTemplate () {
+ Memory32Fixed (ReadWrite, SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE)
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 200 }
+ })
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "clock-frequency", 62500000 },
+ Package () { "reg-io-width", 4 },
+ Package () { "reg-shift", 2 },
+ }
+ })
+ }
+
Device (NET0) {
Name (_HID, "SCX0001")
Name (_UID, Zero)
--
2.19.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART
2018-12-26 13:25 [PATCH edk2-platforms 0/3] synquacer multi-uart support Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 2/3] Silicon/SynQuacer/AcpiTables: expose second UART to the OS Ard Biesheuvel
@ 2018-12-26 13:25 ` Ard Biesheuvel
2019-01-11 17:58 ` Leif Lindholm
2 siblings, 1 reply; 7+ messages in thread
From: Ard Biesheuvel @ 2018-12-26 13:25 UTC (permalink / raw)
To: edk2-devel
On headless server systems where the PL011 serial port is the primary
console, having DEBUG output on the same port can be annoying, since
DEBUG output gets lost when the console driver clears the screen or
positions the cursor using control characters.
So add the ability to emit the DEBUG output on the DesignWare FUART
(which is exposed via the LS connector on DeveloperBox)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 42 +++++++++++++++++---
Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 3 ++
2 files changed, 40 insertions(+), 5 deletions(-)
diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
index ed11aed798b7..da450a132798 100644
--- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
+++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
@@ -28,6 +28,8 @@
FLASH_DEFINITION = Platform/Socionext/DeveloperBox/DeveloperBox.fdf
BUILD_NUMBER = 1
+ DEFINE DEBUG_ON_UART1 = FALSE
+
[BuildOptions]
RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=0
@@ -120,9 +122,17 @@
DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
- SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+!if $(DEBUG_ON_UART1) == FALSE
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+!else
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+ PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+ PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
+ PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+!endif
+
HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
@@ -253,13 +263,26 @@
!endif
## PL011 - Serial Terminal
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
gArmPlatformTokenSpaceGuid.PL011UartInteger|0
gArmPlatformTokenSpaceGuid.PL011UartFractional|0
gArmPlatformTokenSpaceGuid.PL011UartClkInHz|62500000
+ ## DesignWare FUART
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|62500000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
+
+ ## Shared UART settings
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+
+!if $(DEBUG_ON_UART1) == FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
+!else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x51040000
+!endif
+
#
# ARM Generic Interrupt Controller
#
@@ -505,7 +528,16 @@
}
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf {
+!if $(DEBUG_ON_UART1) == TRUE
+ <PcdsFixedAtBuild>
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
+ <LibraryClasses>
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+ # suppress debug output from SerialDxe itself which would go to the PL011
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ }
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
index 1402ecafce4a..e68997e05573 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
@@ -118,6 +118,9 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
// NETSEC/eMMC SMMU
ARM_DEVICE_REGION (SYNQUACER_SCB_SMMU_BASE, SYNQUACER_SCB_SMMU_SIZE),
+
+ // DesignWare FUART
+ ARM_DEVICE_REGION (SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE),
};
STATIC
--
2.19.2
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART
2018-12-26 13:25 ` [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART Ard Biesheuvel
@ 2019-01-11 17:58 ` Leif Lindholm
2019-01-12 18:18 ` Mark Kettenis
0 siblings, 1 reply; 7+ messages in thread
From: Leif Lindholm @ 2019-01-11 17:58 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, masahisa.kojima
On Wed, Dec 26, 2018 at 02:25:30PM +0100, Ard Biesheuvel wrote:
> On headless server systems where the PL011 serial port is the primary
> console, having DEBUG output on the same port can be annoying, since
> DEBUG output gets lost when the console driver clears the screen or
> positions the cursor using control characters.
>
> So add the ability to emit the DEBUG output on the DesignWare FUART
> (which is exposed via the LS connector on DeveloperBox)
>From what I can tell, the DesignWare component is 8250-compatible, yet
here we're using the 16550 driver. I presume this makes no difference
for how we're using it, but could you add a comment to this effect to
the commit message? (If the FUART is indeed a 16550 clone, please add
a statement to that effect instead.)
With that, for the series:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 42 +++++++++++++++++---
> Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c | 3 ++
> 2 files changed, 40 insertions(+), 5 deletions(-)
>
> diff --git a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> index ed11aed798b7..da450a132798 100644
> --- a/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> +++ b/Platform/Socionext/DeveloperBox/DeveloperBox.dsc
> @@ -28,6 +28,8 @@
> FLASH_DEFINITION = Platform/Socionext/DeveloperBox/DeveloperBox.fdf
> BUILD_NUMBER = 1
>
> + DEFINE DEBUG_ON_UART1 = FALSE
> +
> [BuildOptions]
> RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=0
>
> @@ -120,9 +122,17 @@
> DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
> DebugAgentTimerLib|EmbeddedPkg/Library/DebugAgentTimerLibNull/DebugAgentTimerLibNull.inf
> PL011UartClockLib|ArmPlatformPkg/Library/PL011UartClockLib/PL011UartClockLib.inf
> - SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
>
> +!if $(DEBUG_ON_UART1) == FALSE
> + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> +!else
> + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
> + PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
> + PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
> + PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
> +!endif
> +
> HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
> TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
>
> @@ -253,13 +263,26 @@
> !endif
>
> ## PL011 - Serial Terminal
> - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
> - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
> gArmPlatformTokenSpaceGuid.PL011UartInteger|0
> gArmPlatformTokenSpaceGuid.PL011UartFractional|0
> gArmPlatformTokenSpaceGuid.PL011UartClkInHz|62500000
>
> + ## DesignWare FUART
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio|TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl|FALSE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate|62500000
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride|4
> +
> + ## Shared UART settings
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|115200
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
> +
> +!if $(DEBUG_ON_UART1) == FALSE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
> +!else
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x51040000
> +!endif
> +
> #
> # ARM Generic Interrupt Controller
> #
> @@ -505,7 +528,16 @@
> }
>
> MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
> - MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
> + MdeModulePkg/Universal/SerialDxe/SerialDxe.inf {
> +!if $(DEBUG_ON_UART1) == TRUE
> + <PcdsFixedAtBuild>
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x2a400000
> + <LibraryClasses>
> + SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
> + # suppress debug output from SerialDxe itself which would go to the PL011
> + DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
> +!endif
> + }
> MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
> MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
> MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
> diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> index 1402ecafce4a..e68997e05573 100644
> --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerMemoryInitPeiLib/SynQuacerMemoryInitPeiLib.c
> @@ -118,6 +118,9 @@ STATIC CONST ARM_MEMORY_REGION_DESCRIPTOR mVirtualMemoryTable[] = {
>
> // NETSEC/eMMC SMMU
> ARM_DEVICE_REGION (SYNQUACER_SCB_SMMU_BASE, SYNQUACER_SCB_SMMU_SIZE),
> +
> + // DesignWare FUART
> + ARM_DEVICE_REGION (SYNQUACER_UART1_BASE, SYNQUACER_UART1_SIZE),
> };
>
> STATIC
> --
> 2.19.2
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART
2019-01-11 17:58 ` Leif Lindholm
@ 2019-01-12 18:18 ` Mark Kettenis
2019-01-14 23:18 ` Ard Biesheuvel
0 siblings, 1 reply; 7+ messages in thread
From: Mark Kettenis @ 2019-01-12 18:18 UTC (permalink / raw)
To: Leif Lindholm; +Cc: ard.biesheuvel, edk2-devel
> Date: Fri, 11 Jan 2019 17:58:44 +0000
> From: Leif Lindholm <leif.lindholm@linaro.org>
>
> On Wed, Dec 26, 2018 at 02:25:30PM +0100, Ard Biesheuvel wrote:
> > On headless server systems where the PL011 serial port is the primary
> > console, having DEBUG output on the same port can be annoying, since
> > DEBUG output gets lost when the console driver clears the screen or
> > positions the cursor using control characters.
> >
> > So add the ability to emit the DEBUG output on the DesignWare FUART
> > (which is exposed via the LS connector on DeveloperBox)
>
> >From what I can tell, the DesignWare component is 8250-compatible, yet
> here we're using the 16550 driver. I presume this makes no difference
> for how we're using it, but could you add a comment to this effect to
> the commit message? (If the FUART is indeed a 16550 clone, please add
> a statement to that effect instead.)
The DesignWare component is (largely) 16550-compatible. But the
FIFO's are optional and if they're not included you'll end up with
something that's probably closer to an 16450. I suspect in most cases
SoC designers will include the FIFO's though since without them you
really can't use the port at anything but the slowest speeds.
Cheers,
Mark
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART
2019-01-12 18:18 ` Mark Kettenis
@ 2019-01-14 23:18 ` Ard Biesheuvel
0 siblings, 0 replies; 7+ messages in thread
From: Ard Biesheuvel @ 2019-01-14 23:18 UTC (permalink / raw)
To: Mark Kettenis; +Cc: Leif Lindholm, edk2-devel@lists.01.org
On Sat, 12 Jan 2019 at 19:25, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> > Date: Fri, 11 Jan 2019 17:58:44 +0000
> > From: Leif Lindholm <leif.lindholm@linaro.org>
> >
> > On Wed, Dec 26, 2018 at 02:25:30PM +0100, Ard Biesheuvel wrote:
> > > On headless server systems where the PL011 serial port is the primary
> > > console, having DEBUG output on the same port can be annoying, since
> > > DEBUG output gets lost when the console driver clears the screen or
> > > positions the cursor using control characters.
> > >
> > > So add the ability to emit the DEBUG output on the DesignWare FUART
> > > (which is exposed via the LS connector on DeveloperBox)
> >
> > >From what I can tell, the DesignWare component is 8250-compatible, yet
> > here we're using the 16550 driver. I presume this makes no difference
> > for how we're using it, but could you add a comment to this effect to
> > the commit message? (If the FUART is indeed a 16550 clone, please add
> > a statement to that effect instead.)
>
> The DesignWare component is (largely) 16550-compatible. But the
> FIFO's are optional and if they're not included you'll end up with
> something that's probably closer to an 16450. I suspect in most cases
> SoC designers will include the FIFO's though since without them you
> really can't use the port at anything but the slowest speeds.
>
Thanks Mark
Series pushed as e6fd447b23b6..307f7f5bfc4f (with Mark's clarification
added to the commit log of 3/3)
^ permalink raw reply [flat|nested] 7+ messages in thread
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Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-12-26 13:25 [PATCH edk2-platforms 0/3] synquacer multi-uart support Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 1/3] Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 2/3] Silicon/SynQuacer/AcpiTables: expose second UART to the OS Ard Biesheuvel
2018-12-26 13:25 ` [PATCH edk2-platforms 3/3] Silicon/SynQuacer: add support for DEBUG output on second UART Ard Biesheuvel
2019-01-11 17:58 ` Leif Lindholm
2019-01-12 18:18 ` Mark Kettenis
2019-01-14 23:18 ` Ard Biesheuvel
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