Re: [PATCH] UefiCpuPkg/LocalApicLib: Exclude second SendIpi sequence on AMD processors.

[Andrew Fish <afish@apple.com>]

> On Jun 14, 2018, at 7:08 AM, Duran, Leo <leo.duran@amd.com> wrote:
> 
> 
> 
>> -----Original Message-----
>> From: Laszlo Ersek <lersek@redhat.com <mailto:lersek@redhat.com>>
>> Sent: Wednesday, June 13, 2018 3:50 PM
>> To: Duran, Leo <leo.duran@amd.com <mailto:leo.duran@amd.com>>; edk2-devel@lists.01.org <mailto:edk2-devel@lists.01.org>
>> Cc: Jordan Justen <jordan.l.justen@intel.com <mailto:jordan.l.justen@intel.com>>; Jeff Fan
>> <jeff.fan@intel.com <mailto:jeff.fan@intel.com>>; Liming Gao <liming.gao@intel.com <mailto:liming.gao@intel.com>>; Singh, Brijesh
>> <brijesh.singh@amd.com <mailto:brijesh.singh@amd.com>>; Paolo Bonzini <pbonzini@redhat.com <mailto:pbonzini@redhat.com>>; Igor
>> Mammedov <imammedo@redhat.com <mailto:imammedo@redhat.com>>
>> Subject: Re: [edk2] [PATCH] UefiCpuPkg/LocalApicLib: Exclude second
>> SendIpi sequence on AMD processors.
>> 
>> Hello Leo,
>> 
>> On 06/13/18 22:11, Leo Duran wrote:
>>> On AMD processors the second SendIpi in the SendInitSipiSipi and
>>> SendInitSipiSipiAllExcludingSelf routines is not required, and may
>>> cause undesired side-effects during MP initialization.
>>> 
>>> This patch leverages the StandardSignatureIsAuthenticAMD check to
>>> exclude the second SendIpi and its associated MicroSecondDelay (200).
>> 
>> QEMU and KVM emulate some AMD processors too; of particular interest is
>> the recent EPYC addition, I believe (for SME/SEV, minimally).
>> 
>> Did you check whether the StandardSignatureIsAuthenticAMD() check
>> applies to those QEMU VCPU models, and if so, whether omitting the second
>> Startup IPI interferes with *V*CPU startup in OVMF guests? (In
>> multiprocessing modules, such as CpuMpPei, CpuDxe, and
>> PiSmmCpuDxeSmm.)
>> 
>> Adding Brijesh, Paolo and Igor.
>> 
>> Thanks!
>> Laszlo
> 
> Hi Lazlo,
> 
> My understanding is that hypervisors simply ignore the second SIPI, so a single (or double) SIPI should be fine.
> In any event, I'm checking with Brijesh on your specific question.
> 

My understanding is the 2nd SIPI was for an Intel processor bug in the mid 1990's and it has not been required since. People are just scared to change it since all the Operating Systems have been historically validated against INT SIPI SIPI. 

One of my co-works removed our extra SIPI, not knowing the history, and everything worked. Well we booted a little faster without the extra SIPI. 

If people still have the compatibility concern can we make the 2nd SIPI configurable via a PCD. But given the StandardSignatureIsAuthenticAMD() data point we should default the 2nd SIPI to off and move the world forward? What do folks think?

Thanks,

Andrew Fish

PS If I'm remembering correctly Mark Doran (of UEFI Fame) help lead the MP Spec back in the 1990s that 1st documented the INIT SIPI SIPI so we could get some more history from him if needed. 

> Leo.
> 
>> 
>>> 
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Leo Duran <leo.duran@amd.com>
>>> Cc: Jordan Justen <jordan.l.justen@intel.com>
>>> Cc: Jeff Fan <jeff.fan@intel.com>
>>> Cc: Liming Gao <liming.gao@intel.com>
>>> ---
>>> UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c             | 12 ++++++++----
>>> UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 12
>>> ++++++++----
>>> 2 files changed, 16 insertions(+), 8 deletions(-)
>>> 
>>> diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> index b0b7e32..6e80536 100644
>>> --- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> +++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
>>> @@ -554,8 +554,10 @@ SendInitSipiSipi (
>>>   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>>>   IcrLow.Bits.Level = 1;
>>>   SendIpi (IcrLow.Uint32, ApicId);
>>> -  MicroSecondDelay (200);
>>> -  SendIpi (IcrLow.Uint32, ApicId);
>>> +  if (!StandardSignatureIsAuthenticAMD()) {
>>> +    MicroSecondDelay (200);
>>> +    SendIpi (IcrLow.Uint32, ApicId);
>>> +  }
>>> }
>>> 
>>> /**
>>> @@ -588,8 +590,10 @@ SendInitSipiSipiAllExcludingSelf (
>>>   IcrLow.Bits.Level = 1;
>>>   IcrLow.Bits.DestinationShorthand =
>> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>>>   SendIpi (IcrLow.Uint32, 0);
>>> -  MicroSecondDelay (200);
>>> -  SendIpi (IcrLow.Uint32, 0);
>>> +  if (!StandardSignatureIsAuthenticAMD()) {
>>> +    MicroSecondDelay (200);
>>> +    SendIpi (IcrLow.Uint32, 0);
>>> +  }
>>> }
>>> 
>>> /**
>>> diff --git
>>> a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
>>> b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
>>> index 1f4dcf7..5d82836 100644
>>> --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
>>> +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
>>> @@ -649,8 +649,10 @@ SendInitSipiSipi (
>>>   IcrLow.Bits.DeliveryMode = LOCAL_APIC_DELIVERY_MODE_STARTUP;
>>>   IcrLow.Bits.Level = 1;
>>>   SendIpi (IcrLow.Uint32, ApicId);
>>> -  MicroSecondDelay (200);
>>> -  SendIpi (IcrLow.Uint32, ApicId);
>>> +  if (!StandardSignatureIsAuthenticAMD()) {
>>> +    MicroSecondDelay (200);
>>> +    SendIpi (IcrLow.Uint32, ApicId);
>>> +  }
>>> }
>>> 
>>> /**
>>> @@ -683,8 +685,10 @@ SendInitSipiSipiAllExcludingSelf (
>>>   IcrLow.Bits.Level = 1;
>>>   IcrLow.Bits.DestinationShorthand =
>> LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF;
>>>   SendIpi (IcrLow.Uint32, 0);
>>> -  MicroSecondDelay (200);
>>> -  SendIpi (IcrLow.Uint32, 0);
>>> +  if (!StandardSignatureIsAuthenticAMD()) {
>>> +    MicroSecondDelay (200);
>>> +    SendIpi (IcrLow.Uint32, 0);
>>> +  }
>>> }
>>> 
>>> /**
>>> 
> 
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