* [edk2-devel] [PATCH v2 01/11] MdePkg: MADT: Add Online capable flag in GICC
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 02/11] MdePkg: MADT: Add TRBE interrupt to GICC Sami Mujawar
` (10 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, ardb+tianocore, quic_llindhol, michael.d.kinney,
gaoliming, zhiguang.liu, zhichao.gao, pierre.gondois,
Anshuman.Khandual, Matteo.Carlini, Akanksha.Jain2, Sibel.Allinson,
jeshuas, nd
Bugzilla: 3706 'Code First - MADT GICC new flags'
On ARM systems physical CPU hotplug is not supported.
All CPUs are considered present and this is true
throughout the system uptime.
The ECR 2285 introduces a new 'online-capable' flag
in the GICC structure flags in ACPI 6.5, to signal
firmware policy (CPU is not enabled but it can be
enabled and onlined). This enables OSPM to support
virtual CPU hotplug (on virtual platforms for
instance).
This ECR also updates the MADT table revision to 6
to reflect the ACPI 6.5 changes. Therefore, update
the MADT table revision to match the value as
specified in ACPI 6.5.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
MdePkg/Include/IndustryStandard/Acpi65.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MdePkg/Include/IndustryStandard/Acpi65.h b/MdePkg/Include/IndustryStandard/Acpi65.h
index 6caadf2404984aa472f748293b8e80dd120f280c..9e2828bc048bcd9b2bf0529d00bdaf8bf04bf543 100644
--- a/MdePkg/Include/IndustryStandard/Acpi65.h
+++ b/MdePkg/Include/IndustryStandard/Acpi65.h
@@ -2,7 +2,7 @@
ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022.
Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
- Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2019 - 2023, ARM Ltd. All rights reserved.<BR>
Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -533,6 +533,7 @@ typedef struct {
#define EFI_ACPI_6_5_GIC_ENABLED BIT0
#define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL BIT1
#define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2
+#define EFI_ACPI_6_5_GIC_ONLINE_CAPABLE BIT3
///
/// GIC Distributor Structure
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 02/11] MdePkg: MADT: Add TRBE interrupt to GICC
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 01/11] MdePkg: MADT: Add Online capable flag in GICC Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 03/11] DynamicTablesPkg: Add TRBE interrupt to GICC object Sami Mujawar
` (9 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, ardb+tianocore, quic_llindhol, michael.d.kinney,
gaoliming, zhiguang.liu, zhichao.gao, pierre.gondois,
Anshuman.Khandual, Matteo.Carlini, Akanksha.Jain2, Sibel.Allinson,
jeshuas, nd
The ASWG ECR 2303 introduces a new field 'TRBE
interrupt' to GICC structure in ACPI 6.5.
The Trace Buffer Extension (TRBE) interrupt is a
Processor Private interrupt (PPI) and is used to
specify a platform-specific interrupt to signal
TRBE events.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
MdePkg/Include/IndustryStandard/Acpi65.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/MdePkg/Include/IndustryStandard/Acpi65.h b/MdePkg/Include/IndustryStandard/Acpi65.h
index 9e2828bc048bcd9b2bf0529d00bdaf8bf04bf543..fab613d3a71de7eb2d128f930c6d8109e3301dac 100644
--- a/MdePkg/Include/IndustryStandard/Acpi65.h
+++ b/MdePkg/Include/IndustryStandard/Acpi65.h
@@ -525,6 +525,7 @@ typedef struct {
UINT8 ProcessorPowerEfficiencyClass;
UINT8 Reserved2;
UINT16 SpeOverflowInterrupt;
+ UINT16 TrbeInterrupt;
} EFI_ACPI_6_5_GIC_STRUCTURE;
///
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 03/11] DynamicTablesPkg: Add TRBE interrupt to GICC object
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 01/11] MdePkg: MADT: Add Online capable flag in GICC Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 02/11] MdePkg: MADT: Add TRBE interrupt to GICC Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 04/11] DynamicTablesPkg: Add TRBE interrupt to GICC object parser Sami Mujawar
` (8 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
ACPI 6.5 introduces a new filed to the MADT GICC structure
to specify the Trace Buffer Extension (TRBE) interrupt. The
TRBE interrupt is a Processor Private interrupt (PPI) and is
used to specify a platform-specific interrupt to signal TRBE
events.
Therefore, update the CM_ARM_GICC_INFO to reflect the addition
of the TRBE interrupt field.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index 19098609de4bd0016e761122d9b30aac03ed2078..ca02970d7a177968c77ba7ae1a859b81d0904ff8 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -203,6 +203,13 @@ typedef struct CmArmGicCInfo {
i.e. a token referencing a CM_ARM_CPC_INFO object.
*/
CM_OBJECT_TOKEN CpcToken;
+
+ /** Trace Buffer Extension interrupt GSIV. Zero if
+ unsupported by this processor. This field was introduced in
+ ACPI 6.5 (MADT revision 6) and is therefore ignored when
+ generating MADT revision 5 or lower.
+ */
+ UINT16 TrbeInterrupt;
} CM_ARM_GICC_INFO;
/** A structure that describes the
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 04/11] DynamicTablesPkg: Add TRBE interrupt to GICC object parser
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (2 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 03/11] DynamicTablesPkg: Add TRBE interrupt to GICC object Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5 Sami Mujawar
` (7 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
ACPI 6.5 introduces a new filed to the MADT GICC structure
to specify the Trace Buffer Extension (TRBE) interrupt. The
TRBE interrupt is a Processor Private interrupt (PPI) and is
used to specify a platform-specific interrupt to signal TRBE
events.
This field has already been added to the CM_ARM_GICC_INFO
structure in a previous patch.
Therefore, update the Configuration Manager Object Parser to
reflect the addition of the TRBE interrupt field.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
index 99d6032510a5e912c9189df82c4d2b4398458d2d..c88586a74945878636955fc8a166a94f7323fcde 100644
--- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
+++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
@@ -59,7 +59,8 @@ STATIC CONST CM_OBJ_PARSER CmArmGicCInfoParser[] = {
{ "ProximityDomain", 4, "0x%x", NULL },
{ "ClockDomain", 4, "0x%x", NULL },
{ "AffinityFlags", 4, "0x%x", NULL },
- { "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }
+ { "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL },
+ { "TRBEInterrupt", 2, "0x%x", NULL }
};
/** A parser for EArmObjGicDInfo.
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (3 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 04/11] DynamicTablesPkg: Add TRBE interrupt to GICC object parser Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-22 8:52 ` PierreGondois
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 06/11] DynamicTablesPkg: Update FADT generator to " Sami Mujawar
` (6 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
The ACPI 6.5 specification updates the MADT table to add
a new field to GICC for specifying the TRBE interrupt and
also adds support for Online Capable flag to the GICC flags.
The Online Capable flags should be passed transparently
through as specified in the CM_ARM_GICC_INFO.Flags field
and only require the MADT table revision to be setup to
6 to reflect the ACPI 6.5 specification.
The TRBE field needs to be appropriately setup in the
GICC structure.
Therefore, update the MADT generator to reflect the
above updates required for supporting ACPI 6.5
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- TRBE interrupt not set correctly for ACPI 6.4 [Jeshua]
- Fixed issue with setting TRBE interrupt [Sami]
Ref: https://edk2.groups.io/g/devel/message/107427
DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 83 +++++++++++---------
1 file changed, 46 insertions(+), 37 deletions(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
index 2102a59faf498eaab7777c509443461ada999610..97be08b5f5b967944a351f834c3bc3f1ee5029b6 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
@@ -1,11 +1,11 @@
/** @file
MADT Table Generator
- Copyright (c) 2017 - 2020, ARM Limited. All rights reserved.
+ Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- - ACPI 6.3 Specification - January 2019
+ - ACPI 6.5 Specification - Aug 29, 2022
**/
@@ -82,7 +82,7 @@ GET_OBJECT_LIST (
);
/** This function updates the GIC CPU Interface Information in the
- EFI_ACPI_6_3_GIC_STRUCTURE structure.
+ EFI_ACPI_6_5_GIC_STRUCTURE structure.
@param [in] Gicc Pointer to GIC CPU Interface structure.
@param [in] GicCInfo Pointer to the GIC CPU Interface Information.
@@ -91,7 +91,7 @@ GET_OBJECT_LIST (
STATIC
VOID
AddGICC (
- IN EFI_ACPI_6_3_GIC_STRUCTURE *CONST Gicc,
+ IN EFI_ACPI_6_5_GIC_STRUCTURE *CONST Gicc,
IN CONST CM_ARM_GICC_INFO *CONST GicCInfo,
IN CONST UINT8 MadtRev
)
@@ -100,9 +100,9 @@ AddGICC (
ASSERT (GicCInfo != NULL);
// UINT8 Type
- Gicc->Type = EFI_ACPI_6_3_GIC;
+ Gicc->Type = EFI_ACPI_6_5_GIC;
// UINT8 Length
- Gicc->Length = sizeof (EFI_ACPI_6_3_GIC_STRUCTURE);
+ Gicc->Length = sizeof (EFI_ACPI_6_5_GIC_STRUCTURE);
// UINT16 Reserved
Gicc->Reserved = EFI_ACPI_RESERVED_WORD;
@@ -148,6 +148,15 @@ AddGICC (
// in EFI_ACPI_6_2_GIC_STRUCTURE.
Gicc->SpeOverflowInterrupt = 0;
}
+
+ // UINT16 TrbeInterrupt
+ if (MadtRev > EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) {
+ Gicc->TrbeInterrupt = GicCInfo->TrbeInterrupt;
+ } else {
+ // Setting TrbeInterrupt to 0 ensures backward compatibility with
+ // ACPI 6.4
+ Gicc->TrbeInterrupt = 0;
+ }
}
/**
@@ -214,7 +223,7 @@ IsAcpiUidEqual (
STATIC
EFI_STATUS
AddGICCList (
- IN EFI_ACPI_6_3_GIC_STRUCTURE *Gicc,
+ IN EFI_ACPI_6_5_GIC_STRUCTURE *Gicc,
IN CONST CM_ARM_GICC_INFO *GicCInfo,
IN UINT32 GicCCount,
IN CONST UINT8 MadtRev
@@ -252,7 +261,7 @@ AddGICCList (
STATIC
VOID
AddGICD (
- EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE *CONST Gicd,
+ EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *CONST Gicd,
CONST CM_ARM_GICD_INFO *CONST GicDInfo
)
{
@@ -260,9 +269,9 @@ AddGICD (
ASSERT (GicDInfo != NULL);
// UINT8 Type
- Gicd->Type = EFI_ACPI_6_3_GICD;
+ Gicd->Type = EFI_ACPI_6_5_GICD;
// UINT8 Length
- Gicd->Length = sizeof (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE);
+ Gicd->Length = sizeof (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE);
// UINT16 Reserved
Gicd->Reserved1 = EFI_ACPI_RESERVED_WORD;
// UINT32 Identifier
@@ -289,15 +298,15 @@ AddGICD (
STATIC
VOID
AddGICMsiFrame (
- IN EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *CONST GicMsiFrame,
+ IN EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *CONST GicMsiFrame,
IN CONST CM_ARM_GIC_MSI_FRAME_INFO *CONST GicMsiFrameInfo
)
{
ASSERT (GicMsiFrame != NULL);
ASSERT (GicMsiFrameInfo != NULL);
- GicMsiFrame->Type = EFI_ACPI_6_3_GIC_MSI_FRAME;
- GicMsiFrame->Length = sizeof (EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE);
+ GicMsiFrame->Type = EFI_ACPI_6_5_GIC_MSI_FRAME;
+ GicMsiFrame->Length = sizeof (EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE);
GicMsiFrame->Reserved1 = EFI_ACPI_RESERVED_WORD;
GicMsiFrame->GicMsiFrameId = GicMsiFrameInfo->GicMsiFrameId;
GicMsiFrame->PhysicalBaseAddress = GicMsiFrameInfo->PhysicalBaseAddress;
@@ -316,7 +325,7 @@ AddGICMsiFrame (
STATIC
VOID
AddGICMsiFrameInfoList (
- IN EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *GicMsiFrame,
+ IN EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *GicMsiFrame,
IN CONST CM_ARM_GIC_MSI_FRAME_INFO *GicMsiFrameInfo,
IN UINT32 GicMsiFrameCount
)
@@ -337,15 +346,15 @@ AddGICMsiFrameInfoList (
STATIC
VOID
AddGICRedistributor (
- IN EFI_ACPI_6_3_GICR_STRUCTURE *CONST Gicr,
+ IN EFI_ACPI_6_5_GICR_STRUCTURE *CONST Gicr,
IN CONST CM_ARM_GIC_REDIST_INFO *CONST GicRedistributorInfo
)
{
ASSERT (Gicr != NULL);
ASSERT (GicRedistributorInfo != NULL);
- Gicr->Type = EFI_ACPI_6_3_GICR;
- Gicr->Length = sizeof (EFI_ACPI_6_3_GICR_STRUCTURE);
+ Gicr->Type = EFI_ACPI_6_5_GICR;
+ Gicr->Length = sizeof (EFI_ACPI_6_5_GICR_STRUCTURE);
Gicr->Reserved = EFI_ACPI_RESERVED_WORD;
Gicr->DiscoveryRangeBaseAddress =
GicRedistributorInfo->DiscoveryRangeBaseAddress;
@@ -361,7 +370,7 @@ AddGICRedistributor (
STATIC
VOID
AddGICRedistributorList (
- IN EFI_ACPI_6_3_GICR_STRUCTURE *Gicr,
+ IN EFI_ACPI_6_5_GICR_STRUCTURE *Gicr,
IN CONST CM_ARM_GIC_REDIST_INFO *GicRInfo,
IN UINT32 GicRCount
)
@@ -382,15 +391,15 @@ AddGICRedistributorList (
STATIC
VOID
AddGICInterruptTranslationService (
- IN EFI_ACPI_6_3_GIC_ITS_STRUCTURE *CONST GicIts,
+ IN EFI_ACPI_6_5_GIC_ITS_STRUCTURE *CONST GicIts,
IN CONST CM_ARM_GIC_ITS_INFO *CONST GicItsInfo
)
{
ASSERT (GicIts != NULL);
ASSERT (GicItsInfo != NULL);
- GicIts->Type = EFI_ACPI_6_3_GIC_ITS;
- GicIts->Length = sizeof (EFI_ACPI_6_3_GIC_ITS_STRUCTURE);
+ GicIts->Type = EFI_ACPI_6_5_GIC_ITS;
+ GicIts->Length = sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE);
GicIts->Reserved = EFI_ACPI_RESERVED_WORD;
GicIts->GicItsId = GicItsInfo->GicItsId;
GicIts->PhysicalBaseAddress = GicItsInfo->PhysicalBaseAddress;
@@ -407,7 +416,7 @@ AddGICInterruptTranslationService (
STATIC
VOID
AddGICItsList (
- IN EFI_ACPI_6_3_GIC_ITS_STRUCTURE *GicIts,
+ IN EFI_ACPI_6_5_GIC_ITS_STRUCTURE *GicIts,
IN CONST CM_ARM_GIC_ITS_INFO *GicItsInfo,
IN UINT32 GicItsCount
)
@@ -470,7 +479,7 @@ BuildMadtTable (
UINT32 GicRedistOffset;
UINT32 GicItsOffset;
- EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
+ EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
ASSERT (This != NULL);
ASSERT (AcpiTableInfo != NULL);
@@ -602,22 +611,22 @@ BuildMadtTable (
goto error_handler;
}
- TableSize = sizeof (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
+ TableSize = sizeof (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER);
GicCOffset = TableSize;
- TableSize += (sizeof (EFI_ACPI_6_3_GIC_STRUCTURE) * GicCCount);
+ TableSize += (sizeof (EFI_ACPI_6_5_GIC_STRUCTURE) * GicCCount);
GicDOffset = TableSize;
- TableSize += (sizeof (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE) * GicDCount);
+ TableSize += (sizeof (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE) * GicDCount);
GicMSIOffset = TableSize;
- TableSize += (sizeof (EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE) * GicMSICount);
+ TableSize += (sizeof (EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE) * GicMSICount);
GicRedistOffset = TableSize;
- TableSize += (sizeof (EFI_ACPI_6_3_GICR_STRUCTURE) * GicRedistCount);
+ TableSize += (sizeof (EFI_ACPI_6_5_GICR_STRUCTURE) * GicRedistCount);
GicItsOffset = TableSize;
- TableSize += (sizeof (EFI_ACPI_6_3_GIC_ITS_STRUCTURE) * GicItsCount);
+ TableSize += (sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE) * GicItsCount);
// Allocate the Buffer for MADT table
*Table = (EFI_ACPI_DESCRIPTION_HEADER *)AllocateZeroPool (TableSize);
@@ -633,7 +642,7 @@ BuildMadtTable (
goto error_handler;
}
- Madt = (EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table;
+ Madt = (EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *)*Table;
DEBUG ((
DEBUG_INFO,
@@ -659,7 +668,7 @@ BuildMadtTable (
}
Status = AddGICCList (
- (EFI_ACPI_6_3_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset),
+ (EFI_ACPI_6_5_GIC_STRUCTURE *)((UINT8 *)Madt + GicCOffset),
GicCInfo,
GicCCount,
Madt->Header.Revision
@@ -674,13 +683,13 @@ BuildMadtTable (
}
AddGICD (
- (EFI_ACPI_6_3_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset),
+ (EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE *)((UINT8 *)Madt + GicDOffset),
GicDInfo
);
if (GicMSICount != 0) {
AddGICMsiFrameInfoList (
- (EFI_ACPI_6_3_GIC_MSI_FRAME_STRUCTURE *)((UINT8 *)Madt + GicMSIOffset),
+ (EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE *)((UINT8 *)Madt + GicMSIOffset),
GicMSIInfo,
GicMSICount
);
@@ -688,7 +697,7 @@ BuildMadtTable (
if (GicRedistCount != 0) {
AddGICRedistributorList (
- (EFI_ACPI_6_3_GICR_STRUCTURE *)((UINT8 *)Madt + GicRedistOffset),
+ (EFI_ACPI_6_5_GICR_STRUCTURE *)((UINT8 *)Madt + GicRedistOffset),
GicRedistInfo,
GicRedistCount
);
@@ -696,7 +705,7 @@ BuildMadtTable (
if (GicItsCount != 0) {
AddGICItsList (
- (EFI_ACPI_6_3_GIC_ITS_STRUCTURE *)((UINT8 *)Madt + GicItsOffset),
+ (EFI_ACPI_6_5_GIC_ITS_STRUCTURE *)((UINT8 *)Madt + GicItsOffset),
GicItsInfo,
GicItsCount
);
@@ -764,9 +773,9 @@ ACPI_TABLE_GENERATOR MadtGenerator = {
// Generator Description
L"ACPI.STD.MADT.GENERATOR",
// ACPI Table Signature
- EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE,
// ACPI Table Revision supported by this Generator
- EFI_ACPI_6_3_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
// Minimum supported ACPI Table Revision
EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,
// Creator ID
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5 Sami Mujawar
@ 2023-09-22 8:52 ` PierreGondois
2023-09-22 9:01 ` Sami Mujawar
0 siblings, 1 reply; 18+ messages in thread
From: PierreGondois @ 2023-09-22 8:52 UTC (permalink / raw)
To: Sami Mujawar, devel
Cc: Anshuman.Khandual, Matteo.Carlini, Akanksha.Jain2, Sibel.Allinson,
jeshuas, nd
Hi Sami,
On 9/13/23 14:49, Sami Mujawar wrote:
> The ACPI 6.5 specification updates the MADT table to add
> a new field to GICC for specifying the TRBE interrupt and
> also adds support for Online Capable flag to the GICC flags.
>
> The Online Capable flags should be passed transparently
> through as specified in the CM_ARM_GICC_INFO.Flags field
> and only require the MADT table revision to be setup to
> 6 to reflect the ACPI 6.5 specification.
>
> The TRBE field needs to be appropriately setup in the
> GICC structure.
>
> Therefore, update the MADT generator to reflect the
> above updates required for supporting ACPI 6.5
>
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
> ---
>
> Notes:
> v2:
> - TRBE interrupt not set correctly for ACPI 6.4 [Jeshua]
> - Fixed issue with setting TRBE interrupt [Sami]
> Ref: https://edk2.groups.io/g/devel/message/107427
>
> DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 83 +++++++++++---------
> 1 file changed, 46 insertions(+), 37 deletions(-)
>
> diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> index 2102a59faf498eaab7777c509443461ada999610..97be08b5f5b967944a351f834c3bc3f1ee5029b6 100644
> --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> @@ -1,11 +1,11 @@
> /** @file
> MADT Table Generator
>
> - Copyright (c) 2017 - 2020, ARM Limited. All rights reserved.
> + Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Reference(s):
> - - ACPI 6.3 Specification - January 2019
> + - ACPI 6.5 Specification - Aug 29, 2022
>
> **/
>
> @@ -82,7 +82,7 @@ GET_OBJECT_LIST (
> );
>
> /** This function updates the GIC CPU Interface Information in the
> - EFI_ACPI_6_3_GIC_STRUCTURE structure.
> + EFI_ACPI_6_5_GIC_STRUCTURE structure.
>
> @param [in] Gicc Pointer to GIC CPU Interface structure.
> @param [in] GicCInfo Pointer to the GIC CPU Interface Information.
> @@ -91,7 +91,7 @@ GET_OBJECT_LIST (
> STATIC
> VOID
> AddGICC (
> - IN EFI_ACPI_6_3_GIC_STRUCTURE *CONST Gicc,
> + IN EFI_ACPI_6_5_GIC_STRUCTURE *CONST Gicc,
> IN CONST CM_ARM_GICC_INFO *CONST GicCInfo,
> IN CONST UINT8 MadtRev
> )
> @@ -100,9 +100,9 @@ AddGICC (
> ASSERT (GicCInfo != NULL);
>
> // UINT8 Type
> - Gicc->Type = EFI_ACPI_6_3_GIC;
> + Gicc->Type = EFI_ACPI_6_5_GIC;
> // UINT8 Length
> - Gicc->Length = sizeof (EFI_ACPI_6_3_GIC_STRUCTURE);
> + Gicc->Length = sizeof (EFI_ACPI_6_5_GIC_STRUCTURE);
> // UINT16 Reserved
> Gicc->Reserved = EFI_ACPI_RESERVED_WORD;
>
> @@ -148,6 +148,15 @@ AddGICC (
> // in EFI_ACPI_6_2_GIC_STRUCTURE.
> Gicc->SpeOverflowInterrupt = 0;
> }
> +
> + // UINT16 TrbeInterrupt
> + if (MadtRev > EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) {
> + Gicc->TrbeInterrupt = GicCInfo->TrbeInterrupt;
> + } else {
> + // Setting TrbeInterrupt to 0 ensures backward compatibility with
> + // ACPI 6.4
> + Gicc->TrbeInterrupt = 0;
I'm not sure this is necessary as the Gicc struct should be 0-ed,
Regards,
Pierre
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5
2023-09-22 8:52 ` PierreGondois
@ 2023-09-22 9:01 ` Sami Mujawar
0 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-22 9:01 UTC (permalink / raw)
To: Pierre Gondois, devel@edk2.groups.io
Cc: Anshuman Khandual, Matteo Carlini, Akanksha Jain, Sibel Allinson,
jeshuas@nvidia.com, nd
Hi Pierre,
Thank you for the review feedback.
Please see my response inline marked [SAMI].
Regards,
Sami Mujawar
On 22/09/2023, 09:53, "Pierre Gondois" <pierre.gondois@arm.com <mailto:pierre.gondois@arm.com>> wrote:
Hi Sami,
On 9/13/23 14:49, Sami Mujawar wrote:
> The ACPI 6.5 specification updates the MADT table to add
> a new field to GICC for specifying the TRBE interrupt and
> also adds support for Online Capable flag to the GICC flags.
>
> The Online Capable flags should be passed transparently
> through as specified in the CM_ARM_GICC_INFO.Flags field
> and only require the MADT table revision to be setup to
> 6 to reflect the ACPI 6.5 specification.
>
> The TRBE field needs to be appropriately setup in the
> GICC structure.
>
> Therefore, update the MADT generator to reflect the
> above updates required for supporting ACPI 6.5
>
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com <mailto:sami.mujawar@arm.com>>
> ---
>
> Notes:
> v2:
> - TRBE interrupt not set correctly for ACPI 6.4 [Jeshua]
> - Fixed issue with setting TRBE interrupt [Sami]
> Ref: https://edk2.groups.io/g/devel/message/107427 <https://edk2.groups.io/g/devel/message/107427>
>
> DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 83 +++++++++++---------
> 1 file changed, 46 insertions(+), 37 deletions(-)
>
> diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> index 2102a59faf498eaab7777c509443461ada999610..97be08b5f5b967944a351f834c3bc3f1ee5029b6 100644
> --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c
> @@ -1,11 +1,11 @@
> /** @file
> MADT Table Generator
>
> - Copyright (c) 2017 - 2020, ARM Limited. All rights reserved.
> + Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @par Reference(s):
> - - ACPI 6.3 Specification - January 2019
> + - ACPI 6.5 Specification - Aug 29, 2022
>
> **/
>
> @@ -82,7 +82,7 @@ GET_OBJECT_LIST (
> );
>
> /** This function updates the GIC CPU Interface Information in the
> - EFI_ACPI_6_3_GIC_STRUCTURE structure.
> + EFI_ACPI_6_5_GIC_STRUCTURE structure.
>
> @param [in] Gicc Pointer to GIC CPU Interface structure.
> @param [in] GicCInfo Pointer to the GIC CPU Interface Information.
> @@ -91,7 +91,7 @@ GET_OBJECT_LIST (
> STATIC
> VOID
> AddGICC (
> - IN EFI_ACPI_6_3_GIC_STRUCTURE *CONST Gicc,
> + IN EFI_ACPI_6_5_GIC_STRUCTURE *CONST Gicc,
> IN CONST CM_ARM_GICC_INFO *CONST GicCInfo,
> IN CONST UINT8 MadtRev
> )
> @@ -100,9 +100,9 @@ AddGICC (
> ASSERT (GicCInfo != NULL);
>
> // UINT8 Type
> - Gicc->Type = EFI_ACPI_6_3_GIC;
> + Gicc->Type = EFI_ACPI_6_5_GIC;
> // UINT8 Length
> - Gicc->Length = sizeof (EFI_ACPI_6_3_GIC_STRUCTURE);
> + Gicc->Length = sizeof (EFI_ACPI_6_5_GIC_STRUCTURE);
> // UINT16 Reserved
> Gicc->Reserved = EFI_ACPI_RESERVED_WORD;
>
> @@ -148,6 +148,15 @@ AddGICC (
> // in EFI_ACPI_6_2_GIC_STRUCTURE.
> Gicc->SpeOverflowInterrupt = 0;
> }
> +
> + // UINT16 TrbeInterrupt
> + if (MadtRev > EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION) {
> + Gicc->TrbeInterrupt = GicCInfo->TrbeInterrupt;
> + } else {
> + // Setting TrbeInterrupt to 0 ensures backward compatibility with
> + // ACPI 6.4
> + Gicc->TrbeInterrupt = 0;
I'm not sure this is necessary as the Gicc struct should be 0-ed,
[SAMI] Yes, I think we do not need to zero this field as the memory allocated for the MADT table in BuildMadtTable() is allocated using AllocateZeroPool().
I can drop the else condition.
[/SAMI]
Regards,
Pierre
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [edk2-devel] [PATCH v2 06/11] DynamicTablesPkg: Update FADT generator to ACPI 6.5
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (4 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5 Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt Sami Mujawar
` (5 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
The ACPI 6.5 specification updates the minor revision
of the FADT table to 5. Therefore, update the FADT
generator to setup the minor revision for ACPI 6.5.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c | 108 ++++++++++----------
1 file changed, 54 insertions(+), 54 deletions(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c
index 1d10ea55e2395c55291faa3c247e5c59e345650c..57aaaf85e64a5a9f1df8d004f9c4a819fc7ee5a8 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c
@@ -1,11 +1,11 @@
/** @file
FADT Table Generator
- Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.
+ Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- - ACPI 6.4 Specification, January 2021
+ - ACPI 6.5 Specification, Aug 29, 2022
**/
@@ -32,8 +32,8 @@ Requirements:
/** This macro defines the FADT flag options for ARM Platforms.
*/
-#define FADT_FLAGS (EFI_ACPI_6_4_HW_REDUCED_ACPI | \
- EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE)
+#define FADT_FLAGS (EFI_ACPI_6_5_HW_REDUCED_ACPI | \
+ EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE)
/** This macro defines the valid mask for the FADT flag option
if HW_REDUCED_ACPI flag in the table is set.
@@ -42,47 +42,47 @@ Requirements:
22-31 (reserved).
Valid bits are:
- EFI_ACPI_6_4_WBINVD BIT0
- EFI_ACPI_6_4_PWR_BUTTON BIT4
- EFI_ACPI_6_4_SLP_BUTTON BIT5
- EFI_ACPI_6_4_FIX_RTC BIT6
- EFI_ACPI_6_4_DCK_CAP BIT9
- EFI_ACPI_6_4_RESET_REG_SUP BIT10
- EFI_ACPI_6_4_SEALED_CASE BIT11
- EFI_ACPI_6_4_HEADLESS BIT12
- EFI_ACPI_6_4_USE_PLATFORM_CLOCK BIT15
- EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL BIT18
- EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
- EFI_ACPI_6_4_HW_REDUCED_ACPI BIT20
- EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE BIT21
+ EFI_ACPI_6_5_WBINVD BIT0
+ EFI_ACPI_6_5_PWR_BUTTON BIT4
+ EFI_ACPI_6_5_SLP_BUTTON BIT5
+ EFI_ACPI_6_5_FIX_RTC BIT6
+ EFI_ACPI_6_5_DCK_CAP BIT9
+ EFI_ACPI_6_5_RESET_REG_SUP BIT10
+ EFI_ACPI_6_5_SEALED_CASE BIT11
+ EFI_ACPI_6_5_HEADLESS BIT12
+ EFI_ACPI_6_5_USE_PLATFORM_CLOCK BIT15
+ EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL BIT18
+ EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19
+ EFI_ACPI_6_5_HW_REDUCED_ACPI BIT20
+ EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE BIT21
*/
#define VALID_HARDWARE_REDUCED_FLAG_MASK ( \
- EFI_ACPI_6_4_WBINVD | \
- EFI_ACPI_6_4_PWR_BUTTON | \
- EFI_ACPI_6_4_SLP_BUTTON | \
- EFI_ACPI_6_4_FIX_RTC | \
- EFI_ACPI_6_4_DCK_CAP | \
- EFI_ACPI_6_4_RESET_REG_SUP | \
- EFI_ACPI_6_4_SEALED_CASE | \
- EFI_ACPI_6_4_HEADLESS | \
- EFI_ACPI_6_4_USE_PLATFORM_CLOCK | \
- EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL | \
- EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE | \
- EFI_ACPI_6_4_HW_REDUCED_ACPI | \
- EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE)
+ EFI_ACPI_6_5_WBINVD | \
+ EFI_ACPI_6_5_PWR_BUTTON | \
+ EFI_ACPI_6_5_SLP_BUTTON | \
+ EFI_ACPI_6_5_FIX_RTC | \
+ EFI_ACPI_6_5_DCK_CAP | \
+ EFI_ACPI_6_5_RESET_REG_SUP | \
+ EFI_ACPI_6_5_SEALED_CASE | \
+ EFI_ACPI_6_5_HEADLESS | \
+ EFI_ACPI_6_5_USE_PLATFORM_CLOCK | \
+ EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL | \
+ EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE | \
+ EFI_ACPI_6_5_HW_REDUCED_ACPI | \
+ EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE)
#pragma pack(1)
-/** The AcpiFadt is a template EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE
+/** The AcpiFadt is a template EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE
structure used for generating the FADT Table.
Note: fields marked with "{Template}" will be updated dynamically.
*/
STATIC
-EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = {
+EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = {
ACPI_HEADER (
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE,
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION
),
// UINT32 FirmwareCtrl
0,
@@ -91,7 +91,7 @@ EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = {
// UINT8 Reserved0
EFI_ACPI_RESERVED_BYTE,
// UINT8 PreferredPmProfile
- EFI_ACPI_6_4_PM_PROFILE_UNSPECIFIED, // {Template}: Power Management Profile
+ EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED, // {Template}: Power Management Profile
// UINT16 SciInt
0,
// UINT32 SmiCmd
@@ -160,37 +160,37 @@ EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE AcpiFadt = {
0,
// UINT32 Flags
FADT_FLAGS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ResetReg
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ResetReg
NULL_GAS,
// UINT8 ResetValue
0,
// UINT16 ArmBootArch
- EFI_ACPI_6_4_ARM_PSCI_COMPLIANT, // {Template}: ARM Boot Architecture Flags
+ EFI_ACPI_6_5_ARM_PSCI_COMPLIANT, // {Template}: ARM Boot Architecture Flags
// UINT8 MinorRevision
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // {Template}
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION, // {Template}
// UINT64 XFirmwareCtrl
0,
// UINT64 XDsdt
0,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe0Blk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe1Blk
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepControlReg
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepControlReg
NULL_GAS,
- // EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
+ // EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepStatusReg
NULL_GAS,
// UINT64 HypervisorVendorIdentity
EFI_ACPI_RESERVED_QWORD // {Template}: Hypervisor Vendor ID
@@ -535,7 +535,7 @@ BuildFadtTable (
This,
(EFI_ACPI_DESCRIPTION_HEADER *)&AcpiFadt,
AcpiTableInfo,
- sizeof (EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE)
+ sizeof (EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE)
);
if (EFI_ERROR (Status)) {
DEBUG ((
@@ -557,7 +557,7 @@ BuildFadtTable (
if (((AcpiTableInfo->MinorRevision & 0xF) >=
EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION) &&
((AcpiTableInfo->MinorRevision & 0xF) <=
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION))
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION))
{
AcpiFadt.MinorVersion = AcpiTableInfo->MinorRevision;
} else {
@@ -566,7 +566,7 @@ BuildFadtTable (
"WARNING: FADT: Unsupported FADT Minor Revision 0x%x specified, " \
"defaulting to FADT Minor Revision 0x%x\n",
AcpiTableInfo->MinorRevision,
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION
));
}
}
@@ -642,9 +642,9 @@ ACPI_TABLE_GENERATOR FadtGenerator = {
// Generator Description
L"ACPI.STD.FADT.GENERATOR",
// ACPI Table Signature
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,
// ACPI Table Revision supported by this Generator
- EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
+ EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
// Minimum supported ACPI Table Revision
EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,
// Creator ID
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (5 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 06/11] DynamicTablesPkg: Update FADT generator to " Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-14 5:19 ` Gao, Zhichao
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 08/11] DynamicTablesPkg: Add an ET info object to Arm namespace Sami Mujawar
` (4 subsequent siblings)
11 siblings, 1 reply; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, zhichao.gao, pierre.gondois, Anshuman.Khandual,
Matteo.Carlini, Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
ACPI 6.5 introduces a new filed to the MADT GICC
structure to specify the TRBE interrupt. The TRBE
interrupt is a Processor Private interrupt (PPI)
and is used to specify a platform-specific
interrupt to signal TRBE events.
Therefore, update the MADT GICC structure parser
to parse the new TRBE interrupt field. Also, add
validations to check that the TRBE interrupt is
within the PPI interrupt range.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c | 48 +++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
index 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e3268e73baa9bc92 100644
--- a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
+++ b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c
@@ -1,7 +1,7 @@
/** @file
MADT table parser
- Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
+ Copyright (c) 2016 - 2023, ARM Limited. All rights reserved.
Copyright (c) 2022, AMD Incorporated. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt (
}
}
+/**
+ This function validates the TRBE Interrupt in the GICC.
+
+ @param [in] Ptr Pointer to the start of the field data.
+ @param [in] Context Pointer to context specific information e.g. this
+ could be a pointer to the ACPI table header.
+**/
+STATIC
+VOID
+EFIAPI
+ValidateTrbeInterrupt (
+ IN UINT8 *Ptr,
+ IN VOID *Context
+ )
+{
+ UINT16 TrbeInterrupt;
+
+ TrbeInterrupt = *(UINT16 *)Ptr;
+
+ // SPE not supported by this processor
+ if (TrbeInterrupt == 0) {
+ return;
+ }
+
+ if ((TrbeInterrupt < ARM_PPI_ID_MIN) ||
+ ((TrbeInterrupt > ARM_PPI_ID_MAX) &&
+ (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
+ (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX))
+ {
+ IncrementErrorCount ();
+ Print (
+ L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID "
+ L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
+ TrbeInterrupt,
+ ARM_PPI_ID_MIN,
+ ARM_PPI_ID_MAX,
+ ARM_PPI_ID_EXTENDED_MIN,
+ ARM_PPI_ID_EXTENDED_MAX
+ );
+ }
+}
+
/**
An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
**/
@@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER GicCParser[] = {
NULL },
{ L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL },
{ L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
- ValidateSpeOverflowInterrupt, NULL }
+ ValidateSpeOverflowInterrupt, NULL },
+ { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL,
+ ValidateTrbeInterrupt, NULL }
};
/**
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt Sami Mujawar
@ 2023-09-14 5:19 ` Gao, Zhichao
0 siblings, 0 replies; 18+ messages in thread
From: Gao, Zhichao @ 2023-09-14 5:19 UTC (permalink / raw)
To: Sami Mujawar, devel@edk2.groups.io
Cc: pierre.gondois@arm.com, Anshuman.Khandual@arm.com,
Matteo.Carlini@arm.com, Akanksha.Jain2@arm.com,
Sibel.Allinson@arm.com, jeshuas@nvidia.com, nd@arm.com
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Thanks,
Zhichao
> -----Original Message-----
> From: Sami Mujawar <sami.mujawar@arm.com>
> Sent: Wednesday, September 13, 2023 8:50 PM
> To: devel@edk2.groups.io
> Cc: Sami Mujawar <sami.mujawar@arm.com>; Gao, Zhichao
> <zhichao.gao@intel.com>; pierre.gondois@arm.com;
> Anshuman.Khandual@arm.com; Matteo.Carlini@arm.com;
> Akanksha.Jain2@arm.com; Sibel.Allinson@arm.com; jeshuas@nvidia.com;
> nd@arm.com
> Subject: [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE
> interrupt
>
> ACPI 6.5 introduces a new filed to the MADT GICC structure to specify the
> TRBE interrupt. The TRBE interrupt is a Processor Private interrupt (PPI) and is
> used to specify a platform-specific interrupt to signal TRBE events.
>
> Therefore, update the MADT GICC structure parser to parse the new TRBE
> interrupt field. Also, add validations to check that the TRBE interrupt is within
> the PPI interrupt range.
>
> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
> ---
>
> Notes:
> v2:
> - No code change from v1 patch series. [SAMI]
>
>
> ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.
> c | 48 +++++++++++++++++++-
> 1 file changed, 46 insertions(+), 2 deletions(-)
>
> diff --git
> a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> index
> 41edcb9ffd1da90893c04e8284ea3317a9e3b45a..3a4f246347f8ad3489fda083e3
> 268e73baa9bc92 100644
> ---
> a/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> er.c
> +++
> b/ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtPars
> +++ er.c
> @@ -1,7 +1,7 @@
> /** @file
> MADT table parser
>
> - Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.
> + Copyright (c) 2016 - 2023, ARM Limited. All rights reserved.
> Copyright (c) 2022, AMD Incorporated. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -97,6 +97,48 @@ ValidateSpeOverflowInterrupt (
> }
> }
>
> +/**
> + This function validates the TRBE Interrupt in the GICC.
> +
> + @param [in] Ptr Pointer to the start of the field data.
> + @param [in] Context Pointer to context specific information e.g. this
> + could be a pointer to the ACPI table header.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +ValidateTrbeInterrupt (
> + IN UINT8 *Ptr,
> + IN VOID *Context
> + )
> +{
> + UINT16 TrbeInterrupt;
> +
> + TrbeInterrupt = *(UINT16 *)Ptr;
> +
> + // SPE not supported by this processor if (TrbeInterrupt == 0) {
> + return;
> + }
> +
> + if ((TrbeInterrupt < ARM_PPI_ID_MIN) ||
> + ((TrbeInterrupt > ARM_PPI_ID_MAX) &&
> + (TrbeInterrupt < ARM_PPI_ID_EXTENDED_MIN)) ||
> + (TrbeInterrupt > ARM_PPI_ID_EXTENDED_MAX))
> + {
> + IncrementErrorCount ();
> + Print (
> + L"\nERROR: TRBE Interrupt ID of %d is not in the allowed PPI ID "
> + L"ranges of %d-%d or %d-%d (for GICv3.1 or later).",
> + TrbeInterrupt,
> + ARM_PPI_ID_MIN,
> + ARM_PPI_ID_MAX,
> + ARM_PPI_ID_EXTENDED_MIN,
> + ARM_PPI_ID_EXTENDED_MAX
> + );
> + }
> +}
> +
> /**
> An ACPI_PARSER array describing the GICC Interrupt Controller Structure.
> **/
> @@ -122,7 +164,9 @@ STATIC CONST ACPI_PARSER GicCParser[] = {
> NULL },
> { L"Reserved", 1, 77, L"0x%x", NULL, NULL, NULL, NULL },
> { L"SPE overflow Interrupt", 2, 78, L"0x%x", NULL, NULL,
> - ValidateSpeOverflowInterrupt, NULL }
> + ValidateSpeOverflowInterrupt, NULL },
> + { L"TRBE Interrupt", 2, 80, L"0x%x", NULL, NULL,
> + ValidateTrbeInterrupt, NULL }
> };
>
> /**
> --
> 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [edk2-devel] [PATCH v2 08/11] DynamicTablesPkg: Add an ET info object to Arm namespace
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (6 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 07/11] ShellPkg: Acpiview: Update MADT parser for TRBE interrupt Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 09/11] DynamicTablesPkg: Add an ET info object parser Sami Mujawar
` (3 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
Add an Embedded Trace (ET) info object that can be
used to provide information about Embedded Trace
Extension (ETE) or Embedded Trace Module (ETM)
available on a platform.
Although ETE and ETM share the same HID,
ETE has a system register interfaces, unlike
ETM which requires memory mapped registers.
Since this patch aims to support ETE it does
not describe any memory mapped registers.
However, required support for ETM can be added
in the future.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 25 +++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index ca02970d7a177968c77ba7ae1a859b81d0904ff8..8c00bdac20bb1323d8dbd17f671e0e61886ad269 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2017 - 2022, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -71,6 +71,7 @@ typedef enum ArmObjectID {
EArmObjPccSubspaceType3Info, ///< 46 - Pcc Subspace Type 3 Info
EArmObjPccSubspaceType4Info, ///< 47 - Pcc Subspace Type 4 Info
EArmObjPccSubspaceType5Info, ///< 48 - Pcc Subspace Type 5 Info
+ EArmObjEtInfo, ///< 49 - Embedded Trace Extension/Module Info
EArmObjMax
} EARM_OBJECT_ID;
@@ -210,6 +211,12 @@ typedef struct CmArmGicCInfo {
generating MADT revision 5 or lower.
*/
UINT16 TrbeInterrupt;
+
+ /** Optional field: Reference Token for the Embedded Trace device info for
+ this processing element.
+ i.e. a token referencing a CM_ARM_ET_INFO object.
+ */
+ CM_OBJECT_TOKEN EtToken;
} CM_ARM_GICC_INFO;
/** A structure that describes the
@@ -1304,6 +1311,22 @@ typedef struct CmArmPccSubspaceType5Info {
PCC_MAILBOX_REGISTER_INFO ErrorStatusReg;
} CM_ARM_PCC_SUBSPACE_TYPE5_INFO;
+/** An enum describing the Arm Embedded Trace device type.
+*/
+typedef enum ArmEtType {
+ ArmEtTypeEtm, ///< Embedded Trace module.
+ ArmEtTypeEte, ///< Embedded Trace Extension.
+ ArmEtTypeMax
+} ARM_ET_TYPE;
+
+/** A structure that describes the Embedded Trace Extension/Module.
+
+ ID: EArmObjEtInfo
+*/
+typedef struct CmArmEtInfo {
+ ARM_ET_TYPE EtType;
+} CM_ARM_ET_INFO;
+
#pragma pack()
#endif // ARM_NAMESPACE_OBJECTS_H_
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 09/11] DynamicTablesPkg: Add an ET info object parser
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (7 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 08/11] DynamicTablesPkg: Add an ET info object to Arm namespace Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML Sami Mujawar
` (2 subsequent siblings)
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
An Embedded Trace (ET) info object is used to provide
information about an Embedded Trace Extension (ETE) or
an Embedded Trace Module (ETM) available on a platform.
The CM_ARM_ET_INFO object has already been added to the
Arm namespace objects list by a previous patch.
Therefore, update the CM Object parser to add support
for parsing the CM_ARM_ET_INFO object.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
index c88586a74945878636955fc8a166a94f7323fcde..145732a21b0704729714168aa420d9988471f512 100644
--- a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
+++ b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
@@ -638,6 +638,12 @@ STATIC CONST CM_OBJ_PARSER CmArmPccSubspaceType5InfoParser[] = {
ARRAY_SIZE (CmArmMailboxRegisterInfoParser) },
};
+/** A parser for EArmObjEtInfo.
+*/
+STATIC CONST CM_OBJ_PARSER CmArmEtInfo[] = {
+ { "EtType", sizeof (ARM_ET_TYPE), "0x%x", NULL }
+};
+
/** A parser for Arm namespace objects.
*/
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
@@ -734,6 +740,8 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
ARRAY_SIZE (CmArmPccSubspaceType34InfoParser) },
{ "EArmObjPccSubspaceType5Info", CmArmPccSubspaceType5InfoParser,
ARRAY_SIZE (CmArmPccSubspaceType5InfoParser) },
+ { "EArmObjEtInfo", CmArmEtInfo,
+ ARRAY_SIZE (CmArmEtInfo) },
{ "EArmObjMax", NULL, 0 },
};
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (8 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 09/11] DynamicTablesPkg: Add an ET info object parser Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-13 15:06 ` Jeshua Smith via groups.io
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 11/11] DynamicTablesPkg: Fix referencing of CPC token Sami Mujawar
2023-09-22 8:52 ` [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support PierreGondois
11 siblings, 1 reply; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
The Coresight Embedded Trace Extension (ETE) feature
can be detected by the platform firmware by examining
the debug feature register ID_AA64DFR0_EL1.TraceVer
field.
The platform configuration manager can then describe
the ETE by creating CM_ARM_ET_INFO object(s) and
referencing these in CM_ARM_GICC_INFO.EtToken.
The 'Table 3: Compatible IDs for architected
CoreSight components' in the 'ACPI for CoreSight
1.2 Platform Design Document' specifies the HID
value for Coresight ETE and CoreSight Embedded
Trace Macrocell (ETM) v4.x as ARMH C500.
Therefore, update the SsdtCpuTopologyGenerator
to add an ETE device to the CPU node in the AML
CPU hierarchy so that an OS can utilise this
information.
Note: Although ETE and ETM share the same HID,
ETE has a system register interfaces, unlike
ETM which requires memory mapped registers.
Since this patch aims to support ETE, the AML
description does not describe any memory mapped
registers. However, support for ETM can be
added in the future.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 186 +++++++++++++++++++-
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +-
2 files changed, 195 insertions(+), 2 deletions(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a032735e8e0be598 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+ (https://developer.arm.com/documentation/den0067/a/?lang=en)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#include <Library/AcpiLib.h>
@@ -35,6 +41,7 @@ Requirements:
- EArmObjProcHierarchyInfo (OPTIONAL) along with
- EArmObjCmRef (OPTIONAL)
- EArmObjLpiInfo (OPTIONAL)
+ - GetEArmObjEtInfo (OPTIONAL)
*/
/** This macro expands to a function that retrieves the GIC
@@ -86,6 +93,16 @@ GET_OBJECT_LIST (
CM_ARM_CPC_INFO
);
+/**
+ This macro expands to a function that retrieves the ET device
+ information from the Configuration Manager.
+*/
+GET_OBJECT_LIST (
+ EObjNameSpaceArm,
+ EArmObjEtInfo,
+ CM_ARM_ET_INFO
+ );
+
/** Initialize the TokenTable.
One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO
@@ -326,6 +343,144 @@ CreateAmlCpcNode (
return Status;
}
+/** Create an embedded trace device and add it to the Cpu Node in the
+ AML namespace.
+
+ This generates the following ASL code:
+ Device (E002)
+ {
+ Name (_UID, 2)
+ Name (_HID, "ARMHC500")
+ }
+
+ Note: Currently we only support generating ETE nodes. Unlike ETM,
+ ETE has a system register interface and therefore does not need
+ the MMIO range to be described.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] ParentNode Parent node to attach the Cpu node to.
+ @param [in] CpuName Value used to generate the node name.
+ @param [out] EtNodePtr If not NULL, return the created Cpu node.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtd (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN AML_NODE_HANDLE ParentNode,
+ IN UINT32 CpuName,
+ OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ AML_OBJECT_NODE_HANDLE EtNode;
+ CHAR8 AslName[AML_NAME_SEG_SIZE + 1];
+
+ ASSERT (Generator != NULL);
+ ASSERT (ParentNode != NULL);
+
+ Status = WriteAslName ('E', CpuName, AslName);
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenDevice (AslName, ParentNode, &EtNode);
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameInteger (
+ "_UID",
+ CpuName,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameString (
+ "_HID",
+ ACPI_HID_ET_DEVICE,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // If requested, return the handle to the EtNode.
+ if (EtNodePtr != NULL) {
+ *EtNodePtr = EtNode;
+ }
+
+ return Status;
+}
+
+/** Create and add an Embedded trace device to the Cpu Node.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] CfgMgrProtocol Pointer to the Configuration Manager
+ Protocol Interface.
+ @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO object
+ describing the Cpu.
+ @param [in] CpuName Value used to generate the CPU node name.
+ @param [in] Node CPU Node to which the ET device node is
+ attached.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED Feature Unsupported.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtNode (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
+ IN CM_ARM_GICC_INFO *GicCInfo,
+ IN UINT32 CpuName,
+ IN AML_OBJECT_NODE_HANDLE *Node
+ )
+{
+ EFI_STATUS Status;
+ CM_ARM_ET_INFO *EtInfo;
+
+ Status = GetEArmObjEtInfo (
+ CfgMgrProtocol,
+ GicCInfo->EtToken,
+ &EtInfo,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // Currently we only support creation of a ETE Node.
+ if (EtInfo->EtType != ArmEtTypeEte) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = CreateAmlEtd (
+ Generator,
+ Node,
+ CpuName,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
/** Create and add an _LPI method to Cpu/Cluster Node.
For instance, transform an AML node from:
@@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy (
}
}
+ // Add an Embedded Trace node if present.
+ if (GicCInfo->EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ GicCInfo,
+ CpuName,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
+
return Status;
}
@@ -1135,6 +1305,20 @@ CreateTopologyFromGicC (
break;
}
}
+
+ if (GicCInfo[Index].EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ &GicCInfo[Index],
+ Index,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
} // for
return Status;
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be436c0dafca1824 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+ (https://developer.arm.com/documentation/den0067/a/?lang=en)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_
@@ -49,6 +55,9 @@
/// HID for a processor device.
#define ACPI_HID_PROCESSOR_DEVICE "ACPI0007"
+/// HID for a ETM/ETE device.
+#define ACPI_HID_ET_DEVICE "ARMHC500"
+
/// HID for a processor container device.
#define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010"
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML Sami Mujawar
@ 2023-09-13 15:06 ` Jeshua Smith via groups.io
2023-09-14 7:20 ` Sami Mujawar
0 siblings, 1 reply; 18+ messages in thread
From: Jeshua Smith via groups.io @ 2023-09-13 15:06 UTC (permalink / raw)
To: Sami Mujawar, devel@edk2.groups.io
Cc: pierre.gondois@arm.com, Anshuman.Khandual@arm.com,
Matteo.Carlini@arm.com, Akanksha.Jain2@arm.com,
Sibel.Allinson@arm.com, nd@arm.com
Not sure it's worth creating a new patchset for, but the "GetEArmObjEtInfo (OPTIONAL)" comment should probably not have the "Get" prefix (ie. " EArmObjEtInfo (OPTIONAL)").
-----Original Message-----
From: Sami Mujawar <sami.mujawar@arm.com>
Sent: Wednesday, September 13, 2023 6:50 AM
To: devel@edk2.groups.io
Cc: Sami Mujawar <sami.mujawar@arm.com>; pierre.gondois@arm.com; Anshuman.Khandual@arm.com; Matteo.Carlini@arm.com; Akanksha.Jain2@arm.com; Sibel.Allinson@arm.com; Jeshua Smith <jeshuas@nvidia.com>; nd@arm.com
Subject: [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML
External email: Use caution opening links or attachments
The Coresight Embedded Trace Extension (ETE) feature can be detected by the platform firmware by examining the debug feature register ID_AA64DFR0_EL1.TraceVer field.
The platform configuration manager can then describe the ETE by creating CM_ARM_ET_INFO object(s) and referencing these in CM_ARM_GICC_INFO.EtToken.
The 'Table 3: Compatible IDs for architected CoreSight components' in the 'ACPI for CoreSight
1.2 Platform Design Document' specifies the HID value for Coresight ETE and CoreSight Embedded Trace Macrocell (ETM) v4.x as ARMH C500.
Therefore, update the SsdtCpuTopologyGenerator to add an ETE device to the CPU node in the AML CPU hierarchy so that an OS can utilise this information.
Note: Although ETE and ETM share the same HID, ETE has a system register interfaces, unlike ETM which requires memory mapped registers.
Since this patch aims to support ETE, the AML description does not describe any memory mapped registers. However, support for ETM can be added in the future.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 186 +++++++++++++++++++- DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +-
2 files changed, 195 insertions(+), 2 deletions(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a032735e8e0be598 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp
+++ uTopologyGenerator.c
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+
+ (https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev
+ eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=05%7C
+ 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1
+ 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF
+ pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
+ n0%3D%7C3000%7C%7C%7C&sdata=PV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx
+ KkI%3D&reserved=0)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#include <Library/AcpiLib.h>
@@ -35,6 +41,7 @@ Requirements:
- EArmObjProcHierarchyInfo (OPTIONAL) along with
- EArmObjCmRef (OPTIONAL)
- EArmObjLpiInfo (OPTIONAL)
+ - GetEArmObjEtInfo (OPTIONAL)
*/
/** This macro expands to a function that retrieves the GIC @@ -86,6 +93,16 @@ GET_OBJECT_LIST (
CM_ARM_CPC_INFO
);
+/**
+ This macro expands to a function that retrieves the ET device
+ information from the Configuration Manager.
+*/
+GET_OBJECT_LIST (
+ EObjNameSpaceArm,
+ EArmObjEtInfo,
+ CM_ARM_ET_INFO
+ );
+
/** Initialize the TokenTable.
One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO @@ -326,6 +343,144 @@ CreateAmlCpcNode (
return Status;
}
+/** Create an embedded trace device and add it to the Cpu Node in the
+ AML namespace.
+
+ This generates the following ASL code:
+ Device (E002)
+ {
+ Name (_UID, 2)
+ Name (_HID, "ARMHC500")
+ }
+
+ Note: Currently we only support generating ETE nodes. Unlike ETM,
+ ETE has a system register interface and therefore does not need the
+ MMIO range to be described.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] ParentNode Parent node to attach the Cpu node to.
+ @param [in] CpuName Value used to generate the node name.
+ @param [out] EtNodePtr If not NULL, return the created Cpu node.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtd (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN AML_NODE_HANDLE ParentNode,
+ IN UINT32 CpuName,
+ OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ AML_OBJECT_NODE_HANDLE EtNode;
+ CHAR8 AslName[AML_NAME_SEG_SIZE + 1];
+
+ ASSERT (Generator != NULL);
+ ASSERT (ParentNode != NULL);
+
+ Status = WriteAslName ('E', CpuName, AslName); if (EFI_ERROR
+ (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenDevice (AslName, ParentNode, &EtNode); if
+ (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameInteger (
+ "_UID",
+ CpuName,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameString (
+ "_HID",
+ ACPI_HID_ET_DEVICE,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // If requested, return the handle to the EtNode.
+ if (EtNodePtr != NULL) {
+ *EtNodePtr = EtNode;
+ }
+
+ return Status;
+}
+
+/** Create and add an Embedded trace device to the Cpu Node.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] CfgMgrProtocol Pointer to the Configuration Manager
+ Protocol Interface.
+ @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO object
+ describing the Cpu.
+ @param [in] CpuName Value used to generate the CPU node name.
+ @param [in] Node CPU Node to which the ET device node is
+ attached.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED Feature Unsupported.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtNode (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
+ IN CM_ARM_GICC_INFO *GicCInfo,
+ IN UINT32 CpuName,
+ IN AML_OBJECT_NODE_HANDLE *Node
+ )
+{
+ EFI_STATUS Status;
+ CM_ARM_ET_INFO *EtInfo;
+
+ Status = GetEArmObjEtInfo (
+ CfgMgrProtocol,
+ GicCInfo->EtToken,
+ &EtInfo,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // Currently we only support creation of a ETE Node.
+ if (EtInfo->EtType != ArmEtTypeEte) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = CreateAmlEtd (
+ Generator,
+ Node,
+ CpuName,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
/** Create and add an _LPI method to Cpu/Cluster Node.
For instance, transform an AML node from:
@@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy (
}
}
+ // Add an Embedded Trace node if present.
+ if (GicCInfo->EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ GicCInfo,
+ CpuName,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
+
return Status;
}
@@ -1135,6 +1305,20 @@ CreateTopologyFromGicC (
break;
}
}
+
+ if (GicCInfo[Index].EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ &GicCInfo[Index],
+ Index,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
} // for
return Status;
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be436c0dafca1824 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp
+++ uTopologyGenerator.h
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+
+ (https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev
+ eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=05%7C
+ 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1
+ 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF
+ pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
+ n0%3D%7C3000%7C%7C%7C&sdata=PV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx
+ KkI%3D&reserved=0)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_
@@ -49,6 +55,9 @@
/// HID for a processor device.
#define ACPI_HID_PROCESSOR_DEVICE "ACPI0007"
+/// HID for a ETM/ETE device.
+#define ACPI_HID_ET_DEVICE "ARMHC500"
+
/// HID for a processor container device.
#define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010"
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML
2023-09-13 15:06 ` Jeshua Smith via groups.io
@ 2023-09-14 7:20 ` Sami Mujawar
0 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-14 7:20 UTC (permalink / raw)
To: Jeshua Smith, devel@edk2.groups.io
Cc: Pierre Gondois, Anshuman Khandual, Matteo Carlini, Akanksha Jain,
Sibel Allinson, nd
Hi Jeshua,
Thank you for the feedback.
On 13/09/2023, 16:06, "Jeshua Smith" <jeshuas@nvidia.com <mailto:jeshuas@nvidia.com>> wrote:
Not sure it's worth creating a new patchset for, but the "GetEArmObjEtInfo (OPTIONAL)" comment should probably not have the "Get" prefix (ie. " EArmObjEtInfo (OPTIONAL)").
[SAMI] I think I will fix this before I merge the series.
Regards,
Sami Mujawar
-----Original Message-----
From: Sami Mujawar <sami.mujawar@arm.com <mailto:sami.mujawar@arm.com>>
Sent: Wednesday, September 13, 2023 6:50 AM
To: devel@edk2.groups.io <mailto:devel@edk2.groups.io>
Cc: Sami Mujawar <sami.mujawar@arm.com <mailto:sami.mujawar@arm.com>>; pierre.gondois@arm.com <mailto:pierre.gondois@arm.com>; Anshuman.Khandual@arm.com <mailto:Anshuman.Khandual@arm.com>; Matteo.Carlini@arm.com <mailto:Matteo.Carlini@arm.com>; Akanksha.Jain2@arm.com <mailto:Akanksha.Jain2@arm.com>; Sibel.Allinson@arm.com <mailto:Sibel.Allinson@arm.com>; Jeshua Smith <jeshuas@nvidia.com <mailto:jeshuas@nvidia.com>>; nd@arm.com <mailto:nd@arm.com>
Subject: [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML
External email: Use caution opening links or attachments
The Coresight Embedded Trace Extension (ETE) feature can be detected by the platform firmware by examining the debug feature register ID_AA64DFR0_EL1.TraceVer field.
The platform configuration manager can then describe the ETE by creating CM_ARM_ET_INFO object(s) and referencing these in CM_ARM_GICC_INFO.EtToken.
The 'Table 3: Compatible IDs for architected CoreSight components' in the 'ACPI for CoreSight
1.2 Platform Design Document' specifies the HID value for Coresight ETE and CoreSight Embedded Trace Macrocell (ETM) v4.x as ARMH C500.
Therefore, update the SsdtCpuTopologyGenerator to add an ETE device to the CPU node in the AML CPU hierarchy so that an OS can utilise this information.
Note: Although ETE and ETM share the same HID, ETE has a system register interfaces, unlike ETM which requires memory mapped registers.
Since this patch aims to support ETE, the AML description does not describe any memory mapped registers. However, support for ETM can be added in the future.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com <mailto:sami.mujawar@arm.com>>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 186 +++++++++++++++++++- DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +-
2 files changed, 195 insertions(+), 2 deletions(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a032735e8e0be598 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp
+++ uTopologyGenerator.c
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+
+ (https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev>
+ eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=05%7C
+ 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1
+ 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF
+ pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
+ n0%3D%7C3000%7C%7C%7C&sdata=PV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx
+ KkI%3D&reserved=0)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#include <Library/AcpiLib.h>
@@ -35,6 +41,7 @@ Requirements:
- EArmObjProcHierarchyInfo (OPTIONAL) along with
- EArmObjCmRef (OPTIONAL)
- EArmObjLpiInfo (OPTIONAL)
+ - GetEArmObjEtInfo (OPTIONAL)
*/
/** This macro expands to a function that retrieves the GIC @@ -86,6 +93,16 @@ GET_OBJECT_LIST (
CM_ARM_CPC_INFO
);
+/**
+ This macro expands to a function that retrieves the ET device
+ information from the Configuration Manager.
+*/
+GET_OBJECT_LIST (
+ EObjNameSpaceArm,
+ EArmObjEtInfo,
+ CM_ARM_ET_INFO
+ );
+
/** Initialize the TokenTable.
One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO @@ -326,6 +343,144 @@ CreateAmlCpcNode (
return Status;
}
+/** Create an embedded trace device and add it to the Cpu Node in the
+ AML namespace.
+
+ This generates the following ASL code:
+ Device (E002)
+ {
+ Name (_UID, 2)
+ Name (_HID, "ARMHC500")
+ }
+
+ Note: Currently we only support generating ETE nodes. Unlike ETM,
+ ETE has a system register interface and therefore does not need the
+ MMIO range to be described.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] ParentNode Parent node to attach the Cpu node to.
+ @param [in] CpuName Value used to generate the node name.
+ @param [out] EtNodePtr If not NULL, return the created Cpu node.
+
+ @retval EFI_SUCCESS Success.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtd (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN AML_NODE_HANDLE ParentNode,
+ IN UINT32 CpuName,
+ OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ AML_OBJECT_NODE_HANDLE EtNode;
+ CHAR8 AslName[AML_NAME_SEG_SIZE + 1];
+
+ ASSERT (Generator != NULL);
+ ASSERT (ParentNode != NULL);
+
+ Status = WriteAslName ('E', CpuName, AslName); if (EFI_ERROR
+ (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenDevice (AslName, ParentNode, &EtNode); if
+ (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameInteger (
+ "_UID",
+ CpuName,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ Status = AmlCodeGenNameString (
+ "_HID",
+ ACPI_HID_ET_DEVICE,
+ EtNode,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // If requested, return the handle to the EtNode.
+ if (EtNodePtr != NULL) {
+ *EtNodePtr = EtNode;
+ }
+
+ return Status;
+}
+
+/** Create and add an Embedded trace device to the Cpu Node.
+
+ @param [in] Generator The SSDT Cpu Topology generator.
+ @param [in] CfgMgrProtocol Pointer to the Configuration Manager
+ Protocol Interface.
+ @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO object
+ describing the Cpu.
+ @param [in] CpuName Value used to generate the CPU node name.
+ @param [in] Node CPU Node to which the ET device node is
+ attached.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_UNSUPPORTED Feature Unsupported.
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+ @retval EFI_OUT_OF_RESOURCES Failed to allocate memory.
+**/
+STATIC
+EFI_STATUS
+EFIAPI
+CreateAmlEtNode (
+ IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator,
+ IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol,
+ IN CM_ARM_GICC_INFO *GicCInfo,
+ IN UINT32 CpuName,
+ IN AML_OBJECT_NODE_HANDLE *Node
+ )
+{
+ EFI_STATUS Status;
+ CM_ARM_ET_INFO *EtInfo;
+
+ Status = GetEArmObjEtInfo (
+ CfgMgrProtocol,
+ GicCInfo->EtToken,
+ &EtInfo,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT (0);
+ return Status;
+ }
+
+ // Currently we only support creation of a ETE Node.
+ if (EtInfo->EtType != ArmEtTypeEte) {
+ return EFI_UNSUPPORTED;
+ }
+
+ Status = CreateAmlEtd (
+ Generator,
+ Node,
+ CpuName,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+}
+
/** Create and add an _LPI method to Cpu/Cluster Node.
For instance, transform an AML node from:
@@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy (
}
}
+ // Add an Embedded Trace node if present.
+ if (GicCInfo->EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ GicCInfo,
+ CpuName,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
+
return Status;
}
@@ -1135,6 +1305,20 @@ CreateTopologyFromGicC (
break;
}
}
+
+ if (GicCInfo[Index].EtToken != CM_NULL_TOKEN) {
+ Status = CreateAmlEtNode (
+ Generator,
+ CfgMgrProtocol,
+ &GicCInfo[Index],
+ Index,
+ CpuNode
+ );
+ if (EFI_ERROR (Status)) {
+ ASSERT_EFI_ERROR (Status);
+ return Status;
+ }
+ }
} // for
return Status;
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be436c0dafca1824 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCp
+++ uTopologyGenerator.h
@@ -1,11 +1,17 @@
/** @file
SSDT Cpu Topology Table Generator.
- Copyright (c) 2021, Arm Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Reference(s):
- ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors
+ - ACPI for CoreSight version 1.2 Platform Design Document
+
+ (https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev <https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev>
+ eloper.arm.com%2Fdocumentation%2Fden0067%2Fa%2F%3Flang%3Den&data=05%7C
+ 01%7Cjeshuas%40nvidia.com%7C26e54e899c78479dfa9708dbb457f3cd%7C43083d1
+ 5727340c1b7db39efd9ccc17a%7C0%7C0%7C638302062091232606%7CUnknown%7CTWF
+ pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
+ n0%3D%7C3000%7C%7C%7C&sdata=PV447Rl4K7EXTgSc9g%2BcjTzXYmMsKs0QMkpXRnwx
+ KkI%3D&reserved=0)
+
+ @par Glossary:
+ - ETE - Embedded Trace Extension.
+ - ETM - Embedded Trace Macrocell.
**/
#ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_
@@ -49,6 +55,9 @@
/// HID for a processor device.
#define ACPI_HID_PROCESSOR_DEVICE "ACPI0007"
+/// HID for a ETM/ETE device.
+#define ACPI_HID_ET_DEVICE "ARMHC500"
+
/// HID for a processor container device.
#define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010"
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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* [edk2-devel] [PATCH v2 11/11] DynamicTablesPkg: Fix referencing of CPC token
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (9 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 10/11] DynamicTablesPkg: Add ETE device to CPU node in AML Sami Mujawar
@ 2023-09-13 12:49 ` Sami Mujawar
2023-09-22 8:52 ` [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support PierreGondois
11 siblings, 0 replies; 18+ messages in thread
From: Sami Mujawar @ 2023-09-13 12:49 UTC (permalink / raw)
To: devel
Cc: Sami Mujawar, pierre.gondois, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
The CpcToken has been incorrectly referenced in the
CreateTopologyFromGicC() and always points to the
CPC token in the first GICC Info object.
Therefore, fix this by correctly indexing into the
GicCInfo object array.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- No code change from v1 patch series. [SAMI]
DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index 6fbba12a010bf987797f0901a032735e8e0be598..8228c7845ac0c26ca0f319fd86abf89bb3bfaf50 100644
--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
@@ -1298,7 +1298,7 @@ CreateTopologyFromGicC (
// If a CPC info is associated with the
// GicCinfo, create an _CPC method returning them.
- if (GicCInfo->CpcToken != CM_NULL_TOKEN) {
+ if (GicCInfo[Index].CpcToken != CM_NULL_TOKEN) {
Status = CreateAmlCpcNode (Generator, CfgMgrProtocol, &GicCInfo[Index], CpuNode);
if (EFI_ERROR (Status)) {
ASSERT_EFI_ERROR (Status);
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support
2023-09-13 12:49 [edk2-devel] [PATCH v2 00/11] Update MADT for ACPI 6.5, and add TRBE & ETE support Sami Mujawar
` (10 preceding siblings ...)
2023-09-13 12:49 ` [edk2-devel] [PATCH v2 11/11] DynamicTablesPkg: Fix referencing of CPC token Sami Mujawar
@ 2023-09-22 8:52 ` PierreGondois
11 siblings, 0 replies; 18+ messages in thread
From: PierreGondois @ 2023-09-22 8:52 UTC (permalink / raw)
To: Sami Mujawar, devel
Cc: ardb+tianocore, quic_llindhol, michael.d.kinney, gaoliming,
zhiguang.liu, zhichao.gao, Anshuman.Khandual, Matteo.Carlini,
Akanksha.Jain2, Sibel.Allinson, jeshuas, nd
Hi Sami,
I have a minor comment to:
- [PATCH v2 05/11] DynamicTablesPkg: Update MADT generator for ACPI 6.5
Otherwise for the other patches:
Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
Regards,
Pierre
On 9/13/23 14:49, Sami Mujawar wrote:
> This patch series provides the following updates:
> - The patches 1 & 2 add the new fields introduced
> in MADT (APIC table) by ACPI 6.5 and the patch
> 7/11 updates the Acpiview MADT parser accordingly.
> - The patches 3, 4 & 5 adds TRBE support to the MADT
> table generator in DynamicTablesPkg.
> - Patch 6/11 updates the FADT ACPI revision to 6.5.
> - The patches 8, 9 & 10 add support to generate ETE
> device nodes.
> - The last patch series fixes a bug wherein the CPC
> token was incorrectly referenced.
>
> Updates from v1 patch series:
> - Fixed issue with setting TRBE interrupt in patch 5/11.
>
> The changes can be seen at:
> https://github.com/samimujawar/edk2/tree/2620_ete_dev_fvp_v2
>
> Sami Mujawar (11):
> MdePkg: MADT: Add Online capable flag in GICC
> MdePkg: MADT: Add TRBE interrupt to GICC
> DynamicTablesPkg: Add TRBE interrupt to GICC object
> DynamicTablesPkg: Add TRBE interrupt to GICC object parser
> DynamicTablesPkg: Update MADT generator for ACPI 6.5
> DynamicTablesPkg: Update FADT generator to ACPI 6.5
> ShellPkg: Acpiview: Update MADT parser for TRBE interrupt
> DynamicTablesPkg: Add an ET info object to Arm namespace
> DynamicTablesPkg: Add an ET info object parser
> DynamicTablesPkg: Add ETE device to CPU node in AML
> DynamicTablesPkg: Fix referencing of CPC token
>
> DynamicTablesPkg/Include/ArmNameSpaceObjects.h | 32 +++-
> DynamicTablesPkg/Library/Acpi/Arm/AcpiFadtLibArm/FadtGenerator.c | 108 +++++------
> DynamicTablesPkg/Library/Acpi/Arm/AcpiMadtLibArm/MadtGenerator.c | 83 +++++----
> DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 188 +++++++++++++++++++-
> DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +-
> DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c | 11 +-
> MdePkg/Include/IndustryStandard/Acpi65.h | 4 +-
> ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Madt/MadtParser.c | 48 ++++-
> 8 files changed, 386 insertions(+), 99 deletions(-)
>
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