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SRVR:AM0PR0402MB3635; BCL:0; PCL:0; RULEID:; SRVR:AM0PR0402MB3635; x-forefront-prvs: 0592A9FDE6 received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: i433NSD3CEnlhYvXv8Lf/TGDAddtnQPf8ycoDQKC6ltO5v5NZXia7UYhs/gh7BfEhD5D5xjQkczUATE7KsHmKq8Rwv+u2bDYMd6aeei+/gLwCyCJ/992gvT/PVgHoxmxKK/lO64kMg3gqvGIta9pYKQz7AfKbmE5i83N3J9BkcQ= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d5e473c7-de1e-4cae-77b3-08d57aa9b8c4 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Feb 2018 10:39:30.9800 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR0402MB3635 Subject: Re: [PATCH edk2-platforms 01/39] Silicon/NXP: Add support for Big Endian Mmio APIs X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Feb 2018 10:33:40 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > Laszlo Ersek > Sent: Friday, February 23, 2018 2:51 PM > To: Pankaj Bansal ; Leif Lindholm > > Cc: michael.d.kinney@intel.com; edk2-devel@lists.01.org; > ard.biesheuvel@linaro.org > Subject: Re: [edk2] [PATCH edk2-platforms 01/39] Silicon/NXP: Add support > for Big Endian Mmio APIs >=20 > On 02/23/18 09:40, Pankaj Bansal wrote: > > Hi All > > > >> -----Original Message----- > >> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of > >> Laszlo Ersek > >> Sent: Thursday, February 22, 2018 7:26 PM > >> To: Leif Lindholm > >> Cc: michael.d.kinney@intel.com; edk2-devel@lists.01.org; > >> ard.biesheuvel@linaro.org > >> Subject: Re: [edk2] [PATCH edk2-platforms 01/39] Silicon/NXP: Add > support > >> for Big Endian Mmio APIs > >> > >> On 02/22/18 12:52, Leif Lindholm wrote: > >>> On Thu, Feb 22, 2018 at 09:34:05AM +0100, Laszlo Ersek wrote: > >> > >>>>> But that brings back the complication as to how we have a driver > >>>>> that needs an LE IO library to write output, and a BE IO library to > >>>>> manipulate the hardware. > >>>> > >>>> Can you please explain the "write output" use case more precisely? > >>>> > >>>> My thinking would be this: > >>>> > >>>> - Use the IoLib class directly for "writing output" in little endian > >>>> byte order (which is still unclear to me sorry). > >>> > >>> If the IoLib class is mapped to a an instance that byte-swaps (hereto > >>> referred to as BeIoLib if IoLibSwap is unsuitable), would we not then > >>> end up mapping the non-swapping, currently implemented in > >>> BaseLibIoIntrinsic, variant as BeIoLib? Or if not, do we end up > >>> needing to duplicated all IoLib implementation .infs to provide an > >>> IoLib and a BeIoLib for each? > >>> > >>> It's at that point I burst an aneurysm. > >>> Am I overthinking/underthinking this? > >> > >> We need two library classes, one for talking to LE devices and another= to > BE > >> devices. These should be usable in a given module at the same time, as > Ard > >> says. > >> > >> Both library classes need to work on both LE and BE CPUs (working from > your > >> suggestion that UEFI might grow BE CPU support at some point). > >> Whether that is implemented by dumb, separate library instances > (yielding in > >> total 2*2=3D4 library instances), or by smart, CPU-endianness-agnostic > library > >> instances (in total, 2), is a different question. > >> > >> Note that such "smarts" could be less than trivial to implement: > >> - check CPU endianness in each library API? > >> - or check in the lib constructor only, and flip some function pointer= s? > >> - use a dynamic PCD for caching CPU endianness? > >> - use a HOB for the same? > >> - use a lib global variable (for caching only on the module level)? > >> > >> I think the solution that saves the most on the *source* code size is: > >> - introduce the BeIoLib class > >> - duplicate the MMIO functions from BaseIoLibIntrinsic to the one > >> BeIoLib instance that we introduce > >> - modify the MMIO functions in *both* lib instances (original LE, and > >> new BE), like this: > >> > >> - If the CPU architecture is known to be bound to a single endiannes= s, > >> then hardcode the appropriate operation. This can be done with > >> preprocessor macros, or with the architecture support of INF files= / > >> separate source files. For example, on IA32 and X64, the IoLib > >> instance should work transparently, unconditionally, and the BeIoL= ib > >> instance should byte-swap, unconditionally. > >> > >> - On other CPU arches, all the wider-than-byte MMIO functions, in > >> *both* lib instances should do something like this: > >> > >> // > >> // at file scope > >> // > >> STATIC CONST UINT16 mOne =3D 1; > >> > >> // > >> // at function scope > >> // > >> if (*(CONST UINT8 *)&mOne =3D=3D 1) { > >> // > >> // CPU in LE mode: > >> // - work transparently in the IoLib instance > >> // - byte-swap in the BeIoLib instance > >> // > >> } else { > >> // > >> // CPU in BE mode: > >> // - byte-swap in the IoLib instance > >> // - work transparently in the BeIoLib instance > >> // > >> } > > > > I suggest this approach : > > > > 1. Add BeMmio* functions in existing IoLib. BeMmio* functions will swap > the input before write and swap output after read and so on. > > Mmio* functions will not perform any byte swapping > > 2. create second instance (a copy) of this IoLib for CPUs that are Big = Endian. > We can call it BigEndianIoLib. > > In this library Mmio* functions will swap the input before write a= nd > swap output after read and so on. > > BeMmio* functions will not perform any byte swapping. > > 3. Include the instance of IoLib in dsc file based on cpu endianness th= at the > platform wants to use. i.e. > > If BIG_ENDIAN =3D=3D FALSE > > IoLib | ..\..\..\IoLib > > Else > > IoLib | ..\..\..\BigEndianIoLib > > 4. The devices that are Big endian in platform will always call BeMmio* > functions. They need not check CPU endianness. > > 5. The devices that are Little endian in platform will always call Mmio= * > functions. They need not check CPU endianness. >=20 > This can work too, but there is a downside: a large number of IoLib > instances exist in the tree already. If you add the BeMmio* functions to > the existent IoLib class, you'll have to duplicate the implementation to > all instances (identically, I think). >=20 > We've had this debate in the past. Back then it was about IoFifo > routines. I argued for an IoFifo lib class. Ultimately the IoFifo > routines were added to IoLib, and they had to be implemented for many > more library instances than client code would have actually required. > (See the series at 13a50a6fe1dc..2b631390f9f5.) In turn this runs the > risk of adding untested code. >=20 > Regarding the instances for BE CPUs: the name should likely be > BaseIoLibBigEndian or something similar. In lib instance names, the lib > class name is usually prefixed with the firmware phases where the > instance is usable, and hints about the implementation or constraints > are added as a suffix. I see like below=20 CPU IP Call Lib LE LE MMIO BaseIoLib LE BE SwappedMMIO BaseIoLibEx BE BE MMIO BaseIoLib BE LE SwappedMMIO BaseIoLibEx I am calling BaseIoLibEx for extend the feature of CPU endianness=20 In this case SwappedMMIO could be MmioToBe or MmioToLe Let this this new lib BaseIoLibEx decide endianness of CPU based upon Pcd, hob list etc and do conversion if needed.=20 Thanks Udit=20 > Also, if you want to support BE CPUs with separate IoLib instances, I'm > afraid that's going to lead to the combinatorial explosion that Leif > characterized as "burst[ing] an aneurysm". I think using the (seemingly > dynamic) "mOne" approach I suggested above, a smart compiler can > eliminate all the branches at build time. >=20 > Anyway, I don't insist; I just commented on an RFC. >=20 > Laszlo > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://emea01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flist= s. > 01.org%2Fmailman%2Flistinfo%2Fedk2- > devel&data=3D02%7C01%7Cudit.kumar%40nxp.com%7C932b04d97a2648845d9 > 208d57a9ece38%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6365 > 49744881765464&sdata=3DwHi1Jd5Ar3AlM9sIWI9osdHR%2FF3%2Bx%2BrDEK7U > AqECXDY%3D&reserved=3D0