Re: [edk2-devel] [edk2-platforms][PATCH v1 1/5] Platform/Sgi: Add a new PCD for L2 cache size

["levi.yun" <yeoreum.yun@arm.com>]

Reviewed-by: levi.yun <yeoreum.yun@arm.com>

________________________________________
From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Prabin CA via groups.io <prabin.ca=arm.com@groups.io>
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 1/5] Platform/Sgi: Add a new PCD for L2 cache size

A new PCD named PcdL2CacheSize is introduced to specify the size of the
CPU's L2 cache. This PCD can be used in PPTT tables for a reference
design platform. The default value of this PCD is set to 1MB but can be
changed depending on the variant of the reference design platform.

Signed-off-by: Prabin CA <prabin.ca@arm.com>
---
 Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index af7887e54126..d540dbff2d19 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -37,6 +37,9 @@ [PcdsFixedAtBuild]
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0|UINT64|0x00000003

+  # L2 Cache size
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize|0x100000|UINT32|0x0000002F
+
   # Virtio Block device
   gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x00000000|UINT32|0x00000004
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x00000000|UINT32|0x00000005
--
2.34.1



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