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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yeoreum.yun@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: GHjcswztSGAHGnx3Jl7smsUDx7686176AA= Content-Language: en-GB Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=RiTh+r4E; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Reviewed-by: levi.yun ________________________________________ From: devel@edk2.groups.io on behalf of Prabin CA vi= a groups.io Sent: 11 March 2024 13:14 To: devel@edk2.groups.io Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham Subject: [edk2-devel] [edk2-platforms][PATCH v5 4/9] Platform/Sgi: Introduc= e a flag to enable PCIe support for RD Platforms Introducing a flag called PCIE_ENABLE, which can be set to TRUE or FALSE from the respective .dsc files to enable or disable the PCIe support. As not all reference design platforms have PCIe support enabled, this flag is introduced. Signed-off-by: Prabin CA --- Platform/ARM/SgiPkg/SgiPlatform.dec | 1 + Platform/ARM/SgiPkg/SgiPlatform.dsc.inc | 6 ++++++ Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc | 4 +++- Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc | 4 +++- Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc | 4 +++- Platform/ARM/SgiPkg/RdV1/RdV1.dsc | 4 +++- Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc | 4 +++- Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc | 4 +++- Platform/ARM/SgiPkg/SgiPlatform.fdf | 4 +++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf | 5 ++++- Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c | 19 +++++++++++-= ------- 11 files changed, 43 insertions(+), 16 deletions(-) diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiP= latform.dec index 4087ff6cad2e..af7887e54126 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dec +++ b/Platform/ARM/SgiPkg/SgiPlatform.dec @@ -31,6 +31,7 @@ [Guids.common] [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioBlkSupported|FALSE|BOOLEAN|0x00000001 gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|FALSE|BOOLEAN|0x00000010 + gArmSgiTokenSpaceGuid.PcdPcieEnable|FALSE|BOOLEAN|0x0000002E [PcdsFixedAtBuild] gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x00000002 diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc b/Platform/ARM/SgiPkg/= SgiPlatform.dsc.inc index 1cfe07c7e4ed..1bf489ffeb39 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc +++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc @@ -103,6 +103,10 @@ [PcdsFeatureFlag.common] gArmSgiTokenSpaceGuid.PcdVirtioNetSupported|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE +!if $(PCIE_ENABLE) =3D=3D TRUE + gArmSgiTokenSpaceGuid.PcdPcieEnable|TRUE +!endif + [PcdsFixedAtBuild.common] gArmTokenSpaceGuid.PcdVFPEnabled|1 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000 @@ -330,6 +334,7 @@ [Components.common] # Virtio Network OvmfPkg/VirtioNetDxe/VirtioNet.inf +!if $(PCIE_ENABLE) =3D=3D TRUE # # Required by PCI # @@ -343,6 +348,7 @@ [Components.common] gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8010004F } +!endif # # AHCI Support diff --git a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc b/Platform/ARM/SgiPk= g/RdE1Edge/RdE1Edge.dsc index 32d67d380814..c7463da5203e 100644 --- a/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc +++ b/Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge= .fdf.inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc b/Platform/ARM/SgiPk= g/RdN1Edge/RdN1Edge.dsc index 6c9a64df054f..77efec9d9533 100644 --- a/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc +++ b/Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge= .fdf.inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc b/Platform/ARM/S= giPkg/RdN1EdgeX2/RdN1EdgeX2.dsc index 10e5bfa29b46..521d88925059 100644 --- a/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc +++ b/Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1Ed= geX2.fdf.inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdV1/RdV1.dsc b/Platform/ARM/SgiPkg/RdV1/R= dV1.dsc index e75f68fd8a40..2a4bb019fe7a 100644 --- a/Platform/ARM/SgiPkg/RdV1/RdV1.dsc +++ b/Platform/ARM/SgiPkg/RdV1/RdV1.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdV1/RdV1.fdf.inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc b/Platform/ARM/SgiPkg/Rd= V1Mc/RdV1Mc.dsc index ce014add4165..971e2ccca367 100644 --- a/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc +++ b/Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.fdf= .inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc b/Platform/ARM/SgiPkg/Sg= i575/Sgi575.dsc index 4da4bc2c54a3..4ed64abecd31 100644 --- a/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc +++ b/Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc @@ -1,5 +1,5 @@ # -# Copyright (c) 2020-2022, ARM Limited. All rights reserved. +# Copyright (c) 2020-2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,6 +22,8 @@ [Defines] BOARD_DXE_FV_COMPONENTS =3D Platform/ARM/SgiPkg/Sgi575/Sgi575.fdf= .inc BUILD_NUMBER =3D 1 + DEFINE PCIE_ENABLE =3D TRUE + # include common definitions from SgiPlatform.dsc !include Platform/ARM/SgiPkg/SgiPlatform.dsc.inc !include Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc diff --git a/Platform/ARM/SgiPkg/SgiPlatform.fdf b/Platform/ARM/SgiPkg/SgiP= latform.fdf index 7e55214c2001..4558e886f863 100644 --- a/Platform/ARM/SgiPkg/SgiPlatform.fdf +++ b/Platform/ARM/SgiPkg/SgiPlatform.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018-2021, ARM Limited. All rights reserved. +# Copyright (c) 2018-2024, ARM Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -115,6 +115,7 @@ [FV.FvMain] INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf INF Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf +!if $(PCIE_ENABLE) =3D=3D TRUE # Required by PCI INF ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf @@ -123,6 +124,7 @@ [FV.FvMain] # INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf INF MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf +!endif # # AHCI Support diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf b/Plat= form/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf index 020bde0d1f56..9bb14eafc5ed 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf @@ -1,5 +1,5 @@ # -# Copyright (c) 2018 - 2023, Arm Limited. All rights reserved. +# Copyright (c) 2018 - 2024, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -36,6 +36,9 @@ [Sources.common] [Sources.AARCH64] AArch64/Helper.S | GCC +[FeaturePcd] + gArmSgiTokenSpaceGuid.PcdPcieEnable + [FixedPcd] gArmPlatformTokenSpaceGuid.PcdClusterCount gArmPlatformTokenSpaceGuid.PcdCoreCount diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c b/Pla= tform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c index 62c212f3c5b0..72fb0b13e48c 100644 --- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c +++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLibMem.c @@ -18,7 +18,8 @@ // Total number of descriptors, including the final "end-of-table" descrip= tor. #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS = \ - ((14 + (FixedPcdGet32 (PcdChipCount) * 2)) + = \ + ((13 + (FixedPcdGet32 (PcdChipCount) * 2)) + = \ + (FeaturePcdGet (PcdPcieEnable)) + = \ (FixedPcdGet32 (PcdIoVirtSocExpBlkUartEnable) * = \ FixedPcdGet32 (PcdChipCount) * 2)) @@ -263,13 +264,15 @@ ArmPlatformGetVirtualMemoryMap ( #endif #endif - // PCI Configuration Space - VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciExpressBas= eAddress); - VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciExpressBas= eAddress); - VirtualMemoryTable[Index].Length =3D (FixedPcdGet32 (PcdPciBusM= ax) - - FixedPcdGet32 (PcdPciBusMin= ) + 1) * - SIZE_1MB; - VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIBUT= E_DEVICE; + if (FeaturePcdGet (PcdPcieEnable)) { + // PCI Configuration Space + VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdPciExpressB= aseAddress); + VirtualMemoryTable[Index].VirtualBase =3D PcdGet64 (PcdPciExpressB= aseAddress); + VirtualMemoryTable[Index].Length =3D (FixedPcdGet32 (PcdPciBu= sMax) - + FixedPcdGet32 (PcdPciBusM= in) + 1) * + SIZE_1MB; + VirtualMemoryTable[Index].Attributes =3D ARM_MEMORY_REGION_ATTRIB= UTE_DEVICE; + } // MM Memory Space VirtualMemoryTable[++Index].PhysicalBase =3D PcdGet64 (PcdMmBufferBase)= ; -- 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D Groups.io Links: You receive all messages sent to this group. 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