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contact devel+owner@edk2.groups.io Resent-Date: Wed, 03 Apr 2024 23:44:06 -0700 Resent-From: yeoreum.yun@arm.com Reply-To: devel@edk2.groups.io,yeoreum.yun@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: 0Tf0NcMqfLdPWtdpujizLjA0x7686176AA= Content-Language: en-GB Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=hDGZVcHT; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Reviewed-by: levi.yun ________________________________________ From: devel@edk2.groups.io on behalf of Prabin CA vi= a groups.io Sent: 03 April 2024 18:33 To: devel@edk2.groups.io Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham Subject: [edk2-devel] [edk2-platforms][PATCH v1 4/5] Platform/Sgi: Extend S= MBIOS support for RD-V2 platform From: Pranav Madhu The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level cache. Extend the SMBIOS support for RD-V2 platform with this configuration and reuse rest of the RD-N2 SMBIOS configuration for the RD-V2 platform. Signed-off-by: Prabin CA --- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c = | 7 +++++-- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c = | 9 ++++++--- Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c = | 20 +++++++++++++++++++- 3 files changed, 30 insertions(+), 6 deletions(-) diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInfor= mation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInforma= tion.c index b7e2238fb39c..edf2a5f63c63 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.= c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.= c @@ -5,7 +5,7 @@ Reference Design platforms. Type 1 table defines attributes of the overall system such as manufacturer, product name, UUID etc. - Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. + Copyright (c) 2021 - 2024, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -33,7 +33,8 @@ "RdV1Mc\0" \ "RdN2\0" \ "RdN2Cfg1\0" \ - "RdN2Cfg2\0" + "RdN2Cfg2\0" \ + "RdV2\0" typedef enum { ManufacturerName =3D 1, @@ -71,6 +72,8 @@ STATIC GUID mSmbiosUid[] =3D { {0xa4941d3d, 0xfac3, 0x4ace, {0x9a, 0x7e, 0xce, 0x26, 0x76, 0x64, 0x5e, = 0xda}}, /* Rd-N2-Cfg2 */ {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, = 0x60}}, + /* Rd-V2 */ + {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, = 0x45}}, }; /* System information */ diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorIn= formation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorI= nformation.c index b59172cf1cb9..ee269f707714 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformati= on.c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformati= on.c @@ -6,7 +6,7 @@ family, processor id, maximum operating frequency, and other information related to the processor. - Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. + Copyright (c) 2021 - 2024, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -27,7 +27,7 @@ #define SOCKET_TYPE_BASE 3 #define SOCKET_TYPE_NUM 1 #define PROCESSOR_VERSION_BASE (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM) -#define PROCESSOR_VERSION_NUM 10 +#define PROCESSOR_VERSION_NUM 11 #define SERIAL_NUMBER_BASE (PROCESSOR_VERSION_BASE + PROCESSOR_VERSIO= N_NUM) #define TYPE4_STRINGS \ "0x000\0" /* Part Number */ \ @@ -43,6 +43,7 @@ "Neoverse-N2\0" \ "Neoverse-N2\0" \ "Neoverse-N2\0" \ + "Neoverse-V2\0" \ "000-0\0" /* Serial number */ \ "783-3\0" \ "786-1\0" \ @@ -52,7 +53,8 @@ "78A-2\0" \ "7B7-1\0" \ "7B6-1\0" \ - "7B7-1\0" + "7B7-1\0" \ + "7F2-1\0" typedef enum { PartNumber =3D 1, @@ -178,6 +180,7 @@ InstallType4ProcessorInformation ( break; case RdN2: case RdN2Cfg1: + case RdV2: mArmRdSmbiosType4.Base.CoreCount =3D CoreCount; mArmRdSmbiosType4.Base.EnabledCoreCount =3D CoreCount; mArmRdSmbiosType4.Base.ThreadCount =3D CoreCount; diff --git a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInform= ation.c b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformati= on.c index b71ce721e2e8..4af72919a3f1 100644 --- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c +++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c @@ -6,7 +6,7 @@ implemented, cache configuration, ways of associativity and other information related to cache memory installed. - Copyright (c) 2021 - 2022, Arm Limited. All rights reserved. + Copyright (c) 2021 - 2024, Arm Limited. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent @par Specification Reference: @@ -334,6 +334,24 @@ InstallType7CacheInformation ( mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 8192; // 8MB SLC mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way; break; + case RdV2: + /* L1 instruction cache */ + mArmRdSmbiosType7[0].Base.MaximumCacheSize2 =3D 64; // 64KB + mArmRdSmbiosType7[0].Base.InstalledSize2 =3D 64; // 64KB + mArmRdSmbiosType7[0].Base.Associativity =3D CacheAssociativity4Way; + /* L1 data cache */ + mArmRdSmbiosType7[1].Base.MaximumCacheSize2 =3D 64; // 64KB + mArmRdSmbiosType7[1].Base.InstalledSize2 =3D 64; // 64KB + mArmRdSmbiosType7[1].Base.Associativity =3D CacheAssociativity4Way; + /* L2 cache */ + mArmRdSmbiosType7[2].Base.MaximumCacheSize2 =3D 2048; // 2MB + mArmRdSmbiosType7[2].Base.InstalledSize2 =3D 2048; // 2MB + mArmRdSmbiosType7[2].Base.Associativity =3D CacheAssociativity8Way; + /* System level cache */ + mArmRdSmbiosType7[4].Base.MaximumCacheSize2 =3D 32768; // 32MB SLC + mArmRdSmbiosType7[4].Base.InstalledSize2 =3D 32768; // 32MB SLC + mArmRdSmbiosType7[4].Base.Associativity =3D CacheAssociativity16Way; + break; } /* Install valid cache information tables */ -- 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D Groups.io Links: You receive all messages sent to this group. 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