From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from EUR03-AM5-obe.outbound.protection.outlook.com (mail-eopbgr30046.outbound.protection.outlook.com [40.107.3.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1D9A221D046A6 for ; Mon, 18 Sep 2017 08:30:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector1-arm-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=DF8cOf8NsnHdQOa4KFSa2cKsFOkiOXN73Hx/wQ+kLvA=; b=ZRV6Y8x1Ch2m469eXXea5XpoKdkz5dLR89/1pYpmO0cDwvK0Y5yF1t/EXiCvjVfaGdNMoFgRRtzbt5ObdU4/NwBFJSkPixBoSNmXjNslOxCJ2iwXIkWtZ15Az9f3deyoglIzm67MJUTKEsSpIYLti4fh1LUypdYa7eRQ/pHS1eA= Received: from AM4PR0801MB1444.eurprd08.prod.outlook.com (10.168.5.24) by AM4PR0801MB2737.eurprd08.prod.outlook.com (10.167.90.155) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.56.11; Mon, 18 Sep 2017 15:33:07 +0000 Received: from AM4PR0801MB1444.eurprd08.prod.outlook.com ([fe80::4103:93c:2261:c26c]) by AM4PR0801MB1444.eurprd08.prod.outlook.com ([fe80::4103:93c:2261:c26c%13]) with mapi id 15.20.0056.016; Mon, 18 Sep 2017 15:33:07 +0000 From: Evan Lloyd To: Leif Lindholm CC: "edk2-devel@lists.01.org" , Matteo Carlini , Sami Mujawar Thread-Topic: [PATCH] ArmPkg: ARM v8.2 updates for detecting FP Thread-Index: AQHTLjyMYbYY8YZFEECsTi1u/h2ZTaK6x7Cw Date: Mon, 18 Sep 2017 15:33:07 +0000 Message-ID: References: <20170914161121.3160-1-evan.lloyd@arm.com> <20170915160605.inw32x6vhgnkgseu@bivouac.eciton.net> In-Reply-To: <20170915160605.inw32x6vhgnkgseu@bivouac.eciton.net> Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=Evan.Lloyd@arm.com; x-originating-ip: [217.140.96.140] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; AM4PR0801MB2737; 6:yBDAjwHZFWW9vxHkvJqhcUhHL+ovWItaaOsigpEmNY3o0qs8jlFbZgJiVdNHo9REcM21CLK3JSUwDCDhkQ6gdi23oD3JSHO5k1Q/Za1sh5EuyOMHQjTT/FaMfSBlXcou9spN4uxBPxI054xMb830uGS8R7TCTHtIpAUhfLmsAPJ0PSfh5eXUuH87J4ErphXLGW1yKafYnvKY+nWMKMkYHOtB8MpCt8eZqisd8lB6ABhz+LPtpa4CnZottTrMu96vqnx4HIbCiD19aoDVUvACF7Q5wuQ/XFxPCncFCJJ8yphcCKWsOnkbt7C1+gNrZt7Odx1mm7VGAlbYLfHaj6zuNQ==; 5:5tGesDdDx+YOu9DAGqkcSN07sVF2oebkqiDwGFXtY2KX+vrnIPDt2w9IzW+f2zmKJtQ4c+0GDLEeImKmi/YJehGGlVMEH+uTxfH+eHqtI4BdPCUi7JLnt8l5SM+VJeURxDUvaPUkEPUFRBIpHBFNIg==; 24:45HzVt8NDF+IezosP9tUPltCyq4mM5mTrHe7bNUxFFILTvJQsG41IdYhYtgT8U90am43VWYWEMm2UJYjdbg5H5QSDl6A4dIRe+yVnNqYz20=; 7:TUy4eN4KcwmxWg7zaOnX3XE8/cIUaTaXIXwrMCIrIjDE8Ewvg4tN1GtDgcduvZXZomKjR8Cl5EvI6fDFbqQ/nfPEMUydEIjy3N8wZ1BL1FNrg3V0jW4JFrOr3a+Mfvawlf/LSse5K1Hli/WG9o2Su7ZrEYjnRREdt4GVYRrfN7S6COEhGWEQG23b28HkvXaUpt8sN7yG1Zpn3iDoRw3uOfiPKg69mU+W5CjdadnNt4c= x-ms-exchange-antispam-srfa-diagnostics: SSOS; x-ms-office365-filtering-correlation-id: 84c39bbf-d79e-4991-ab27-08d4feaa8fd5 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(48565401081)(300000503095)(300135400095)(2017052603199)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); SRVR:AM4PR0801MB2737; x-ms-traffictypediagnostic: AM4PR0801MB2737: x-exchange-antispam-report-test: UriScan:(180628864354917)(162533806227266); x-microsoft-antispam-prvs: x-exchange-antispam-report-cfa-test: BCL:0; PCL:0; RULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(2401047)(8121501046)(5005006)(93006095)(93001095)(100000703101)(100105400095)(10201501046)(3002001)(6055026)(6041248)(20161123562025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123564025)(20161123558100)(20161123555025)(20161123560025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095); SRVR:AM4PR0801MB2737; BCL:0; PCL:0; RULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095); SRVR:AM4PR0801MB2737; x-forefront-prvs: 04347F8039 x-forefront-antispam-report: SFV:NSPM; SFS:(10009020)(6009001)(376002)(346002)(39860400002)(24454002)(13464003)(40434004)(199003)(189002)(6506006)(5890100001)(33656002)(5250100002)(478600001)(72206003)(86362001)(14454004)(25786009)(53546010)(189998001)(101416001)(66066001)(106356001)(74316002)(305945005)(105586002)(6436002)(4326008)(68736007)(81156014)(8676002)(81166006)(8936002)(76176999)(7736002)(54356999)(54906002)(6246003)(50986999)(99286003)(7696004)(2900100001)(3280700002)(3660700001)(15650500001)(55016002)(5660300001)(9686003)(53936002)(316002)(3846002)(102836003)(6116002)(229853002)(2950100002)(6916009)(110136004)(2906002)(97736004)(19627235001); DIR:OUT; SFP:1101; SCL:1; SRVR:AM4PR0801MB2737; H:AM4PR0801MB1444.eurprd08.prod.outlook.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 18 Sep 2017 15:33:07.6341 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM4PR0801MB2737 Subject: Re: [PATCH] ArmPkg: ARM v8.2 updates for detecting FP X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Sep 2017 15:30:07 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable > -----Original Message----- > From: Leif Lindholm [mailto:leif.lindholm@linaro.org] > Sent: 15 September 2017 17:06 > To: Evan Lloyd > Cc: edk2-devel@lists.01.org; Ard Biesheuvel ; > Matteo Carlini ; Sami Mujawar > > Subject: Re: [PATCH] ArmPkg: ARM v8.2 updates for detecting FP > > On Thu, Sep 14, 2017 at 05:11:21PM +0100, evan.lloyd@arm.com wrote: > > From: Sami Mujawar > > I have fixed Sami's email address up before pushing. [[Evan Lloyd]] Thanks, Leif. That was a problem caused by an out of date config in the original repo where the change was created. Sami has fixed any others in our internal repo, so it shouldn't happen agai= n. > > > The ARMv8.2-FP16 extension introduces support for half precision > > floating point and the processor ID registers have been updated to > > enable detection of the implementation. > > > > The possible values for the FP bits in ID_AA64PFR0_EL1[19:16] are: > > - 0000 : Floating-point is implemented. > > - 0001 : Floating-point including Half-precision support is > > implemented. > > - 1111 : Floating-point is not implemented. > > - All other values are reserved. > > > > Previously ArmEnableVFP() compared the FP bits with 0000b to see if > > the FP was implemented, before enabling FP. Modified this check to > > enable the FP if the FP bits 19:16 are not 1111b. > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > Signed-off-by: Sami Mujawar > > Signed-off-by: Evan Lloyd > > So ... I think longer-term we should try to move a lot of this type of st= uff to c > instead, but this is a clear fix - thanks! [[Evan Lloyd]] You are most welcome. We agree about the move to c, as ass= embler code doesn't buy anything here. However, if you are going to change that you probably have to do all of it - not a task I'd want to take on. > > Reviewed-by: Leif Lindholm Pushed as > 2f16993c25 > > > --- > > ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 10 ++++++---- > > 1 file changed, 6 insertions(+), 4 deletions(-) > > > > diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > index > > > dde6a756528f3abf1bd5a142448e42122a9bd8fa..2d136d242b943fe2f365bc82 > 4953 > > b7fe10c944b7 100644 > > --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S > > @@ -1,7 +1,7 @@ > > > > #--------------------------------------------------------------------- > > --------- > > # > > # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
-# > > Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. > > +# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved. > > # Copyright (c) 2016, Linaro Limited. All rights reserved. > > # > > # This program and the accompanying materials @@ -403,9 +403,11 @@ > > ASM_FUNC(ArmEnableVFP) > > mov x1, x30 // Save LR > > bl ArmReadIdPfr0 // Read EL1 Processor Feature Register= (PFR0) > > mov x30, x1 // Restore LR > > - ands x0, x0, #AARCH64_PFR0_FP// Extract bits indicating VFP > implementation > > - cmp x0, #0 // VFP is implemented if '0'. > > - b.ne 4f // Exit if VFP not implemented. > > + ubfx x0, x0, #16, #4 // Extract the FP bits 16:19 > > + cmp x0, #0xF // Check if FP bits are '1111b', > > + // i.e. Floating Point not implemented > > + b.eq 4f // Exit when VFP is not implemented. > > + > > // FVP is implemented. > > // Make sure VFP exceptions are not trapped (to any exception level)= . > > mrs x0, cpacr_el1 // Read EL1 Coprocessor Access Control= Register > (CPACR) > > -- > > Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") > > IMPORTANT NOTICE: The contents of this email and any attachments are confid= ential and may also be privileged. If you are not the intended recipient, p= lease notify the sender immediately and do not disclose the contents to any= other person, use it for any purpose, or store or copy the information in = any medium. Thank you.