From: "Pranav Madhu" <pranav.madhu@arm.com>
To: Pierre Gondois <Pierre.Gondois@arm.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
Leif Lindholm <leif@nuviainc.com>,
Sami Mujawar <Sami.Mujawar@arm.com>, nd <nd@arm.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH V1 5/8] Platform/Sgi: ACPI PPTT table for RD-E1-Edge platform
Date: Tue, 20 Apr 2021 06:02:12 +0000 [thread overview]
Message-ID: <AM5PR0801MB17157157F7617C32A7F2DD7D8A489@AM5PR0801MB1715.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <91781887-47e9-2a87-4d88-f8e7e36b18f7@arm.com>
Hi Pierre,
Thanks for reviewing this patch.
>
> Hi Pranav,
> > +� }
> > +
> > +#define PPTT_CORE_INIT(pid, cid,
> >
> coreId)���������������������
> > ����������������� \
> > + { \
> > +��� /* Parameters for CPU Core
> >
> */����������������������ï¿
> > ½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ \
> > +��� EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR_INIT
> >
> (�����������������������
> > ������� \
> > +����� __builtin_offsetof (RDE1EDGE_PPTT_CORE, DCache), /*
> > +Length
> > */���������� \
> > +�����
> > +PPTT_PROCESSOR_CORE_THREADED_FLAGS,��������
> /* Flag
> > */������������������ \
> > +����� __builtin_offsetof
> > (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,��� \
> > +�������
> > +Package.Cluster[cid]),���������������ï¿
> > +½ï¿½ï¿½ï¿½ /* Parent
> > */���������������� \
> > +�����
> >
> +0,����������������������ï
> > +¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* ACPI Id
> > */��������������� \
> > +�����
> >
> +2����������������������ï¿
> > +½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* Num
> of
> > +private
> > resource */\
> > + ), \
> > + \
> > +��� /* Offsets of the private resources
> >
> */����������������������ï¿
> > ½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ \
> > + { \
> > +����� __builtin_offsetof
> > (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,��� \
> > + Package.Cluster[cid].Core[coreId].DCache), \ �����
> > +__builtin_offsetof
> > (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,��� \
> > + Package.Cluster[cid].Core[coreId].ICache) \ }, \
>
> Would it be possible to use the edk2/MdePkg/Include/Base.h:OFFSET_OF()
> macro to handle the different compilers ?
Yes, will update
>
> This modification could be applied to all the other PPTT tables in the set.
>
> > + \
> > +��� /* L1 Data cache parameters
> >
> */����������������������ï¿
> > ½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ \
> > +��� EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE_INIT
> >
> (�����������������������
> > ����������� \
> > +�����
> > +PPTT_CACHE_STRUCTURE_FLAGS,���������� /*
> Flag
> >
> */����������������������ï¿
> > ½ï¿½ \
> > +����� __builtin_offsetof
> > (EFI_ACPI_6_3_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE,��� \
> > + Package.Cluster[cid].Core[coreId].L2Cache), \
> >
> +�����������������������
> > +�������������������� /* Next
> > +level of cache
> > */��������� \
> > +�����
> >
> +SIZE_32KB,�������������������ï¿
> > +½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* Size
> >
> */����������������������ï¿
> > ½ï¿½ \
> > +�����
> >
> +128,���������������������ï¿
> > +½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* Num of sets
> > */����������������� \
> > +�����
> >
> +4,����������������������ï
> > +¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* Associativity
> > */��������������� \
> > +�����
> >
> +PPTT_DATA_CACHE_ATTR,��������������ï¿
> ½ï¿½
> > +/* Attributes
> > */������������������ \
> > +�����
> >
> +64����������������������ï
> > +¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ /* Line size
> > */������������������� \
> > + ), \
> > + \
> [...]
> > +
> > +#pragma pack(1)
> > +typedef struct {
> > +� EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR Thread; }
> > +RDE1EDGE_PPTT_THREAD;
> > +
> > +typedef struct {
> > +� EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR� Core; �
> >
> +UINT32��������������������ï¿
> ½
> > +����������� Offset[2];
> Similarly to the the first patch, I think there should be 3 elements (and if
> possible renamed to 'PrivateResources').
> > +� EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE����� DCache; �
> > +EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE����� ICache; �
> > +EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE����� L2Cache; �
> > +RDE1EDGE_PPTT_THREAD Thread[THREAD_PER_CORE]; }
> RDE1EDGE_PPTT_CORE;
> > +
> > +typedef struct {
> > +� EFI_ACPI_6_3_PPTT_STRUCTURE_PROCESSOR� Cluster; �
> >
> +UINT32��������������������ï¿
> ½
> > +����������� Offset; �
> > +EFI_ACPI_6_3_PPTT_STRUCTURE_CACHE����� L3Cache; �
> >
> +RDE1EDGE_PPTT_CORE���������������ï¿
> ½ï¿½
> > +��� Core[CORE_COUNT /
> > THREAD_PER_CORE];
> > +} RDE1EDGE_PPTT_CLUSTER;
> > +
>
> Regards,
>
> Pierre
Regards,
Pranav
next prev parent reply other threads:[~2021-04-20 6:02 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-02 9:12 [edk2-platforms][PATCH V1 0/8] Platform/Sgi: Add PPTT table for SGI/RD platforms Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 1/8] Platform/Sgi: Helper macros for PPTT Table Pranav Madhu
2021-04-13 9:18 ` [edk2-devel] " PierreGondois
2021-04-20 5:57 ` Pranav Madhu
2021-04-21 13:29 ` PierreGondois
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 2/8] Platform/Sgi: ACPI PPTT table for SGI-575 platform Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 3/8] Platform/Sgi: ACPI PPTT table for RD-N1-Edge platform Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 4/8] Platform/Sgi: ACPI PPTT table for RD-N1-Edge dual-chip Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 5/8] Platform/Sgi: ACPI PPTT table for RD-E1-Edge platform Pranav Madhu
2021-04-13 9:34 ` [edk2-devel] " PierreGondois
2021-04-20 6:02 ` Pranav Madhu [this message]
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 6/8] Platform/Sgi: ACPI PPTT Table for RD-V1 platform Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 7/8] Platform/Sgi: ACPI PPTT Table for RD-V1 quad-chip platform Pranav Madhu
2021-04-02 9:12 ` [edk2-platforms][PATCH V1 8/8] Platform/Sgi: ACPI PPTT table for RD-N2 platform Pranav Madhu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=AM5PR0801MB17157157F7617C32A7F2DD7D8A489@AM5PR0801MB1715.eurprd08.prod.outlook.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox